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skrzyp |
2004-04-22 Jani Monoses
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* cdl/hal_mips_tx49.cdl :
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Invoke tail with stricter syntax that works in latest coreutils.
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2003-08-06 Andy Dyer
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* src/mips_tx49.ld:
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Removed the "& defined(CYGPKG_IO)" which was causing libextras.a
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not to get built for a redboot configuration. The offsets for the
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exception vectors were wrong for a ROM build of redboot. For
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R4000 class mips, the utlb vector is at 0xbfc00200, and the
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general exception vector is at 0xbfc00380 Added *.2ram sections
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which were missing from the data segment.
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2003-04-10 Nick Garnett
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* src/mips_tx49.ld:
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Added libsupc++.a to GROUP() directive for GCC versions later than
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3.0.
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2003-04-09 Jonathan Larmour
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* src/mips_tx49.ld:
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Fix .gnulinkonce.s -> .gnu.linkonce.s typo.
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2000-12-05 Jesper Skov
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* include/var_cache.h (HAL_MIPS_CACHE_INSN_USES_LSB): The TX49
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uses LSB in the cache macro.
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2000-09-12 Jesper Skov
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* include/variant.inc: Enable div-by-zero FPU exceptions.
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2000-09-06 Jesper Skov
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* include/variant.inc: Enable the cache after clearing it.
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2000-09-01 Jonathan Larmour
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* include/var_arch.h: tx49 GDB stubs now use 32-bits internally to
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represent registers
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2000-08-31 Jonathan Larmour
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* src/mips_tx49.ld: Use HAL table sections instead of devtab sections
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2000-06-06 Jesper Skov
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* include/var_cache.h: Define HAL_ICACHE_INVALIDATE_ALL which
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disables cache during operation.
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2000-05-25 Jesper Skov
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* cdl/hal_mips_tx49.cdl: Use FPU double-LE layout in 32bit mode.
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2000-05-24 Jesper Skov
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* src/mips_tx49.ld: Application contructors run after eCos
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constructors.
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2000-05-22 Jesper Skov
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* include/variant.inc: Flush all ways of cache on startup.
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* include/var_cache.h:
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* cdl/hal_mips_tx49.cdl: Comment cleanups.
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* include/var_cache.h: Cleaned up. Use arch macros.
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2000-05-18 Jesper Skov
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* src/mips_tx49.ld: Exclude libgcc constructors from CTOR list.
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* cdl/hal_mips_tx49.cdl: Set cache size to 32kB.
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2000-05-17 Jesper Skov
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* src/mips_tx49.ld (hal_virtual_vector_table): Added.
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2000-05-16 Jesper Skov
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* cdl/hal_mips_tx49.cdl: Platform can select FPU mode.
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2000-05-15 Jesper Skov
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* include/variant.inc:
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* include/var_cache.h:
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The cache-enable bits must be 0 to enable. Enable
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caching/writeback for kseg0.
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* src/variant.S:
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* include/var_arch.h:
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Cleanup.
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* include/variant.inc: Copied in various stuff from VR4300 file.
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* include/var_cache.h: Cleanup. Added enabled macros.
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* cdl/hal_mips_tx49.cdl: Cleanup. Enable FPU.
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2000-05-11 Jesper Skov
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* src/mips_tx49.ld: Workaround minor tool problem.
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* src/variant.S: Emptied.
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* src/mips_tx49.ld: Move vsr to avoid conflict with 'other'
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exception entry having vectors in RAM.
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* include/var_arch.h: GDB expects 64 bit registers.
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* cdl/hal_mips_tx49.cdl: Add (disabled) 64 bit related options.
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* src/mips_tx49.ld: Workaround for linker buglet.
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* include/var_cache.h: Minor tweaks.
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2000-05-09 Jesper Skov
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* Cloned from hal/mips/tx39
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//===========================================================================
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// ####GPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// This program is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either version 2 or (at your option) any
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// later version.
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//
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// This program is distributed in the hope that it will be useful, but
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// WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 138 |
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// General Public License for more details.
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//
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| 140 |
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// You should have received a copy of the GNU General Public License
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| 141 |
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// along with this program; if not, write to the
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// Free Software Foundation, Inc., 51 Franklin Street,
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// Fifth Floor, Boston, MA 02110-1301, USA.
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// -------------------------------------------
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// ####GPLCOPYRIGHTEND####
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//===========================================================================
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