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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [mips/] [upd985xx/] [current/] [ChangeLog] - Blame information for rev 786

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Line No. Rev Author Line
1 786 skrzyp
2004-04-22  Jani Monoses 
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         * cdl/hal_mips_upd985xx.cdl :
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         Invoke tail with stricter syntax that works in latest coreutils.
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6
2003-04-10  Nick Garnett  
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8
        * src/hal_mips_upd985xx.ld:
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        Added libsupc++.a to GROUP() directive for GCC versions later than
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        3.0.
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12
2002-04-02  Hugo Tyson  
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2002-04-02  Anssi Pulkkinen 
14
 
15
        * src/var_misc.c (cyg_hal_interrupt_acknowledge): Remove the read
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        of the read-clear ISR register - it loses other pending interrupt
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        sources.  Thanks to ASCOM for spotting this.  It should have been
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        removed when the soft-copy and arbitration ISR were added, because
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        those changes mean the hardware register would already be cleared
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        down.
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2002-01-22  Hugo Tyson  
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        * cdl/hal_mips_upd985xx.cdl: CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN
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        must not be enabled because the way the arbitration ISR is
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        attached does not work with chained interrupts.
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28
2001-10-30  Jonathan Larmour  
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30
        * cdl/hal_mips_upd985xx.cdl (CYGHWR_HAL_MIPS_UPD985XX_DIAG_BAUD):
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        This is the same as CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
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        which RedBoot uses, so define it.
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        And also reimplement CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
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        as this is what makes it work.
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36
2001-10-30  Hugo Tyson  
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38
        * cdl/hal_mips_upd985xx.cdl: Platform does *not* implement VV baud
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        operations, in fact the implements
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        CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT prevents it building.
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42
2001-10-09  Hugo Tyson  
43
 
44
        * cdl/hal_mips_upd985xx.cdl (..._MIPS_UPD985XX_HARDWARE_BUGS...):
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        New CDL options to control workarounds for System Controller bugs
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        S1 and S2.  Shorthand for S1 requires the fixes elsewhere.  That
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        for S2 selects alternate versions of the interrupt code.
48
 
49
        * include/var_intr.h (HAL_INTERRUPT_ACKNOWLEDGE,...): Alternative
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        versions which call the new routines in src/var_misc.c to deal
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        with System Controller interrupts.
52
 
53
        * src/var_misc.c (cyg_hal_interrupt_unmask,...): New routines to
54
        manage the System Controller interrupts by software rather than
55
        S_ISR/S_IMR.  We never mask an interrupt once unmasked, but let
56
        the interrupt happen, fielding it silently.  When/if it becomes
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        unmasked, then we call the ISR &c.
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59
2001-08-17  Jonathan Larmour  
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61
        * cdl/hal_mips_upd985xx.cdl: Platform implements VV baud operations.
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63
2001-08-08  Hugo Tyson  
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65
        * include/variant.inc (hal_intc_decode): Do not decode the S_ISR
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        interrupts after all - they must be handled by arbitration.  So
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        any S_ISR interrupt is reported as CYGNUM_HAL_INTERRUPT_SYSCTL -
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        Who are they?  They are *all* number 6.
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70
        * src/var_misc.c (_arbitration_isr): New routine to arbitrate
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        between - and call all of - the interrupt sources that hang off
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        the system controller S_ISR register, because the S_ISR register
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        is read-clear, and the interrupt sources are edge-triggered so
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        they do not re-assert themselves - so we must address multiple
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        sources per actual interrupt.
76
        (hal_variant_init): Install _arbitration_isr() on the SYSCTL
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        interrupt at startup.
78
 
79
        * include/var_intr.h: Commented the change in interrupt usage -
80
        the SYSCTL is occupied from time zero.
81
 
82
2001-08-01  Hugo Tyson  
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84
        * src/hal_mips_upd985xx.ld (hal_interrupt_sr_mask_shadow_base):
85
        This must be placed statically so it is shared with RedBoot.  And
86
        it must be an array so that we can address it from afar.
87
 
88
        * include/var_intr.h (HAL_DISABLE_INTERRUPTS): Implement this
89
        macro and its fellows as well as the individual MASK/UNMASK
90
        routines; these work together to keep the SR IM bits "true" to
91
        what is intended by means of a shadow variable.  Otherwise a race
92
        condition in the vanilla HAL_DISABLE_INTERRUPTS() can discard an
93
        interrupt mask change made by an ISR.
94
        (hal_interrupt_sr_mask_shadow): declare this and define it to
95
        entry zero of hal_interrupt_sr_mask_shadow_base[].
96
 
97
        * src/var_misc.c (hal_interrupt_sr_mask_shadow): initialize this
98
        new variable.
99
 
100
        * cdl/hal_mips_upd985xx.cdl (CYGPKG_HAL_MIPS_UPD985XX): set
101
        CYGINT_HAL_MIPS_INTERRUPT_RETURN_KEEP_SR_IM because we use bits
102
        within the SR for interrupt control.
103
 
104
2001-07-25  Hugo Tyson  
105
 
106
        * include/var_intr.h (CYGNUM_HAL_INTERRUPT_SOFT_ZERO)
107
        (CYGNUM_HAL_INTERRUPT_SOFT_ONE): New interrupt numbers for
108
        software interrupts 0 and 1.  Also mask, unmask, and ack them
109
        correctly; ack clears the R/W bit in the cause regsiter.
110
 
111
        * include/variant.inc (hal_intc_decode) : Decode Software
112
        interrupts into numbers 0 and 1 - all else are moved up a bit.
113
 
114
2001-07-20  Hugo Tyson  
115
 
116
        * cdl/hal_mips_upd985xx.cdl: Demand that CYGPKG_LIBM includes
117
        -fno-strict-aliasing in its CFLAGS_ADD to workaround a tools issue
118
        with access to double via pointer-to-union casts.
119
 
120
2001-07-18  Hugo Tyson  
121
 
122
        * include/var_arch.h (UARTLCR_8N1): Add more divers definitions of
123
        UART control bits for implementing all the controls in the serial
124
        device that nobody ever uses.
125
 
126
2001-07-17  Hugo Tyson  
127
 
128
        * include/variant.inc: If RAM startup, don't blow away the
129
        contents of cache - it might contain things that matter such as
130
        debug connection state.
131
 
132
2001-07-09  Hugo Tyson  
133
 
134
        * include/var_arch.h (SDMDR_INIT): Change one of the numbers to
135
        match what's in the hardware when set up by customer code.
136
 
137
        * include/variant.inc: Remove dependency on temporary development
138
        config point CYGBLD_HAL_STARTUP_ROM_POST_OMIT_INITIALIZATION - the
139
        initialization now works OK.  So hal_memc_setup_table gets called.
140
 
141
        * src/variant.S (hal_memc_setup_table): ROM startup now works, so
142
        this code now gets called.
143
 
144
2001-07-06  Hugo Tyson  
145
 
146
        * src/hal_diag.c (hal_uart_init): Ensure that we use the internal
147
        baud clock because there is no external one.
148
 
149
        * include/var_arch.h (UARTCLOCK): Clock is now 50MHz for "new"
150
        boards, not 18.xMHz any more.
151
 
152
2001-07-03  Hugo Tyson  
153
 
154
        * include/var_intr.h (HAL_INTERRUPT_[UN]MASK): Better manipulate
155
        these with interrupts disabled for atomicity.
156
 
157
2001-07-02  Bart Veer  
158
 
159
        * src/var_misc.c (hal_variant_init):
160
        Move the GPIO0 manipulating (flash programming voltagE)
161
        to the platform-init.
162
 
163
2001-06-27  Hugo Tyson  
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165
        This all fixes the serial interrupt problem of 2001-06-26.
166
 
167
        * src/var_misc.c (hal_variant_init): Initialize the system
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        controller's ISR/IMR registers to mask and ack all external
169
        interrupts and then enable the underlying interrupt source that
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        controls them all.
171
        Also provide hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; &c for
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        use by system in vectors.S, and initialize them.
173
 
174
        * src/hal_diag.c (cyg_hal_plf_serial_isr): Do not paranoically
175
        acknowledge spurious interrupts.  No need.
176
 
177
        * include/variant.inc: Add complete redefinitions of interrupt
178
        decoding to handle extended interrupt sources from the system
179
        controller's ISR/IMR registers.
180
 
181
        * include/var_intr.h: Add complete redefinitions of interrupt
182
        management to handle extended interrupt sources from the system
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        controller's ISR/IMR registers.
184
 
185
        * include/var_arch.h (S_ISR_ADR): Add ISR and IMR register
186
        addresses for use by assembly files.
187
 
188
        * include/plf_stub.h: Provide proto for cyg_hal_plf_comms_init()
189
        to reduce warning.
190
 
191
2001-06-26  Hugo Tyson  
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193
        * cdl/hal_mips_upd985xx.cdl: Remove src/var_stub.c - functionality
194
        is duplicated in the common HAL.
195
 
196
        * include/plf_stub.h: Remove a load of unneccessary cruft which is
197
        duplicated in the common HAL.
198
 
199
        * src/var_stub.c: Removed.
200
 
201
2001-06-26  Hugo Tyson  
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203
        * src/var_misc.c (hal_variant_init): Unmask the UART interrupt in
204
        the system controller - this is before the interrupt system in the
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        MIPS core which is used for dynamic control.
206
 
207
        Also removed a load of duplicate hal_ctrlc_isr/HAL_CTRLC_ISR stuff
208
        that fought with the common HAL,
209
 
210
        Asynchronous CTRL-C still does not work.  The interrupt asserts
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        forever.  This is similar to System Controller known bug S2
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        "Interrupt Mask Restriction" from the NEC docs.  Hence this code
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        in this file:
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        // *******************FIXME
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        // This causes an interrupt loop from the UART as soon as you do IO.
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        //    *S_IMR |= S_ISR_UARTIS; // unmask UART
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        // *******************NB we mask it here so that the status is in control
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        // *******************   of the application code whatever RedBoot does.
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            *S_IMR &=~S_ISR_UARTIS;
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        // *******************FIXME
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222
        * src/hal_diag.c (cyg_hal_plf_serial_isr): This now contains all
223
        it should need to.
224
        (cyg_hal_plf_serial_control): Ditto, all cases now supported.
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226
        CYGHWR_HAL_GDB_PORT_VECTOR use now unconditional, other tidyups.
227
        Bugfix to interrupt ack in nonblocking read, it was after the
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        return.
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230
        * cdl/hal_mips_upd985xx.cdl: We want to support ^Cm, so do not
231
        implement CYGINT_HAL_DEBUG_GDB_CTRLC_UNSUPPORTED.
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233
        * include/var_intr.h (HAL_READ_INTR_REGS): New macro, handy for
234
        debugging MIPS.  Also remove duplicate hal_ctrlc_isr/HAL_CTRLC_ISR
235
        stuff that fought with the common HAL, just leaving
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        CYGHWR_HAL_GDB_PORT_VECTOR defined.
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238
        * src/var_stub.c (hal_var_stub_init): Use symbols for entries in
239
        vector tables and the like.
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241
2001-06-22  Hugo Tyson  
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243
        * include/variant.inc: Use the proper target-agnostic config
244
        include CYGBLD_HAL_PLATFORM_H, and do not initialize the memory
245
        controller if you're told not to by the platform configuration
246
        CYGBLD_HAL_STARTUP_ROM_POST_OMIT_INITIALIZATION.
247
 
248
2001-06-22  Hugo Tyson  
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250
        * src/var_misc.c (hal_variant_init): Enable write-access to the
251
        flash area, and power-up the programming voltage via GPIO0, so
252
        that flash drivers can work.  Also enable the IBUS Arbiter so that
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        internal peripherals can work.
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255
        * src/variant.S (hal_memc_setup): Remove hal_memc_setup for RAM
256
        start; the work is done elsewhere.
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258
        * include/variant.inc (hal_memc_init): Don't call hal_memc_setup
259
        for RAM start.
260
 
261
2001-06-07  Hugo Tyson  
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263
        * include/variant.inc (hal_memc_init): Always do the memc call
264
        even in RAM start, to enable...
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266
        * src/variant.S (hal_memc_setup): Enable write-access to the flash
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        area so that flash drivers can work.
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269
2001-06-06  Hugo Tyson  
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271
        * include/var_cache.h (HAL_DCACHE_ENABLE_DEFINED): Add enough NOPs
272
        after diddling the cache-enability that it works.  Also give
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        correct (apparantly!) figures for cache size despite the
274
        documentation arguing with itself.
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276
        * src/var_misc.c (hal_variant_init): Enable the caches during
277
        startup.
278
 
279
        * include/var_arch.h: Add a very few definitions for use by
280
        assembler code here, and tidy up a little so that it can be used
281
        from .S files.  Specifically this is to let us init the RAM and
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        ROM access controllers from assembly.
283
 
284
        * src/variant.S:
285
        * include/variant.inc: Cut out some stuff we don't need that I had
286
        blindly copied from another platform.  Specifically we don't need
287
        to set up the TLB *at all* because all its space are belong, um,
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        all memory, IO and devices are accessible through kseg1 and kseg0.
289
        Added initial (untested) cut at setup of RAM/ROM controllers.
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291
2001-06-06  Hugo Tyson  
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293
        * cdl/hal_mips_upd985xx.cdl: Add implements statement for
294
        CYGINT_HAL_DEBUG_GDB_STUBS_BREAK, moved from the platform HAL.
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296
2001-06-05  Hugo Tyson  
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298
        * include/variant.inc: It all works rather better now...  fiddling
299
        with vector setup and cache initialization.
300
 
301
2001-06-05  Hugo Tyson  
302
 
303
        * cdl/hal_mips_upd985xx.cdl: to make GDB stubs work, implements
304
        CYGINT_HAL_MIPS_STUB_REPRESENT_32BIT_AS_64BIT.  Commented out
305
        implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED.
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307
        * include/hal_diag.h: Now it works, properly be dependent on
308
        CYGSEM_HAL_VIRTUAL_VECTOR_DIAG.
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310
        * include/plf_stub.h: Choose the right init routine dependent on
311
        CYGSEM_HAL_VIRTUAL_VECTOR_DIAG.
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313
        * src/hal_diag.c (hal_uart_init): Remove diagnostics and delays
314
        from initialization.
315
 
316
        * src/var_stub.c (hal_var_stub_init): Remove bogus definition of
317
        vsr_table and leave breakpoint VSR alone, the springboard will
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        handle it AOK.
319
 
320
2001-06-04  Hugo Tyson  
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322
        * cdl/hal_mips_upd985xx.cdl
323
        * include/hal_diag.h
324
        * include/plf_stub.h
325
        * include/var_arch.h
326
        * include/var_cache.h
327
        * include/var_intr.h
328
        * include/variant.inc
329
        * src/hal_diag.c
330
        * src/hal_mips_upd985xx.ld
331
        * src/var_misc.c
332
        * src/var_stub.c
333
        * src/variant.S
334
        New files; initial checkin.
335
 
336
        RAM startup works; kernel tests run, loaded via SRecords,
337
        including tm_basic, clockcnv, mutex3 and the exception tests.
338
        Virtual vector calling works, but all apps do not work with a ROM
339
        monitor, so they are all standalone.  Diag printf et all all work.
340
        Floating point emulation works.
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//===========================================================================
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// ####GPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// This program is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either version 2 or (at your option) any
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// later version.
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//
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// This program is distributed in the hope that it will be useful, but
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// WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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// General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program; if not, write to the
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// Free Software Foundation, Inc., 51 Franklin Street,
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// Fifth Floor, Boston, MA  02110-1301, USA.
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// -------------------------------------------
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// ####GPLCOPYRIGHTEND####
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//===========================================================================

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