OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [mn10300/] [asb/] [current/] [src/] [plf_misc.c] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
//==========================================================================
2
//
3
//      plf_misc.c
4
//
5
//      HAL platform miscellaneous functions
6
//
7
//==========================================================================
8
// ####ECOSGPLCOPYRIGHTBEGIN####                                            
9
// -------------------------------------------                              
10
// This file is part of eCos, the Embedded Configurable Operating System.   
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under    
14
// the terms of the GNU General Public License as published by the Free     
15
// Software Foundation; either version 2 or (at your option) any later      
16
// version.                                                                 
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT      
19
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
21
// for more details.                                                        
22
//
23
// You should have received a copy of the GNU General Public License        
24
// along with eCos; if not, write to the Free Software Foundation, Inc.,    
25
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
26
//
27
// As a special exception, if other files instantiate templates or use      
28
// macros or inline functions from this file, or you compile this file      
29
// and link it with other works to produce a work based on this file,       
30
// this file does not by itself cause the resulting work to be covered by   
31
// the GNU General Public License. However the source code for this file    
32
// must still be made available in accordance with section (3) of the GNU   
33
// General Public License v2.                                               
34
//
35
// This exception does not invalidate any other reasons why a work based    
36
// on this file might be covered by the GNU General Public License.         
37
// -------------------------------------------                              
38
// ####ECOSGPLCOPYRIGHTEND####                                              
39
//==========================================================================
40
//#####DESCRIPTIONBEGIN####
41
//
42
// Author(s):    dmoseley (based on the original by nickg)
43
// Contributors: nickg, jlarmour, dmoseley
44
// Date:         2000-08-11
45
// Purpose:      HAL miscellaneous functions
46
// Description:  This file contains miscellaneous functions provided by the
47
//               HAL.
48
//
49
//####DESCRIPTIONEND####
50
//
51
//========================================================================*/
52
 
53
#include <pkgconf/hal.h>
54
 
55
#include <cyg/infra/cyg_type.h>         // Base types
56
#include <cyg/infra/cyg_trac.h>         // tracing macros
57
#include <cyg/infra/cyg_ass.h>          // assertion macros
58
 
59
#include <cyg/hal/hal_arch.h>           // architectural definitions
60
 
61
#include <cyg/hal/hal_intr.h>           // Interrupt handling
62
 
63
#include <cyg/hal/hal_cache.h>          // Cache handling
64
 
65
#include <cyg/hal/hal_if.h>
66
 
67
#include <cyg/hal/plf_io.h>
68
 
69
/*------------------------------------------------------------------------*/
70
/* LED support                                                            */
71
cyg_uint8 led_val(CYG_WORD hexdig)
72
{
73
    static cyg_uint8 map[] = {
74
        0x81, // 0
75
        0xf3, // 1
76
        0x49, // 2
77
        0x61, // 3
78
        0x33, // 4
79
        0x25, // 5
80
        0x05, // 6
81
        0xf1, // 7
82
        0x01, // 8
83
        0x21, // 9
84
        0x11, // A
85
        0x07, // B
86
        0x8d, // C
87
        0x43, // D
88
        0x0d, // E
89
        0x1d  // F
90
    };
91
    return map[(hexdig & 0xF)];
92
}
93
 
94
/*------------------------------------------------------------------------*/
95
 
96
#include CYGHWR_MEMORY_LAYOUT_H
97
#if defined(CYGPKG_CYGMON)
98
extern unsigned long cygmon_memsize;
99
#endif
100
 
101
void hal_platform_init(void)
102
{
103
    HAL_WRITE_UINT8(HAL_LED_ADDRESS, led_val(8));
104
 
105
#if defined(CYG_HAL_STARTUP_ROM)
106
    // Note that the hardware seems to come up with the
107
    // caches containing random data. Hence they must be
108
    // invalidated before being enabled.
109
    // However, we only do this if we are in ROM. If we are
110
    // in RAM, then we leave the caches in the state chosen
111
    // by the ROM monitor. If we enable them when the monitor
112
    // is not expecting it, we can end up breaking things if the
113
    // monitor is not doing cache flushes.
114
 
115
    HAL_ICACHE_INVALIDATE_ALL();
116
    HAL_ICACHE_ENABLE();
117
    HAL_DCACHE_INVALIDATE_ALL();
118
    HAL_DCACHE_ENABLE();
119
#endif
120
 
121
#if defined(CYGPKG_CYGMON)
122
    cygmon_memsize = 16 * 1024 * 1024 - 0x200;  // 16 MB - 0x200 (for _hal_vsr_table and _hal_virtual_vector_table)
123
#endif
124
 
125
    // Set up eCos/ROM interfaces
126
    hal_if_init();
127
 
128
#if defined(CYGPKG_KERNEL)                      && \
129
    defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT)   && \
130
    defined(CYGSEM_HAL_USE_ROM_MONITOR_GDB_stubs)
131
    {
132
        extern CYG_ADDRESS hal_virtual_vector_table[32];
133
        extern void patch_dbg_syscalls(void * vector);
134
        patch_dbg_syscalls( (void *)(&hal_virtual_vector_table[0]) );
135
    }
136
#endif    
137
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
138
    {
139
        static void hal_ctrlc_isr_init(void);
140
        hal_ctrlc_isr_init();
141
    }
142
#endif    
143
 
144
#if 0
145
    // Make sure the TBR points at the base of ROM
146
    {
147
        #define TBR 0xC0000024
148
        cyg_uint32 TBR_val;
149
        HAL_READ_UINT32(TBR, TBR_val);
150
        TBR_val = (TBR_val & 0x00FFFFFF) | (CYGMEM_REGION_rom & 0xFF000000);
151
        HAL_WRITE_UINT32(TBR, TBR_val);
152
    }
153
 
154
    // Make sure the MTBR points at the base of ROM
155
    {
156
        #define mTBR 0xC0000028
157
        cyg_uint32 mTBR_val;
158
        HAL_READ_UINT32(mTBR, mTBR_val);
159
        mTBR_val = (mTBR_val & 0x00FFFFFF) | (CYGMEM_REGION_rom & 0xFF000000);
160
        HAL_WRITE_UINT32(mTBR, mTBR_val);
161
    }
162
#endif
163
}
164
 
165
/*------------------------------------------------------------------------*/
166
/* Functions to support the detection and execution of a user provoked    */
167
/* program break. These are usually called from interrupt routines.       */
168
 
169
/*------------------------------------------------------------------------*/
170
/* Control C ISR support                                                  */
171
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
172
 
173
#if CYGHWR_HAL_MN10300_AM33_STB_GDB_PORT == 0
174
 
175
// We use serial0 on AM33
176
#define SERIAL_CR       ((volatile cyg_uint16 *)0xd4002000)
177
#define SERIAL_ICR      ((volatile cyg_uint8 *) 0xd4002004)
178
#define SERIAL_TXR      ((volatile cyg_uint8 *) 0xd4002008)
179
#define SERIAL_RXR      ((volatile cyg_uint8 *) 0xd4002009)
180
#define SERIAL_SR       ((volatile cyg_uint16 *)0xd400200c)
181
 
182
// Timer 1 provided baud rate divisor
183
#define TIMER_MD       ((volatile cyg_uint8 *)0xd4003000)
184
#define TIMER_BR       ((volatile cyg_uint8 *)0xd4003010)
185
#define TIMER_CR       ((volatile cyg_uint8 *)0xd4003020)
186
 
187
#define SIO_LSTAT_TRDY  0x20
188
#define SIO_LSTAT_RRDY  0x10
189
 
190
#else
191
 
192
#error Unsupported GDB port
193
 
194
#endif
195
 
196
struct Hal_SavedRegisters *hal_saved_interrupt_state;
197
 
198
static void hal_ctrlc_isr_init(void)
199
{
200
//    cyg_uint16 cr;
201
 
202
//    HAL_READ_UINT16( SERIAL_CR, cr );
203
//    cr |= LCR_RXE;
204
//    HAL_WRITE_UINT16( SERIAL_CR, cr );
205
    HAL_INTERRUPT_SET_LEVEL( CYGHWR_HAL_GDB_PORT_VECTOR, 4 );
206
    HAL_INTERRUPT_UNMASK( CYGHWR_HAL_GDB_PORT_VECTOR );
207
}
208
 
209
cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
210
{
211
    char c;
212
    cyg_uint16 sr;
213
 
214
    HAL_INTERRUPT_ACKNOWLEDGE( CYGHWR_HAL_GDB_PORT_VECTOR );
215
 
216
    HAL_READ_UINT16( SERIAL_SR, sr );
217
 
218
    if( sr & SIO_LSTAT_RRDY )
219
    {
220
        HAL_READ_UINT8( SERIAL_RXR, c);
221
 
222
        if( cyg_hal_is_break( &c , 1 ) )
223
            cyg_hal_user_break( (CYG_ADDRWORD *)hal_saved_interrupt_state );
224
 
225
 
226
    }
227
    return 1;
228
}
229
 
230
#endif
231
 
232
void hal_arch_funcall_new_stack(void (*func)(void), void* stack_base, cyg_uint32 stack_size)
233
{
234
    register cyg_uint32 stack_top = (cyg_uint32)stack_base + stack_size;
235
    register cyg_uint32 old_stack;
236
    asm volatile (" mov sp, %0" : "=r" (old_stack) : );
237
    asm volatile (" mov %0, sp" : : "r" (stack_top) );
238
    func();
239
    asm volatile (" mov %0, sp" : : "r" (old_stack) );
240
}
241
 
242
/*------------------------------------------------------------------------*/
243
/* Syscall support                                                        */
244
#ifdef CYGPKG_CYGMON
245
// Cygmon provides syscall handling for this board
246
#include <cyg/hal/hal_stub.h>
247
int __get_syscall_num (void)
248
{
249
    return SIGSYS;
250
}
251
#endif
252
 
253
/*------------------------------------------------------------------------*/
254
/* End of plf_misc.c                                                      */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.