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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [mn10300/] [stdeval1/] [current/] [src/] [hal_diag.c] - Blame information for rev 786

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1 786 skrzyp
/*=============================================================================
2
//
3
//      hal_diag.c
4
//
5
//      HAL diagnostic output code
6
//
7
//=============================================================================
8
// ####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later
16
// version.
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT
19
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
// for more details.
22
//
23
// You should have received a copy of the GNU General Public License
24
// along with eCos; if not, write to the Free Software Foundation, Inc.,
25
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
26
//
27
// As a special exception, if other files instantiate templates or use
28
// macros or inline functions from this file, or you compile this file
29
// and link it with other works to produce a work based on this file,
30
// this file does not by itself cause the resulting work to be covered by
31
// the GNU General Public License. However the source code for this file
32
// must still be made available in accordance with section (3) of the GNU
33
// General Public License v2.
34
//
35
// This exception does not invalidate any other reasons why a work based
36
// on this file might be covered by the GNU General Public License.
37
// -------------------------------------------
38
// ####ECOSGPLCOPYRIGHTEND####
39
//=============================================================================
40
//#####DESCRIPTIONBEGIN####
41
//
42
// Author(s):   nickg
43
// Contributors:        nickg
44
// Date:        1998-03-02
45
// Purpose:     HAL diagnostic output
46
// Description: Implementations of HAL diagnostic output support.
47
//
48
//####DESCRIPTIONEND####
49
//
50
//===========================================================================*/
51
 
52
#include <pkgconf/hal.h>
53
 
54
#include <cyg/infra/cyg_type.h>          // base types
55
#include <cyg/infra/cyg_trac.h>         // tracing macros
56
#include <cyg/infra/cyg_ass.h>          // assertion macros
57
 
58
#include <cyg/hal/hal_diag.h>
59
#include <cyg/hal/hal_intr.h>
60
 
61
/*---------------------------------------------------------------------------*/
62
/* Select default diag channel to use                                        */
63
 
64
//#define CYG_KERNEL_DIAG_ROMART
65
//#define CYG_KERNEL_DIAG_SERIAL1
66
//#define CYG_KERNEL_DIAG_SERIAL2
67
//#define CYG_KERNEL_DIAG_GDB
68
 
69
#if !defined(CYG_KERNEL_DIAG_SERIAL1) && \
70
    !defined(CYG_KERNEL_DIAG_SERIAL2) && \
71
    !defined(CYG_KERNEL_DIAG_ROMART)
72
 
73
# if defined(CYG_HAL_MN10300_AM31_STDEVAL1)
74
 
75
#  if defined(CYG_HAL_STARTUP_RAM)
76
 
77
#   if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
78
 
79
     // If loaded into RAM via CYGMON we diag via
80
     // serial 2 using GDB protocol
81
 
82
#    define CYG_KERNEL_DIAG_SERIAL2
83
#    define CYG_KERNEL_DIAG_GDB
84
 
85
#   elif defined(CYGSEM_HAL_USE_ROM_MONITOR_Sload)
86
 
87
     // If loaded into RAM via SLOAD we diag via
88
     // serial 1
89
 
90
#    define CYG_KERNEL_DIAG_SERIAL1
91
 
92
#   elif defined(CYGSEM_HAL_USE_ROM_MONITOR_GDB_stubs)
93
 
94
     // If loaded into RAM via GDB STUB ROM we diag via
95
     // serial 1 using GDB protocol
96
 
97
#    define CYG_KERNEL_DIAG_SERIAL1
98
#    define CYG_KERNEL_DIAG_GDB
99
 
100
#   endif // defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
101
 
102
#  elif defined(CYG_HAL_STARTUP_ROM)
103
 
104
    // If we are ROM resident, we diag via serial 1
105
 
106
#  define CYG_KERNEL_DIAG_SERIAL1
107
 
108
#  endif // defined(CYG_HAL_STARTUP_RAM)
109
 
110
# endif // defined(CYG_HAL_MN10300_AM31_STDEVAL1)
111
 
112
#endif // if ...
113
 
114
/*---------------------------------------------------------------------------*/
115
// PromICE AI interface
116
 
117
#if defined(CYG_HAL_MN10300_STDEVAL1_ROMART) || defined(CYG_KERNEL_DIAG_ROMART)
118
 
119
#ifdef CYG_HAL_MN10300_AM31_STDEVAL1
120
#define PROMICE_AILOC           0x40008000
121
#endif
122
 
123
#define PROMICE_BUS_SIZE        16
124
#define PROMICE_BURST_SIZE      1
125
 
126
#if PROMICE_BUS_SIZE == 16
127
 
128
typedef volatile struct
129
{
130
    volatile cyg_uint16 zero;
131
//    cyg_uint16          pad1[PROMICE_BURST_SIZE];
132
    volatile cyg_uint16 one;
133
//    cyg_uint16          pad2[PROMICE_BURST_SIZE];
134
    volatile cyg_uint16 data;
135
//    cyg_uint16          pad3[PROMICE_BURST_SIZE];
136
    volatile cyg_uint16 status;
137
 
138
} AISTRUCT;
139
 
140
#endif
141
 
142
AISTRUCT *AI = (AISTRUCT *)PROMICE_AILOC;
143
 
144
#define PROMICE_STATUS_TDA      0x01
145
#define PROMICE_STATUS_HDA      0x02
146
#define PROMICE_STATUS_OVR      0x04
147
 
148
 
149
void ai_diag_init()
150
{
151
    volatile cyg_uint8 junk;
152
 
153
    while( AI->status == 0xCC )
154
        continue;
155
 
156
    junk = AI->data;
157
}
158
 
159
static void ai_write_char(cyg_uint8 data)
160
{
161
    volatile cyg_uint8 junk;
162
    int i;
163
 
164
    // Wait for tda == 0
165
    while( (AI->status & PROMICE_STATUS_TDA) == PROMICE_STATUS_TDA )
166
        continue;
167
 
168
    // Send start bit
169
    junk = AI->one;
170
 
171
    for( i = 0; i < 8; i++ )
172
    {
173
        // send ls bit of data
174
        if( (data & 1) == 1 )
175
            junk = AI->one;
176
        else
177
            junk = AI->zero;
178
 
179
        // shift down for next bit
180
        data >>= 1;
181
    }
182
 
183
    // Send stop bit
184
    junk = AI->one;
185
 
186
    // all done
187
}
188
 
189
void ai_diag_write_char(char c)
190
{
191
    ai_write_char((cyg_uint8)c);
192
}
193
 
194
void ai_diag_drain() {}
195
 
196
void ai_diag_read_char(char *c) { *c = '\n'; }
197
 
198
void ai_writes(char *s)
199
{
200
    while( *s ) ai_write_char( *s++ );
201
}
202
 
203
void ai_write_hex( cyg_uint32 x)
204
{
205
    int i;
206
    ai_writes("0x");
207
    for( i = 28; i >=0 ; i-=4 )
208
    {
209
        char *d = "0123456789ABCDEF";
210
        ai_write_char( d[(x>>i)&0xf] );
211
    }
212
    ai_write_char(' ');
213
}
214
 
215
#if defined(CYG_KERNEL_DIAG_ROMART)
216
 
217
#define hal_diag_init_serial ai_diag_init
218
#define hal_diag_write_char_serial ai_diag_write_char
219
#define hal_diag_drain_serial ai_diag_drain
220
#define hal_diag_read_char_serial ai_diag_read_char
221
 
222
#endif
223
 
224
#endif
225
 
226
/*---------------------------------------------------------------------------*/
227
// MN10300 Serial line
228
 
229
#if defined(CYG_HAL_MN10300_STDEVAL1_SERIAL1) || defined(CYG_KERNEL_DIAG_SERIAL1)
230
 
231
// We use serial1 on MN103002
232
#define SERIAL1_CR       ((volatile cyg_uint16 *)0x34000810)
233
#define SERIAL1_ICR      ((volatile cyg_uint8 *) 0x34000814)
234
#define SERIAL1_TXR      ((volatile cyg_uint8 *) 0x34000818)
235
#define SERIAL1_RXR      ((volatile cyg_uint8 *) 0x34000819)
236
#define SERIAL1_SR       ((volatile cyg_uint16 *)0x3400081c)
237
 
238
// Timer 1 provided baud rate divisor
239
#define TIMER1_MD       ((volatile cyg_uint8 *)0x34001001)
240
#define TIMER1_BR       ((volatile cyg_uint8 *)0x34001011)
241
#define TIMER1_CR       ((volatile cyg_uint8 *)0x34001021)
242
 
243
#define PORT3_MD        ((volatile cyg_uint8 *)0x36008025)
244
 
245
// Mystery register
246
#define TMPSCNT         ((volatile cyg_uint8 *)0x34001071)
247
 
248
#define SIO1_LSTAT_TRDY  0x20
249
#define SIO1_LSTAT_RRDY  0x10
250
 
251
void hal_diag_init_serial1(void)
252
{
253
    // 48 translates to 38400 baud.
254
    *TIMER1_BR = 48;
255
 
256
    // Timer1 sourced from IOCLK
257
    *TIMER1_MD = 0x80;
258
 
259
    // Mode on PORT3, used for serial line controls.
260
    *PORT3_MD = 0x01;
261
 
262
    // No interrupts for now.
263
    *SERIAL1_ICR = 0x00;
264
 
265
    // Source from timer 1, 8bit chars, enable tx and rx
266
    *SERIAL1_CR = 0xc084;
267
}
268
 
269
void hal_diag_write_char_serial1(char c)
270
{
271
    register volatile cyg_uint16 *volatile tty_status = SERIAL1_SR;
272
    register volatile cyg_uint8 *volatile tty_tx = SERIAL1_TXR;
273
 
274
    while( (*tty_status & SIO1_LSTAT_TRDY) != 0 ) continue;
275
 
276
    *tty_tx = c;
277
}
278
 
279
void hal_diag_drain_serial1(void)
280
{
281
    register volatile cyg_uint16 *volatile tty_status = SERIAL1_SR;
282
 
283
    while( (*tty_status & SIO1_LSTAT_TRDY) != 0 ) continue;
284
}
285
 
286
void hal_diag_read_char_serial1(char *c)
287
{
288
    register volatile cyg_uint16 *volatile tty_status = SERIAL1_SR;
289
    register volatile cyg_uint8 *volatile tty_rx = SERIAL1_RXR;
290
 
291
    while( (*tty_status & SIO1_LSTAT_RRDY) == 0 ) continue;
292
 
293
    *c = *tty_rx;
294
 
295
    // We must ack the interrupt caused by that read to avoid
296
    // confusing cygmon.
297
    HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_SERIAL_1_RX );
298
}
299
 
300
#if defined(CYG_KERNEL_DIAG_SERIAL1)
301
 
302
#define hal_diag_init_serial hal_diag_init_serial1
303
#define hal_diag_write_char_serial hal_diag_write_char_serial1
304
#define hal_diag_drain_serial hal_diag_drain_serial1
305
#define hal_diag_read_char_serial hal_diag_read_char_serial1
306
 
307
#endif
308
 
309
#endif
310
 
311
#if defined(CYG_HAL_MN10300_AM31_STDEVAL1)
312
 
313
void led(int x)
314
{
315
    *((cyg_uint8 *)0x36008004) = x<<4;
316
}
317
 
318
#endif
319
 
320
 
321
/*---------------------------------------------------------------------------*/
322
 
323
#if defined(CYG_HAL_MN10300_STDEVAL1_SERIAL2) || defined(CYG_KERNEL_DIAG_SERIAL2)
324
 
325
// We use serial2 on MN103002
326
#define SERIAL2_CR       ((volatile cyg_uint16 *)0x34000820)
327
#define SERIAL2_ICR      ((volatile cyg_uint8 *) 0x34000824)
328
#define SERIAL2_TXR      ((volatile cyg_uint8 *) 0x34000828)
329
#define SERIAL2_RXR      ((volatile cyg_uint8 *) 0x34000829)
330
#define SERIAL2_SR       ((volatile cyg_uint8 *)0x3400082c)
331
#define SERIAL2_TR       ((volatile cyg_uint8 *)0x3400082d)
332
 
333
// Timer 2 provided baud rate divisor
334
#define TIMER2_MD       ((volatile cyg_uint8 *)0x34001002)
335
#define TIMER2_BR       ((volatile cyg_uint8 *)0x34001012)
336
#define TIMER2_CR       ((volatile cyg_uint8 *)0x34001022)
337
 
338
#define PORT3_MD        ((volatile cyg_uint8 *)0x36008025)
339
 
340
// Mystery register
341
#define TMPSCNT         ((volatile cyg_uint8 *)0x34001071)
342
 
343
#define SIO2_LSTAT_TRDY  0x20
344
#define SIO2_LSTAT_RRDY  0x10
345
 
346
void hal_diag_init_serial2(void)
347
{
348
#if !defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
349
 
350
    // 16 and 22 translate to 38400 baud.
351
    *TIMER2_BR = 16;
352
    *SERIAL2_TR = 22;
353
 
354
    // Timer2 sourced from IOCLK
355
    *TIMER2_MD = 0x80;
356
 
357
    // Mode on PORT3, used for serial line controls.
358
    *PORT3_MD = 0x01;
359
 
360
    // No interrupts for now.
361
    *SERIAL2_ICR = 0x00;
362
 
363
    // Source from timer 2, 8bit chars, enable tx and rx
364
    *SERIAL2_CR = 0xc081;
365
 
366
#endif    
367
}
368
 
369
void hal_diag_write_char_serial2(char c)
370
{
371
    register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR;
372
    register volatile cyg_uint8 *volatile tty_tx = SERIAL2_TXR;
373
 
374
    while( (*tty_status & SIO2_LSTAT_TRDY) != 0 ) continue;
375
 
376
    *tty_tx = c;
377
}
378
 
379
void hal_diag_drain_serial2(void)
380
{
381
    register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR;
382
 
383
    while( (*tty_status & SIO2_LSTAT_TRDY) != 0 ) continue;
384
}
385
 
386
void hal_diag_read_char_serial2(char *c)
387
{
388
    register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR;
389
    register volatile cyg_uint8 *volatile tty_rx = SERIAL2_RXR;
390
 
391
    while( (*tty_status & SIO2_LSTAT_RRDY) == 0 ) continue;
392
 
393
    *c = *tty_rx;
394
 
395
#if !defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)    
396
    // We must ack the interrupt caused by that read to avoid
397
    // confusing the stubs.
398
    HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_SERIAL_2_RX );
399
#endif
400
}
401
 
402
#if defined(CYG_KERNEL_DIAG_SERIAL2)
403
 
404
#define hal_diag_init_serial hal_diag_init_serial2
405
#define hal_diag_write_char_serial hal_diag_write_char_serial2
406
#define hal_diag_drain_serial hal_diag_drain_serial2
407
#define hal_diag_read_char_serial hal_diag_read_char_serial2
408
 
409
#endif
410
 
411
#endif
412
 
413
/*---------------------------------------------------------------------------*/
414
 
415
void hal_diag_init(void)
416
{
417
    hal_diag_init_serial();
418
}
419
 
420
void hal_diag_write_char(char c)
421
{
422
#ifdef CYG_KERNEL_DIAG_GDB
423
 
424
    static char line[100];
425
    static int pos = 0;
426
 
427
    // No need to send CRs
428
    if( c == '\r' ) return;
429
 
430
    line[pos++] = c;
431
 
432
    if( c == '\n' || pos == sizeof(line) )
433
    {
434
        // Disable interrupts. This prevents GDB trying to interrupt us
435
        // while we are in the middle of sending a packet. The serial
436
        // receive interrupt will be seen when we re-enable interrupts
437
        // later.
438
 
439
        CYG_INTERRUPT_STATE oldstate;
440
        CYG_BYTE wdcr;
441
        HAL_DISABLE_INTERRUPTS(oldstate);
442
 
443
        // Beacuse of problems with NT on the testfarm, we also have
444
        // to disable the watchdog here. This only matters in the
445
        // watchdog tests. And yes, this sends my irony meter off the
446
        // scale too.
447
 
448
        HAL_READ_UINT8( 0x34004002, wdcr );
449
        HAL_WRITE_UINT8( 0x34004002, wdcr&0x3F );
450
 
451
        while(1)
452
        {
453
            static char hex[] = "0123456789ABCDEF";
454
            cyg_uint8 csum = 0;
455
            int i;
456
 
457
            hal_diag_write_char_serial('$');
458
            hal_diag_write_char_serial('O');
459
            csum += 'O';
460
            for( i = 0; i < pos; i++ )
461
            {
462
                char ch = line[i];
463
                char h = hex[(ch>>4)&0xF];
464
                char l = hex[ch&0xF];
465
                hal_diag_write_char_serial(h);
466
                hal_diag_write_char_serial(l);
467
                csum += h;
468
                csum += l;
469
            }
470
            hal_diag_write_char_serial('#');
471
            hal_diag_write_char_serial(hex[(csum>>4)&0xF]);
472
            hal_diag_write_char_serial(hex[csum&0xF]);
473
 
474
#if !defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
475
            {
476
                char c1;
477
 
478
                hal_diag_read_char_serial( &c1 );
479
 
480
                if( c1 == '+' ) break;
481
 
482
                if( cyg_hal_is_break( &c1, 1 ) )
483
                    cyg_hal_user_break( NULL );
484
 
485
            }
486
#else
487
            // When using Cygmon, the ack character is absorbed by cygmon's
488
            // serial interrupt handler that is looking for Ctrl-Cs.
489
            break;
490
#endif
491
        }
492
 
493
        pos = 0;
494
 
495
        // Wait for tx buffer to drain
496
        hal_diag_drain_serial();
497
 
498
        // And re-enable interrupts
499
        HAL_RESTORE_INTERRUPTS(oldstate);
500
        HAL_WRITE_UINT8( 0x34004002, wdcr );
501
 
502
    }
503
 
504
#else
505
    hal_diag_write_char_serial(c);
506
#endif    
507
}
508
 
509
 
510
 
511
 
512
void hal_diag_read_char(char *c)
513
{
514
    hal_diag_read_char_serial(c);
515
}
516
 
517
 
518
/*---------------------------------------------------------------------------*/
519
/* End of hal_diag.c */

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