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##=============================================================================##
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## context.S
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##
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## OpenRISC context switch code
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##
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##=============================================================================
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## ####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later
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## version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with eCos; if not, write to the Free Software Foundation, Inc.,
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## 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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##
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## As a special exception, if other files instantiate templates or use
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## macros or inline functions from this file, or you compile this file
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## and link it with other works to produce a work based on this file,
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## this file does not by itself cause the resulting work to be covered by
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## the GNU General Public License. However the source code for this file
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## must still be made available in accordance with section (3) of the GNU
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## General Public License v2.
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##
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## This exception does not invalidate any other reasons why a work based
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## on this file might be covered by the GNU General Public License.
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## -------------------------------------------
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## ####ECOSGPLCOPYRIGHTEND####
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##=============================================================================
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#######DESCRIPTIONBEGIN####
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##
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## Author(s): Scott Furman
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## Contributors:Piotr Skrzypek (pskrzypek@antmicro.com)
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## Date: 2003-01-21
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## Purpose: OpenRISC context switch code
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## Description: This file contains implementations of the thread context
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## switch routines. It also contains the longjmp() and setjmp()
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## routines.
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##
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######DESCRIPTIONEND####
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##
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##=============================================================================
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#include
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#include
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#include
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#------------------------------------------------------------------------------
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# hal_thread_switch_context()
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# Switch thread contexts
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# R3 = address of sp of next thread to execute
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# R4 = address of sp save location of current thread
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FUNC_START(hal_thread_switch_context)
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l.addi sp,sp,-SIZEOF_OR1KREGS # space for registers
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# Store General Purpose Registers (GPRs).
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l.sw 2 * OR1K_GPRSIZE(sp), r2
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l.sw 9 * OR1K_GPRSIZE(sp), r9
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l.sw 10 * OR1K_GPRSIZE(sp), r10
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l.sw 14 * OR1K_GPRSIZE(sp), r14
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l.sw 16 * OR1K_GPRSIZE(sp), r16
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l.sw 18 * OR1K_GPRSIZE(sp), r18
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l.sw 20 * OR1K_GPRSIZE(sp), r20
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l.sw 22 * OR1K_GPRSIZE(sp), r22
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l.sw 24 * OR1K_GPRSIZE(sp), r24
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l.sw 26 * OR1K_GPRSIZE(sp), r26
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l.sw 28 * OR1K_GPRSIZE(sp), r28
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l.sw 30 * OR1K_GPRSIZE(sp), r30
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#ifndef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
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# R0 is not typically stored because it is always zero-valued,
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# but we store it here for consistency when examining registers
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# in the debugger.
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l.sw 0 * OR1K_GPRSIZE(sp), r0
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# Caller-saved temporary regs don't need to be preserved across
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# context switches, but we do so to make debugging easier.
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l.sw 3 * OR1K_GPRSIZE(sp), r3
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l.sw 4 * OR1K_GPRSIZE(sp), r4
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l.sw 5 * OR1K_GPRSIZE(sp), r5
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l.sw 6 * OR1K_GPRSIZE(sp), r6
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l.sw 7 * OR1K_GPRSIZE(sp), r7
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l.sw 8 * OR1K_GPRSIZE(sp), r8
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l.sw 11 * OR1K_GPRSIZE(sp), r11
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skrzyp |
l.sw 12 * OR1K_GPRSIZE(sp), r12
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l.sw 13 * OR1K_GPRSIZE(sp), r13
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l.sw 15 * OR1K_GPRSIZE(sp), r15
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l.sw 17 * OR1K_GPRSIZE(sp), r17
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l.sw 19 * OR1K_GPRSIZE(sp), r19
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l.sw 21 * OR1K_GPRSIZE(sp), r21
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l.sw 23 * OR1K_GPRSIZE(sp), r23
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l.sw 25 * OR1K_GPRSIZE(sp), r25
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l.sw 27 * OR1K_GPRSIZE(sp), r27
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l.sw 29 * OR1K_GPRSIZE(sp), r29
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l.sw 31 * OR1K_GPRSIZE(sp), r31
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790 |
skrzyp |
#endif
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786 |
skrzyp |
# save MAC LO and HI regs
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l.mfspr r5,r0,SPR_MACLO
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l.sw OR1KREG_MACLO(sp),r5
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l.mfspr r5,r0,SPR_MACHI
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l.sw OR1KREG_MACHI(sp),r5
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#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
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# Make the thread context look like an exception context if thread-
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# aware debugging is required. This state does not need restoring.
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l.sw OR1KREG_PC(sp),r9
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#endif
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l.addi r5,sp,SIZEOF_OR1KREGS # save SP in reg dump
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l.sw 1 * OR1K_GPRSIZE(sp), r5
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l.mfspr r5,r0,SPR_SR # save SR in reg dump
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l.sw OR1KREG_SR(sp), r5
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# Return resulting new SP to caller via second argument
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l.sw 0(r4), sp
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# Now load the destination thread by dropping through
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# to hal_thread_load_context...
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FUNC_END(hal_thread_switch_context)
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#------------------------------------------------------------------------------
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# hal_thread_load_context()
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# Load thread context
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# R3 = address of sp of next thread to execute
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# Note that this function is also the second half of hal_thread_switch_context()
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# and is simply dropped into from it.
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FUNC_START(hal_thread_load_context)
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# Copy R3 to SP
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l.lwz sp, 0(r3)
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# Restore General Purpose Registers (GPRs).
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# R0 is not restored because it is always zero-valued.
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l.lwz r2, 2 * OR1K_GPRSIZE(sp)
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l.lwz r9, 9 * OR1K_GPRSIZE(sp)
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l.lwz r10, 10 * OR1K_GPRSIZE(sp)
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l.lwz r14, 14 * OR1K_GPRSIZE(sp)
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l.lwz r16, 16 * OR1K_GPRSIZE(sp)
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l.lwz r18, 18 * OR1K_GPRSIZE(sp)
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l.lwz r20, 20 * OR1K_GPRSIZE(sp)
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l.lwz r22, 22 * OR1K_GPRSIZE(sp)
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l.lwz r24, 24 * OR1K_GPRSIZE(sp)
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l.lwz r26, 26 * OR1K_GPRSIZE(sp)
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l.lwz r28, 28 * OR1K_GPRSIZE(sp)
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l.lwz r30, 30 * OR1K_GPRSIZE(sp)
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# Merge interrupt-enable state of new thread into
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# current SR
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load32i r5,~(SPR_SR_TEE|SPR_SR_IEE)
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l.mfspr r6, r0, SPR_SR
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l.and r6, r5, r6
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l.lwz r5, OR1KREG_SR(sp)
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l.andi r5, r5, (SPR_SR_TEE|SPR_SR_IEE)
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l.or r5, r5, r6
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l.mtspr r0, r5, SPR_SR
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# Restore MAC LO and HI regs
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l.lwz r5, OR1KREG_MACLO(sp)
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l.mtspr r0,r5,SPR_MACLO
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l.lwz r5, OR1KREG_MACHI(sp)
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l.mtspr r0,r5,SPR_MACHI
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790 |
skrzyp |
#ifndef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
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# Caller-saved temporary regs don't need to be preserved across
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# context switches, but we do so here to make debugging
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# easier.
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skrzyp |
l.lwz r4, 4 * OR1K_GPRSIZE(sp)
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l.lwz r5, 5 * OR1K_GPRSIZE(sp)
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l.lwz r6, 6 * OR1K_GPRSIZE(sp)
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l.lwz r7, 7 * OR1K_GPRSIZE(sp)
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l.lwz r8, 8 * OR1K_GPRSIZE(sp)
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l.lwz r11, 11 * OR1K_GPRSIZE(sp)
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l.lwz r12, 12 * OR1K_GPRSIZE(sp)
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l.lwz r13, 13 * OR1K_GPRSIZE(sp)
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l.lwz r15, 15 * OR1K_GPRSIZE(sp)
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l.lwz r17, 17 * OR1K_GPRSIZE(sp)
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l.lwz r19, 19 * OR1K_GPRSIZE(sp)
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l.lwz r21, 21 * OR1K_GPRSIZE(sp)
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l.lwz r23, 23 * OR1K_GPRSIZE(sp)
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l.lwz r25, 25 * OR1K_GPRSIZE(sp)
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l.lwz r27, 27 * OR1K_GPRSIZE(sp)
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l.lwz r29, 29 * OR1K_GPRSIZE(sp)
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l.lwz r31, 31 * OR1K_GPRSIZE(sp)
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#endif
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# If this is the first time we're running a thread, R3
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# contains the argument to the thread entry point function,
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# So we always have to restore it even though it's a callee-saved
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# register.
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l.lwz r3, 3 * OR1K_GPRSIZE(sp)
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# Finally, restore target thread's true SP
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l.lwz sp, 1 * OR1K_GPRSIZE(sp)
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l.jr lr
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l.nop # delay slot - must be nop
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FUNC_END(hal_thread_load_context)
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#------------------------------------------------------------------------------
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# HAL longjmp, setjmp implementations
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# hal_setjmp saves only callee-saved registers into buffer supplied in r3:
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# 1,2,9,10,13,15,17,19,21,23,25,27,29,31
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# Note: These definitions are repeated in hal_arch.h. If changes are required
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# remember to update both sets.
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#define CYGARC_JMP_BUF_R1 0
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#define CYGARC_JMP_BUF_R2 1
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#define CYGARC_JMP_BUF_R9 2
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#define CYGARC_JMP_BUF_R10 3
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#define CYGARC_JMP_BUF_R12 4
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#define CYGARC_JMP_BUF_R14 5
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#define CYGARC_JMP_BUF_R16 6
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#define CYGARC_JMP_BUF_R18 7
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#define CYGARC_JMP_BUF_R20 8
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#define CYGARC_JMP_BUF_R22 9
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#define CYGARC_JMP_BUF_R24 10
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#define CYGARC_JMP_BUF_R26 11
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#define CYGARC_JMP_BUF_R28 12
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#define CYGARC_JMP_BUF_R30 13
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#define CYGARC_JMP_BUF_SIZE 14
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#define jmpbuf_regsize 4
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FUNC_START(hal_setjmp)
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# Store General Purpose Registers (GPRs).
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# R0 is not stored because it is always zero-valued.
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# Caller-saved registers are not stored
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l.sw CYGARC_JMP_BUF_R1 * OR1K_GPRSIZE(r3), r1
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l.sw CYGARC_JMP_BUF_R2 * OR1K_GPRSIZE(r3), r2
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l.sw CYGARC_JMP_BUF_R9 * OR1K_GPRSIZE(r3), r9
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l.sw CYGARC_JMP_BUF_R10 * OR1K_GPRSIZE(r3), r10
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l.sw CYGARC_JMP_BUF_R12 * OR1K_GPRSIZE(r3), r12
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l.sw CYGARC_JMP_BUF_R14 * OR1K_GPRSIZE(r3), r14
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l.sw CYGARC_JMP_BUF_R16 * OR1K_GPRSIZE(r3), r16
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l.sw CYGARC_JMP_BUF_R18 * OR1K_GPRSIZE(r3), r18
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l.sw CYGARC_JMP_BUF_R20 * OR1K_GPRSIZE(r3), r20
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l.sw CYGARC_JMP_BUF_R22 * OR1K_GPRSIZE(r3), r22
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l.sw CYGARC_JMP_BUF_R24 * OR1K_GPRSIZE(r3), r24
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l.sw CYGARC_JMP_BUF_R26 * OR1K_GPRSIZE(r3), r26
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l.sw CYGARC_JMP_BUF_R28 * OR1K_GPRSIZE(r3), r28
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l.sw CYGARC_JMP_BUF_R30 * OR1K_GPRSIZE(r3), r30
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l.movhi rv, 0
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l.jr lr
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l.nop # delay slot
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FUNC_END(hal_setjmp)
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FUNC_START(hal_longjmp)
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l.lwz r1, CYGARC_JMP_BUF_R1 * OR1K_GPRSIZE(r3)
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l.lwz r2, CYGARC_JMP_BUF_R2 * OR1K_GPRSIZE(r3)
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l.lwz r9, CYGARC_JMP_BUF_R9 * OR1K_GPRSIZE(r3)
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l.lwz r10, CYGARC_JMP_BUF_R10 * OR1K_GPRSIZE(r3)
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l.lwz r12, CYGARC_JMP_BUF_R12 * OR1K_GPRSIZE(r3)
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l.lwz r14, CYGARC_JMP_BUF_R14 * OR1K_GPRSIZE(r3)
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l.lwz r16, CYGARC_JMP_BUF_R16 * OR1K_GPRSIZE(r3)
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l.lwz r18, CYGARC_JMP_BUF_R18 * OR1K_GPRSIZE(r3)
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| 283 |
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l.lwz r20, CYGARC_JMP_BUF_R20 * OR1K_GPRSIZE(r3)
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l.lwz r22, CYGARC_JMP_BUF_R22 * OR1K_GPRSIZE(r3)
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| 285 |
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l.lwz r24, CYGARC_JMP_BUF_R24 * OR1K_GPRSIZE(r3)
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| 286 |
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l.lwz r26, CYGARC_JMP_BUF_R26 * OR1K_GPRSIZE(r3)
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| 287 |
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|
l.lwz r28, CYGARC_JMP_BUF_R28 * OR1K_GPRSIZE(r3)
|
| 288 |
|
|
l.lwz r30, CYGARC_JMP_BUF_R30 * OR1K_GPRSIZE(r3)
|
| 289 |
|
|
l.movhi rv, 0
|
| 290 |
|
|
l.or rv, rv, r4
|
| 291 |
|
|
l.jr lr
|
| 292 |
|
|
l.nop # delay slot
|
| 293 |
|
|
FUNC_END(hal_longjmp)
|
| 294 |
|
|
|
| 295 |
|
|
|
| 296 |
|
|
#------------------------------------------------------------------------------
|
| 297 |
|
|
# end of context.S
|
