OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [powerpc/] [adder/] [current/] [cdl/] [hal_powerpc_adder.cdl] - Blame information for rev 838

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
# ====================================================================
2
#
3
#      hal_powerpc_adder.cdl
4
#
5
#      PowerPC/ADDER board HAL package configuration data
6
#
7
# ====================================================================
8
## ####ECOSGPLCOPYRIGHTBEGIN####
9
## -------------------------------------------
10
## This file is part of eCos, the Embedded Configurable Operating System.
11
## Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
12
##
13
## eCos is free software; you can redistribute it and/or modify it under
14
## the terms of the GNU General Public License as published by the Free
15
## Software Foundation; either version 2 or (at your option) any later
16
## version.
17
##
18
## eCos is distributed in the hope that it will be useful, but WITHOUT
19
## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
## for more details.
22
##
23
## You should have received a copy of the GNU General Public License
24
## along with eCos; if not, write to the Free Software Foundation, Inc.,
25
## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
26
##
27
## As a special exception, if other files instantiate templates or use
28
## macros or inline functions from this file, or you compile this file
29
## and link it with other works to produce a work based on this file,
30
## this file does not by itself cause the resulting work to be covered by
31
## the GNU General Public License. However the source code for this file
32
## must still be made available in accordance with section (3) of the GNU
33
## General Public License v2.
34
##
35
## This exception does not invalidate any other reasons why a work based
36
## on this file might be covered by the GNU General Public License.
37
## -------------------------------------------
38
## ####ECOSGPLCOPYRIGHTEND####
39
# ====================================================================
40
######DESCRIPTIONBEGIN####
41
#
42
# Author(s):      jskov
43
# Original data:  hmt
44
# Contributors:   gthomas
45
# Date:           1999-11-02
46
#
47
#####DESCRIPTIONEND####
48
#
49
# ====================================================================
50
 
51
cdl_package CYGPKG_HAL_POWERPC_ADDER {
52
    display       "A&M ADDER PowerPC evaluation board"
53
    parent        CYGPKG_HAL_POWERPC
54
    requires      CYGPKG_HAL_POWERPC_MPC8xx
55
    define_header hal_powerpc_adder.h
56
    include_dir   cyg/hal
57
    description   "
58
        The ADDER HAL package provides the support needed to run
59
        eCos on a A&M ADDER board equipped with a PowerPC processor."
60
 
61
    compile       hal_diag.c hal_aux.c adder.S
62
    requires      { CYGPKG_IO_FLASH implies CYGPKG_DEVS_FLASH_AMD_AM29XXXXX_V2 }
63
    implements    CYGHWR_DEVS_FLASH_AMD_AM29XXXXX_V2_CACHED_ONLY
64
    compile       -library=libextras.a adder_flash.c
65
 
66
    implements    CYGINT_HAL_DEBUG_GDB_STUBS
67
    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
68
    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
69
 
70
    define_proc {
71
        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "
72
        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "
73
        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
74
    }
75
 
76
    cdl_component CYGPKG_HAL_POWERPC_ADDER_MODEL {
77
        display       "Adder model"
78
        requires      CYGHWR_HAL_POWERPC_ADDER_I | CYGHWR_HAL_POWERPC_ADDER_II
79
        default_value 1
80
        no_define
81
        description "
82
           The sub-options of this component define the model of Adder"
83
 
84
        cdl_option  CYGHWR_HAL_POWERPC_ADDER_I {
85
            display       "Adder-I with 850"
86
            requires      !CYGHWR_HAL_POWERPC_ADDER_II
87
            requires      { CYGHWR_HAL_POWERPC_MPC8XX == "850" }
88
            default_value 0
89
            implements    CYGNUM_HAL_QUICC_SMC2
90
            implements    CYGNUM_HAL_QUICC_SCC3
91
            define_proc {
92
                puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"A&M Adder\""
93
            }
94
            description "
95
                Select this model for an Adder with the MPC850 processor."
96
        }
97
 
98
        cdl_option  CYGHWR_HAL_POWERPC_ADDER_II {
99
            display       "Adder-II with 852T"
100
            requires      !CYGHWR_HAL_POWERPC_ADDER_I
101
            requires      { CYGHWR_HAL_POWERPC_MPC8XX == "852T" }
102
            default_value 0
103
            implements    CYGNUM_HAL_QUICC_SMC1
104
            implements    CYGNUM_HAL_QUICC_SCC3
105
            define_proc {
106
                puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"A&M AdderII\""
107
            }
108
            description "
109
                Select this model for an Adder with the MPC852T processor."
110
        }
111
    }
112
 
113
    cdl_component CYG_HAL_STARTUP {
114
        display       "Startup type"
115
        flavor        data
116
        legal_values  {"RAM" "ROM" "ROMRAM"}
117
        default_value {"RAM"}
118
        no_define
119
        define -file system.h CYG_HAL_STARTUP
120
        description   "
121
           This option is used to control where the application program will
122
           run, either from RAM or ROM (flash) memory.  ROM based applications
123
           must be self contained, while RAM applications will typically assume
124
           the existence of a debug environment, such as RedBoot or GDB stubs."
125
    }
126
 
127
    cdl_option CYGHWR_HAL_POWERPC_BOARD_SPEED {
128
        display          "Development board clock speed (MHz)"
129
        flavor           data
130
        legal_values     { 47 48 50 100 }
131
        default_value    { (CYGHWR_HAL_POWERPC_ADDER_I ? 47 : 48) }
132
        requires         { (CYGHWR_HAL_POWERPC_ADDER_I && (CYGHWR_HAL_POWERPC_BOARD_SPEED == 47)) ||
133
                           (CYGHWR_HAL_POWERPC_ADDER_II && (CYGHWR_HAL_POWERPC_BOARD_SPEED != 47)) }
134
        description      "
135
           ADDER Development Boards have various system clock speeds
136
           depending on the processor fitted.  Select the clock speed
137
           appropriate for your board so that the system can set the serial
138
           baud rate correctly, amongst other things."
139
   }
140
 
141
    # Real-time clock/counter specifics
142
    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
143
        display       "Real-time clock constants."
144
        description   "
145
            Period is busclock/16/100."
146
        flavor        none
147
 
148
        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
149
            display       "Real-time clock numerator"
150
            flavor        data
151
            default_value 1000000000
152
        }
153
        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
154
            display       "Real-time clock denominator"
155
            flavor        data
156
            default_value 100
157
        }
158
        cdl_option CYGNUM_HAL_RTC_PERIOD {
159
            display       "Real-time clock period"
160
            flavor        data
161
# Timer clocks are based on OSCLK = 10MHz
162
            default_value { (((10*1000000)/4)/CYGNUM_HAL_RTC_DENOMINATOR) }
163
        }
164
    }
165
 
166
    cdl_component CYGBLD_GLOBAL_OPTIONS {
167
        display "Global build options"
168
        flavor  none
169
        description   "
170
            Global build options including control over
171
            compiler flags, linker flags and choice of toolchain."
172
 
173
 
174
        parent  CYGPKG_NONE
175
 
176
        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
177
            display "Global command prefix"
178
            flavor  data
179
            no_define
180
            default_value { "powerpc-eabi" }
181
            description "
182
                This option specifies the command prefix used when
183
                invoking the build tools."
184
        }
185
 
186
        cdl_option CYGBLD_GLOBAL_CFLAGS {
187
            display "Global compiler flags"
188
            flavor  data
189
            no_define
190
            default_value { CYGBLD_GLOBAL_WARNFLAGS . "-msoft-float -mcpu=860 -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions" }
191
            description   "
192
                This option controls the global compiler flags which
193
                are used to compile all packages by
194
                default. Individual packages may define
195
                options which override these global flags."
196
        }
197
 
198
        cdl_option CYGBLD_GLOBAL_LDFLAGS {
199
            display "Global linker flags"
200
            flavor  data
201
            no_define
202
            default_value { "-msoft-float -mcpu=860 -g -nostdlib -Wl,--gc-sections -Wl,-static" }
203
            description   "
204
                This option controls the global linker flags. Individual
205
                packages may define options which override these global flags."
206
        }
207
 
208
        cdl_option CYGBLD_BUILD_GDB_STUBS {
209
            display "Build GDB stub ROM image"
210
            default_value 0
211
            requires { CYG_HAL_STARTUP == "ROM" }
212
            requires CYGSEM_HAL_ROM_MONITOR
213
            requires CYGBLD_BUILD_COMMON_GDB_STUBS
214
            requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
215
            requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
216
            requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
217
            requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
218
            requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
219
            no_define
220
            description "
221
                This option enables the building of the GDB stubs for the
222
                board. The common HAL controls takes care of most of the
223
                build process, but the platform CDL takes care of creating
224
                an S-Record data file suitable for programming using
225
                the board's EPPC-Bug firmware monitor."
226
 
227
            make -priority 320 {
228
                /bin/gdb_module.bin : /bin/gdb_module.img
229
                $(OBJCOPY) -O srec --change-address=0x02000000 $< $(@:.bin=.srec)
230
                $(OBJCOPY) -O binary $< $@
231
            }
232
        }
233
    }
234
 
235
    cdl_component CYGPKG_HAL_POWERPC_ADDER_OPTIONS {
236
        display "ADDER build options"
237
        flavor  none
238
        no_define
239
        description   "
240
            Package specific build options including control over
241
            compiler flags used only in building this package,
242
            and details of which tests are built."
243
 
244
 
245
        cdl_option CYGPKG_HAL_POWERPC_ADDER_CFLAGS_ADD {
246
            display "Additional compiler flags"
247
            flavor  data
248
            no_define
249
            default_value { "" }
250
            description   "
251
                This option modifies the set of compiler flags for
252
                building the ADDER HAL. These flags are used in addition
253
                to the set of global flags."
254
        }
255
 
256
        cdl_option CYGPKG_HAL_POWERPC_ADDER_CFLAGS_REMOVE {
257
            display "Suppressed compiler flags"
258
            flavor  data
259
            no_define
260
            default_value { "" }
261
            description   "
262
                This option modifies the set of compiler flags for
263
                building the ADDER HAL. These flags are removed from
264
                the set of global flags if present."
265
        }
266
 
267
        cdl_option CYGPKG_HAL_POWERPC_ADDER_TESTS {
268
            display "ADDER tests"
269
            flavor  data
270
            no_define
271
            default_value { "" }
272
            description   "
273
                This option specifies the set of tests for the ADDER HAL."
274
        }
275
    }
276
 
277
    cdl_component CYGHWR_MEMORY_LAYOUT {
278
        display "Memory layout"
279
        flavor data
280
        no_define
281
        calculated { CYG_HAL_STARTUP == "RAM" ? "powerpc_adder_ram" : \
282
                     CYG_HAL_STARTUP == "ROMRAM" ? "powerpc_adder_romram" : \
283
                                                "powerpc_adder_rom" }
284
 
285
        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
286
            display "Memory layout linker script fragment"
287
            flavor data
288
            no_define
289
            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
290
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
291
                         CYG_HAL_STARTUP == "ROMRAM" ? "" : \
292
                                                    "" }
293
        }
294
 
295
        cdl_option CYGHWR_MEMORY_LAYOUT_H {
296
            display "Memory layout header file"
297
            flavor data
298
            no_define
299
            define -file system.h CYGHWR_MEMORY_LAYOUT_H
300
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
301
                         CYG_HAL_STARTUP == "ROMRAM" ? "" : \
302
                                                    "" }
303
        }
304
    }
305
 
306
    cdl_option CYGSEM_HAL_ROM_MONITOR {
307
        display       "Behave as a ROM monitor"
308
        flavor        bool
309
        default_value 0
310
        parent        CYGPKG_HAL_ROM_MONITOR
311
        requires      { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "ROMRAM" }
312
        description   "
313
            Enable this option if this program is to be used as a ROM monitor,
314
            i.e. applications will be loaded into RAM on the board, and this
315
            ROM monitor may process exceptions or interrupts generated from the
316
            application. This enables features such as utilizing a separate
317
            interrupt stack when exceptions are generated."
318
    }
319
 
320
    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
321
        display       "Redboot HAL options"
322
        flavor        none
323
        no_define
324
        parent        CYGPKG_REDBOOT
325
        active_if     CYGPKG_REDBOOT
326
        description   "
327
            This option lists the target's requirements for a valid Redboot
328
            configuration."
329
 
330
        cdl_option CYGSEM_REDBOOT_PLF_LINUX_BOOT {
331
            active_if      CYGBLD_BUILD_REDBOOT_WITH_EXEC
332
            display        "Support booting Linux via RedBoot"
333
            flavor         bool
334
            default_value  1
335
            description    "
336
               This option enables RedBoot to support booting of a Linux kernel."
337
 
338
            compile plf_redboot_linux_exec.c
339
        }
340
 
341
        cdl_option CYGBLD_BUILD_REDBOOT_BIN {
342
            display       "Build Redboot ROM binary image"
343
            active_if     CYGBLD_BUILD_REDBOOT
344
            default_value 1
345
            no_define
346
            description "This option enables the conversion of the Redboot ELF
347
                         image to a binary image suitable for ROM programming."
348
 
349
#            compile -library=libextras.a redboot_cmds.c
350
 
351
            make -priority 325 {
352
                /bin/redboot.bin : /bin/redboot.elf
353
                $(OBJCOPY) --strip-debug $< $(@:.bin=.img)
354
                $(OBJCOPY) -O srec $< $(@:.bin=.srec)
355
                $(OBJCOPY) -O binary $< $@
356
            }
357
        }
358
    }
359
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.