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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [powerpc/] [arch/] [current/] [include/] [ppc_stub.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_HAL_PPC_STUB_H
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#define CYGONCE_HAL_PPC_STUB_H
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//========================================================================
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//
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//      ppc_stub.h
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//
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//      PowerPC-specific definitions for generic stub
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//
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//========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):     Red Hat, jskov
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// Contributors:  Red Hat, jskov
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// Date:          1998-08-20
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// Purpose:       
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// Description:   PowerPC-specific definitions for generic stub
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// Usage:         
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef unsigned long target_register_t;
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#ifndef CYGHWR_HAL_POWERPC_BOOK_E
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// Most PowerPCs use a standard register layout.
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#define NUMREGS    71
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#define REGSIZE( _x_ ) (((_x_) >= F0 && (_x_) <= F31) ? 8 : 4)
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#else
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// BookE processors only have 70 registers, MQ is not supported. All
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// registers are 32 bit and instead of FP registers there are the top
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// 32 bits of the GPRs. The 64-bit registers are only used by SPE
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// instructions, which we don't currently support.
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#define NUMREGS    70
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#define REGSIZE( _x_ ) (4)
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#endif
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#ifdef CYGHWR_HAL_POWERPC_FPU
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// The PowerPC has floating point registers that are larger than what it
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// can hold in a target_register_t
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#define TARGET_HAS_LARGE_REGISTERS
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// PowerPC stub has special needs for register handling because flating point
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// registers are bigger than the rest. Special put_register and get_register
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// are provided
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#define CYGARC_STUB_REGISTER_ACCESS_DEFINED 1
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// extra space needed for floating point registers
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#define HAL_STUB_REGISTERS_SIZE ((sizeof(GDB_Registers) + sizeof(target_register_t) - 1)/sizeof(target_register_t))
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#endif
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enum regnames {
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    R0, R1, R2, R3, R4, R5, R6, R7,
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    R8, R9, R10, R11, R12, R13, R14, R15,
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    R16, R17, R18, R19, R20, R21, R22, R23,
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    R24, R25, R26, R27, R28, R29, R30, R31,
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    F0, F1, F2, F3, F4, F5, F6, F7,
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    F8, F9, F10, F11, F12, F13, F14, F15,
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    F16, F17, F18, F19, F20, F21, F22, F23,
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    F24, F25, F26, F27, F28, F29, F30, F31,
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    PC, PS, CND, LR, CNT, XER, MQ
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};
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// For convenience
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#define SP              R1
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typedef enum regnames regnames_t;
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/* Given a trap value TRAP, return the corresponding signal. */
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extern int __computeSignal (unsigned int trap_number);
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/* Return the SPARC trap number corresponding to the last-taken trap. */
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extern int __get_trap_number (void);
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/* Return the currently-saved value corresponding to register REG. */
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extern target_register_t get_register (regnames_t reg);
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/* Store VALUE in the register corresponding to WHICH. */
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extern void put_register (regnames_t which, target_register_t value);
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/* Set the currently-saved pc register value to PC. This also updates NPC
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   as needed. */
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extern void set_pc (target_register_t pc);
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/* Set things up so that the next user resume will execute one instruction.
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   This may be done by setting breakpoints or setting a single step flag
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   in the saved user registers, for example. */
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void __single_step (void);
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/* Clear the single-step state. */
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void __clear_single_step (void);
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/* If the breakpoint we hit is in the breakpoint() instruction, return a
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   non-zero value. */
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extern int __is_breakpoint_function (void);
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/* Skip the current instruction. */
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extern void __skipinst (void);
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extern void __install_breakpoints (void);
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extern void __clear_breakpoints (void);
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#ifdef __cplusplus
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}   /* extern "C" */
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#endif
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#endif // ifndef CYGONCE_HAL_PPC_STUB_H

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