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//==========================================================================
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//
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// sed135x_16bit.c
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//
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// Author(s): Michael Kelly - Cogent Computer Systems, Inc.
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// Date: 05-24-2002
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// Description: Init Code for SED135x Display Controller
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//
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//==========================================================================
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// Copyright (C) 2003 Gary Thomas
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/lcd_support.h>
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#include <cyg/hal/hal_io.h>
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typedef unsigned char uchar;
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typedef unsigned short ushort;
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typedef volatile unsigned short vushort;
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typedef unsigned long ulong;
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typedef volatile unsigned long vulong;
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// board specific defines needed by sed135x
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#define SED_REG_BASE 0x78000000 // *RCE3
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#define SED_MEM_BASE 0x78400000
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#define SED_STEP 2 // 16-bit port on 32-bit boundary
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// Control/Status Registers, 16-bit mode
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#define SED_REG16(_x_) *(vushort *)((ulong)SED_REG_BASE + (((ulong)_x_ * SED_STEP) ^ 2))
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#define H2SED(_x_) _le16(_x_)
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#define SED_GET_PHYS_ADD(_reg_) (SED_MEM_BASE + ((_reg_ * SED_STEP) ^ 2))
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#define RD_FB16(_reg_,_val_) ((_val_) = *(vushort *)SED_GET_PHYS_ADD(_reg_))
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#define WR_FB16(_reg_,_val_) (*(vushort *)SED_GET_PHYS_ADD(_reg_) = (_val_))
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#define SED_DISP_MODE_CRT 1
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#define SED_DISP_MODE_LCD 0
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#include "sed1356_16bit.h"
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//------------------------------------------------------------------------
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// Color Lookup Table Values
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//
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static ushort sed_lut_16bit[256][3] = {
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// RED, GREEN, BLUE // Entry
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{ 0x0000, 0x0000, 0x0000, }, // 00
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{ 0x0000, 0x0000, 0x00A0, }, // 01
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{ 0x0000, 0x00A0, 0x0000, }, // 02
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{ 0x0000, 0x00A0, 0x00A0, }, // 03
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{ 0x00A0, 0x0000, 0x0000, }, // 04
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{ 0x00A0, 0x0000, 0x00A0, }, // 05
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{ 0x00A0, 0x00A0, 0x0000, }, // 06
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{ 0x00A0, 0x00A0, 0x00A0, }, // 07
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{ 0x0050, 0x0050, 0x0050, }, // 08
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{ 0x0050, 0x0050, 0x00F0, }, // 09
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{ 0x0050, 0x00F0, 0x0050, }, // 0A
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{ 0x0050, 0x00F0, 0x00F0, }, // 0B
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{ 0x00F0, 0x0050, 0x0050, }, // 0C
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{ 0x00F0, 0x0050, 0x00F0, }, // 0D
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{ 0x00F0, 0x00F0, 0x0050, }, // 0E
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{ 0x00F0, 0x00F0, 0x00F0, }, // 0F
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{ 0x0000, 0x0000, 0x0000, }, // 10
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{ 0x0010, 0x0010, 0x0010, }, // 11
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{ 0x0020, 0x0020, 0x0020, }, // 12
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{ 0x0020, 0x0020, 0x0020, }, // 13
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{ 0x0030, 0x0030, 0x0030, }, // 14
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{ 0x0040, 0x0040, 0x0040, }, // 15
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{ 0x0050, 0x0050, 0x0050, }, // 16
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{ 0x0060, 0x0060, 0x0060, }, // 17
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{ 0x0070, 0x0070, 0x0070, }, // 18
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{ 0x0080, 0x0080, 0x0080, }, // 19
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{ 0x0090, 0x0090, 0x0090, }, // 1A
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{ 0x00A0, 0x00A0, 0x00A0, }, // 1B
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{ 0x00B0, 0x00B0, 0x00B0, }, // 1C
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{ 0x00C0, 0x00C0, 0x00C0, }, // 1D
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{ 0x00E0, 0x00E0, 0x00E0, }, // 1E
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{ 0x00F0, 0x00F0, 0x00F0, }, // 1F
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{ 0x0000, 0x0000, 0x00F0, }, // 20
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{ 0x0040, 0x0000, 0x00F0, }, // 21
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{ 0x0070, 0x0000, 0x00F0, }, // 22
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{ 0x00B0, 0x0000, 0x00F0, }, // 23
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{ 0x00F0, 0x0000, 0x00F0, }, // 24
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{ 0x00F0, 0x0000, 0x00B0, }, // 25
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{ 0x00F0, 0x0000, 0x0070, }, // 26
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{ 0x00F0, 0x0000, 0x0040, }, // 27
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{ 0x00F0, 0x0000, 0x0000, }, // 28
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{ 0x00F0, 0x0040, 0x0000, }, // 29
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{ 0x00F0, 0x0070, 0x0000, }, // 2A
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{ 0x00F0, 0x00B0, 0x0000, }, // 2B
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{ 0x00F0, 0x00F0, 0x0000, }, // 2C
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{ 0x00B0, 0x00F0, 0x0000, }, // 2D
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{ 0x0070, 0x00F0, 0x0000, }, // 2E
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{ 0x0040, 0x00F0, 0x0000, }, // 2F
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{ 0x0000, 0x00F0, 0x0000, }, // 30
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{ 0x0000, 0x00F0, 0x0040, }, // 31
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{ 0x0000, 0x00F0, 0x0070, }, // 32
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{ 0x0000, 0x00F0, 0x00B0, }, // 33
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{ 0x0000, 0x00F0, 0x00F0, }, // 34
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{ 0x0000, 0x00B0, 0x00F0, }, // 35
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{ 0x0000, 0x0070, 0x00F0, }, // 36
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{ 0x0000, 0x0040, 0x00F0, }, // 37
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{ 0x0070, 0x0070, 0x00F0, }, // 38
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{ 0x0090, 0x0070, 0x00F0, }, // 39
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{ 0x00B0, 0x0070, 0x00F0, }, // 3A
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{ 0x00D0, 0x0070, 0x00F0, }, // 3B
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{ 0x00F0, 0x0070, 0x00F0, }, // 3C
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{ 0x00F0, 0x0070, 0x00D0, }, // 3D
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{ 0x00F0, 0x0070, 0x00B0, }, // 3E
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{ 0x00F0, 0x0070, 0x0090, }, // 3F
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{ 0x00F0, 0x0070, 0x0070, }, // 40
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{ 0x00F0, 0x0090, 0x0070, }, // 41
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{ 0x00F0, 0x00B0, 0x0070, }, // 42
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{ 0x00F0, 0x00D0, 0x0070, }, // 43
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{ 0x00F0, 0x00F0, 0x0070, }, // 44
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{ 0x00D0, 0x00F0, 0x0070, }, // 45
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{ 0x00B0, 0x00F0, 0x0070, }, // 46
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{ 0x0090, 0x00F0, 0x0070, }, // 47
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{ 0x0070, 0x00F0, 0x0070, }, // 48
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{ 0x0070, 0x00F0, 0x0090, }, // 49
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{ 0x0070, 0x00F0, 0x00B0, }, // 4A
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{ 0x0070, 0x00F0, 0x00D0, }, // 4B
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{ 0x0070, 0x00F0, 0x00F0, }, // 4C
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{ 0x0070, 0x00D0, 0x00F0, }, // 4D
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{ 0x0070, 0x00B0, 0x00F0, }, // 4E
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{ 0x0070, 0x0090, 0x00F0, }, // 4F
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{ 0x00B0, 0x00B0, 0x00F0, }, // 50
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{ 0x00C0, 0x00B0, 0x00F0, }, // 51
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{ 0x00D0, 0x00B0, 0x00F0, }, // 52
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{ 0x00E0, 0x00B0, 0x00F0, }, // 53
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{ 0x00F0, 0x00B0, 0x00F0, }, // 54
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{ 0x00F0, 0x00B0, 0x00E0, }, // 55
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{ 0x00F0, 0x00B0, 0x00D0, }, // 56
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{ 0x00F0, 0x00B0, 0x00C0, }, // 57
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{ 0x00F0, 0x00B0, 0x00B0, }, // 58
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{ 0x00F0, 0x00C0, 0x00B0, }, // 59
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{ 0x00F0, 0x00D0, 0x00B0, }, // 5A
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{ 0x00F0, 0x00E0, 0x00B0, }, // 5B
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{ 0x00F0, 0x00F0, 0x00B0, }, // 5C
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{ 0x00E0, 0x00F0, 0x00B0, }, // 5D
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{ 0x00D0, 0x00F0, 0x00B0, }, // 5E
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{ 0x00C0, 0x00F0, 0x00B0, }, // 5F
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{ 0x00B0, 0x00F0, 0x00B0, }, // 60
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{ 0x00B0, 0x00F0, 0x00C0, }, // 61
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{ 0x00B0, 0x00F0, 0x00D0, }, // 62
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{ 0x00B0, 0x00F0, 0x00E0, }, // 63
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{ 0x00B0, 0x00F0, 0x00F0, }, // 64
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{ 0x00B0, 0x00E0, 0x00F0, }, // 65
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{ 0x00B0, 0x00D0, 0x00F0, }, // 66
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{ 0x00B0, 0x00C0, 0x00F0, }, // 67
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{ 0x0000, 0x0000, 0x0070, }, // 68
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{ 0x0010, 0x0000, 0x0070, }, // 69
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{ 0x0030, 0x0000, 0x0070, }, // 6A
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{ 0x0050, 0x0000, 0x0070, }, // 6B
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{ 0x0070, 0x0000, 0x0070, }, // 6C
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{ 0x0070, 0x0000, 0x0050, }, // 6D
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{ 0x0070, 0x0000, 0x0030, }, // 6E
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{ 0x0070, 0x0000, 0x0010, }, // 6F
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{ 0x0070, 0x0000, 0x0000, }, // 70
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{ 0x0070, 0x0010, 0x0000, }, // 71
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{ 0x0070, 0x0030, 0x0000, }, // 72
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{ 0x0070, 0x0050, 0x0000, }, // 73
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{ 0x0070, 0x0070, 0x0000, }, // 74
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{ 0x0050, 0x0070, 0x0000, }, // 75
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{ 0x0030, 0x0070, 0x0000, }, // 76
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{ 0x0010, 0x0070, 0x0000, }, // 77
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{ 0x0000, 0x0070, 0x0000, }, // 78
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{ 0x0000, 0x0070, 0x0010, }, // 79
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{ 0x0000, 0x0070, 0x0030, }, // 7A
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{ 0x0000, 0x0070, 0x0050, }, // 7B
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{ 0x0000, 0x0070, 0x0070, }, // 7C
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{ 0x0000, 0x0050, 0x0070, }, // 7D
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{ 0x0000, 0x0030, 0x0070, }, // 7E
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{ 0x0000, 0x0010, 0x0070, }, // 7F
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{ 0x0030, 0x0030, 0x0070, }, // 80
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{ 0x0040, 0x0030, 0x0070, }, // 81
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{ 0x0050, 0x0030, 0x0070, }, // 82
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{ 0x0060, 0x0030, 0x0070, }, // 83
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{ 0x0070, 0x0030, 0x0070, }, // 84
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{ 0x0070, 0x0030, 0x0060, }, // 85
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{ 0x0070, 0x0030, 0x0050, }, // 86
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{ 0x0070, 0x0030, 0x0040, }, // 87
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{ 0x0070, 0x0030, 0x0030, }, // 88
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{ 0x0070, 0x0040, 0x0030, }, // 89
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{ 0x0070, 0x0050, 0x0030, }, // 8A
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{ 0x0070, 0x0060, 0x0030, }, // 8B
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{ 0x0070, 0x0070, 0x0030, }, // 8C
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{ 0x0060, 0x0070, 0x0030, }, // 8D
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{ 0x0050, 0x0070, 0x0030, }, // 8E
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{ 0x0040, 0x0070, 0x0030, }, // 8F
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{ 0x0030, 0x0070, 0x0030, }, // 90
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{ 0x0030, 0x0070, 0x0040, }, // 91
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{ 0x0030, 0x0070, 0x0050, }, // 92
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{ 0x0030, 0x0070, 0x0060, }, // 93
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{ 0x0030, 0x0070, 0x0070, }, // 94
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{ 0x0030, 0x0060, 0x0070, }, // 95
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{ 0x0030, 0x0050, 0x0070, }, // 96
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{ 0x0030, 0x0040, 0x0070, }, // 97
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{ 0x0050, 0x0050, 0x0070, }, // 98
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{ 0x0050, 0x0050, 0x0070, }, // 99
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{ 0x0060, 0x0050, 0x0070, }, // 9A
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{ 0x0060, 0x0050, 0x0070, }, // 9B
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{ 0x0070, 0x0050, 0x0070, }, // 9C
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{ 0x0070, 0x0050, 0x0060, }, // 9D
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{ 0x0070, 0x0050, 0x0060, }, // 9E
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{ 0x0070, 0x0050, 0x0050, }, // 9F
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{ 0x0070, 0x0050, 0x0050, }, // A0
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{ 0x0070, 0x0050, 0x0050, }, // A1
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{ 0x0070, 0x0060, 0x0050, }, // A2
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{ 0x0070, 0x0060, 0x0050, }, // A3
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{ 0x0070, 0x0070, 0x0050, }, // A4
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{ 0x0060, 0x0070, 0x0050, }, // A5
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{ 0x0060, 0x0070, 0x0050, }, // A6
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{ 0x0050, 0x0070, 0x0050, }, // A7
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{ 0x0050, 0x0070, 0x0050, }, // A8
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{ 0x0050, 0x0070, 0x0050, }, // A9
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{ 0x0050, 0x0070, 0x0060, }, // AA
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{ 0x0050, 0x0070, 0x0060, }, // AB
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{ 0x0050, 0x0070, 0x0070, }, // AC
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{ 0x0050, 0x0060, 0x0070, }, // AD
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{ 0x0050, 0x0060, 0x0070, }, // AE
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{ 0x0050, 0x0050, 0x0070, }, // AF
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{ 0x0000, 0x0000, 0x0040, }, // B0
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{ 0x0010, 0x0000, 0x0040, }, // B1
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{ 0x0020, 0x0000, 0x0040, }, // B2
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{ 0x0030, 0x0000, 0x0040, }, // B3
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{ 0x0040, 0x0000, 0x0040, }, // B4
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{ 0x0040, 0x0000, 0x0030, }, // B5
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{ 0x0040, 0x0000, 0x0020, }, // B6
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{ 0x0040, 0x0000, 0x0010, }, // B7
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{ 0x0040, 0x0000, 0x0000, }, // B8
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{ 0x0040, 0x0010, 0x0000, }, // B9
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{ 0x0040, 0x0020, 0x0000, }, // BA
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{ 0x0040, 0x0030, 0x0000, }, // BB
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{ 0x0040, 0x0040, 0x0000, }, // BC
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{ 0x0030, 0x0040, 0x0000, }, // BD
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{ 0x0020, 0x0040, 0x0000, }, // BE
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{ 0x0010, 0x0040, 0x0000, }, // BF
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{ 0x0000, 0x0040, 0x0000, }, // C0
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{ 0x0000, 0x0040, 0x0010, }, // C1
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{ 0x0000, 0x0040, 0x0020, }, // C2
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{ 0x0000, 0x0040, 0x0030, }, // C3
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{ 0x0000, 0x0040, 0x0040, }, // C4
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{ 0x0000, 0x0030, 0x0040, }, // C5
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{ 0x0000, 0x0020, 0x0040, }, // C6
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{ 0x0000, 0x0010, 0x0040, }, // C7
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{ 0x0020, 0x0020, 0x0040, }, // C8
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{ 0x0020, 0x0020, 0x0040, }, // C9
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{ 0x0030, 0x0020, 0x0040, }, // CA
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249 |
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{ 0x0030, 0x0020, 0x0040, }, // CB
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250 |
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{ 0x0040, 0x0020, 0x0040, }, // CC
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{ 0x0040, 0x0020, 0x0030, }, // CD
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{ 0x0040, 0x0020, 0x0030, }, // CE
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{ 0x0040, 0x0020, 0x0020, }, // CF
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{ 0x0040, 0x0020, 0x0020, }, // D0
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{ 0x0040, 0x0020, 0x0020, }, // D1
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{ 0x0040, 0x0030, 0x0020, }, // D2
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{ 0x0040, 0x0030, 0x0020, }, // D3
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{ 0x0040, 0x0040, 0x0020, }, // D4
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|
|
{ 0x0030, 0x0040, 0x0020, }, // D5
|
260 |
|
|
{ 0x0030, 0x0040, 0x0020, }, // D6
|
261 |
|
|
{ 0x0020, 0x0040, 0x0020, }, // D7
|
262 |
|
|
{ 0x0020, 0x0040, 0x0020, }, // D8
|
263 |
|
|
{ 0x0020, 0x0040, 0x0020, }, // D9
|
264 |
|
|
{ 0x0020, 0x0040, 0x0030, }, // DA
|
265 |
|
|
{ 0x0020, 0x0040, 0x0030, }, // DB
|
266 |
|
|
{ 0x0020, 0x0040, 0x0040, }, // DC
|
267 |
|
|
{ 0x0020, 0x0030, 0x0040, }, // DD
|
268 |
|
|
{ 0x0020, 0x0030, 0x0040, }, // DE
|
269 |
|
|
{ 0x0020, 0x0020, 0x0040, }, // DF
|
270 |
|
|
{ 0x0020, 0x0020, 0x0040, }, // E0
|
271 |
|
|
{ 0x0030, 0x0020, 0x0040, }, // E1
|
272 |
|
|
{ 0x0030, 0x0020, 0x0040, }, // E2
|
273 |
|
|
{ 0x0030, 0x0020, 0x0040, }, // E3
|
274 |
|
|
{ 0x0040, 0x0020, 0x0040, }, // E4
|
275 |
|
|
{ 0x0040, 0x0020, 0x0030, }, // E5
|
276 |
|
|
{ 0x0040, 0x0020, 0x0030, }, // E6
|
277 |
|
|
{ 0x0040, 0x0020, 0x0030, }, // E7
|
278 |
|
|
{ 0x0040, 0x0020, 0x0020, }, // E8
|
279 |
|
|
{ 0x0040, 0x0030, 0x0020, }, // E9
|
280 |
|
|
{ 0x0040, 0x0030, 0x0020, }, // EA
|
281 |
|
|
{ 0x0040, 0x0030, 0x0020, }, // EB
|
282 |
|
|
{ 0x0040, 0x0040, 0x0020, }, // EC
|
283 |
|
|
{ 0x0030, 0x0040, 0x0020, }, // ED
|
284 |
|
|
{ 0x0030, 0x0040, 0x0020, }, // EE
|
285 |
|
|
{ 0x0030, 0x0040, 0x0020, }, // EF
|
286 |
|
|
{ 0x0020, 0x0040, 0x0020, }, // F0
|
287 |
|
|
{ 0x0020, 0x0040, 0x0030, }, // F1
|
288 |
|
|
{ 0x0020, 0x0040, 0x0030, }, // F2
|
289 |
|
|
{ 0x0020, 0x0040, 0x0030, }, // F3
|
290 |
|
|
{ 0x0020, 0x0040, 0x0040, }, // F4
|
291 |
|
|
{ 0x0020, 0x0030, 0x0040, }, // F5
|
292 |
|
|
{ 0x0020, 0x0030, 0x0040, }, // F6
|
293 |
|
|
{ 0x0020, 0x0030, 0x0040, }, // F7
|
294 |
|
|
{ 0x0000, 0x0000, 0x0000, }, // F8
|
295 |
|
|
{ 0x0000, 0x0000, 0x0000, }, // F9
|
296 |
|
|
{ 0x0000, 0x0000, 0x0000, }, // FA
|
297 |
|
|
{ 0x0000, 0x0000, 0x0000, }, // FB
|
298 |
|
|
{ 0x0000, 0x0000, 0x0000, }, // FC
|
299 |
|
|
{ 0x0000, 0x0000, 0x0000, }, // FD
|
300 |
|
|
{ 0x0000, 0x0000, 0x0000, }, // FE
|
301 |
|
|
{ 0x0000, 0x0000, 0x0000, }, // FF
|
302 |
|
|
};
|
303 |
|
|
|
304 |
|
|
//--------------------------------------------------------------------------
|
305 |
|
|
// function prototypes
|
306 |
|
|
//
|
307 |
|
|
int sed135x_init(int depth, struct lcd_info *lcd);
|
308 |
|
|
static void sed135x_on(void);
|
309 |
|
|
static void sed135x_off(void);
|
310 |
|
|
static void sed_lcd_bkl(uchar bright);
|
311 |
|
|
|
312 |
|
|
extern void fs6377_init(int);
|
313 |
|
|
// Why doesn't the real mode work?
|
314 |
|
|
#define fs6377_init(mode) _csb281_fs6377_init(0)
|
315 |
|
|
|
316 |
|
|
// global flags to determine what, if anything, was found
|
317 |
|
|
static int sed135x_ok;
|
318 |
|
|
static int sed_disp_mode_crt;
|
319 |
|
|
|
320 |
|
|
// GPIO1 is used to control the LCD backlight on many CSB's
|
321 |
|
|
#define SED1356_BKL_ON SED1356_REG_GPIO_CTL |= H2SED(SED1356_GPIO_GPIO1) // GPIO1 = 1
|
322 |
|
|
#define SED1356_BKL_OFF SED1356_REG_GPIO_CTL &= H2SED(~SED1356_GPIO_GPIO1) // GPIO1 = 0
|
323 |
|
|
|
324 |
|
|
// GPIO2 is used to sense the presence of a monitor. 0 = monitor connected, 1 = no monitor
|
325 |
|
|
// we invert the sense to make it easier to test and more logical.
|
326 |
|
|
#define SED1356_CRT SED1356_REG_GPIO_CTL & H2SED(SED1356_GPIO_GPIO2)
|
327 |
|
|
|
328 |
|
|
#define SED_ROW_SIZE(_depth_) ((PIXELS_PER_ROW * _depth_) / 8)
|
329 |
|
|
|
330 |
|
|
//--------------------------------------------------------------------------
|
331 |
|
|
// sed135x_on
|
332 |
|
|
//
|
333 |
|
|
// This function turns on the SED1355 or SED1356 LCD and/or CRT
|
334 |
|
|
//
|
335 |
|
|
static void
|
336 |
|
|
sed135x_on(void)
|
337 |
|
|
{
|
338 |
|
|
uchar temp8;
|
339 |
|
|
int i;
|
340 |
|
|
|
341 |
|
|
sed135x_off();
|
342 |
|
|
|
343 |
|
|
// Turn on the LCD and/or CRT
|
344 |
|
|
// The SED1356 supports seperate LCD and CRT timing registers
|
345 |
|
|
// that have already been setup. We just blank the side we
|
346 |
|
|
// aren't using and enable the other.
|
347 |
|
|
if (sed_disp_mode_crt) { // 1 = CRT Mode
|
348 |
|
|
// Blank the LCD and CRT
|
349 |
|
|
SED1356_REG_LCD_DISP_MODE_and_MISC |= H2SED(SED1356_LCD_DISP_BLANK);
|
350 |
|
|
SED1356_REG_CRT_DISP_MODE |= H2SED(SED1356_CRT_DISP_BLANK);
|
351 |
|
|
|
352 |
|
|
// turn the LCD backlight off
|
353 |
|
|
sed_lcd_bkl(0);
|
354 |
|
|
|
355 |
|
|
// Set the SED1356 to CRT Mode
|
356 |
|
|
SED1356_REG_DISP_MODE = H2SED(SED1356_DISP_SWIV_NORM |
|
357 |
|
|
SED1356_DISP_MODE_CRT);
|
358 |
|
|
|
359 |
|
|
// Turn on the CRT
|
360 |
|
|
SED1356_REG_CRT_DISP_MODE &= ~H2SED(SED1356_CRT_DISP_BLANK);
|
361 |
|
|
} // if CRT mode
|
362 |
|
|
else { // 0 = LCD Mode
|
363 |
|
|
// Blank the LCD and CRT
|
364 |
|
|
SED1356_REG_LCD_DISP_MODE_and_MISC |= H2SED(SED1356_LCD_DISP_BLANK);
|
365 |
|
|
SED1356_REG_CRT_DISP_MODE |= H2SED(SED1356_CRT_DISP_BLANK);
|
366 |
|
|
|
367 |
|
|
// Set the SED1356 to LCD Mode
|
368 |
|
|
SED1356_REG_DISP_MODE = H2SED(SED1356_DISP_SWIV_NORM |
|
369 |
|
|
SED1356_DISP_MODE_LCD);
|
370 |
|
|
|
371 |
|
|
// Turn on the LCD
|
372 |
|
|
SED1356_REG_LCD_DISP_MODE_and_MISC &= ~H2SED(SED1356_LCD_DISP_BLANK);
|
373 |
|
|
sed_lcd_bkl(0xff); // turn the LCD backlight on/full brightness
|
374 |
|
|
} // else LCD Mode
|
375 |
|
|
}
|
376 |
|
|
|
377 |
|
|
//--------------------------------------------------------------------------
|
378 |
|
|
// sed_lcd_bkl()
|
379 |
|
|
//
|
380 |
|
|
// This function turns on the LCD backlight connected to GPIO1. This is
|
381 |
|
|
// not used if the board has a different method of controlling the
|
382 |
|
|
// backlight. Since the Sed has only a single GPIO bit and no way
|
383 |
|
|
// to modulate it, we use any non-zero value of bright to turn it on.
|
384 |
|
|
//
|
385 |
|
|
static void
|
386 |
|
|
sed_lcd_bkl(uchar bright)
|
387 |
|
|
{
|
388 |
|
|
// Any non-zero value for bright means on
|
389 |
|
|
if (bright)
|
390 |
|
|
SED1356_BKL_ON;
|
391 |
|
|
else
|
392 |
|
|
SED1356_BKL_OFF;
|
393 |
|
|
|
394 |
|
|
}
|
395 |
|
|
|
396 |
|
|
//--------------------------------------------------------------------------
|
397 |
|
|
// sed135x_off
|
398 |
|
|
//
|
399 |
|
|
// This function turns off the SED1356 LCD and/or CRT and the display
|
400 |
|
|
// fifo. It can also turn off the clocks if mode is true, thus allowing
|
401 |
|
|
// the programmable clock generator to be changed.
|
402 |
|
|
//
|
403 |
|
|
static void
|
404 |
|
|
sed135x_off(void)
|
405 |
|
|
{
|
406 |
|
|
SED1356_REG_DISP_MODE = H2SED(SED1356_DISP_SWIV_NORM |
|
407 |
|
|
SED1356_DISP_MODE_OFF);
|
408 |
|
|
sed_lcd_bkl(0); // turn the LCD backlight off
|
409 |
|
|
}
|
410 |
|
|
|
411 |
|
|
//--------------------------------------------------------------------------
|
412 |
|
|
// sed135x_init
|
413 |
|
|
//
|
414 |
|
|
// This function sets up the sed1355 or sed1356 whichever is found
|
415 |
|
|
//
|
416 |
|
|
int
|
417 |
|
|
sed135x_init(int depth, struct lcd_info *lcd)
|
418 |
|
|
{
|
419 |
|
|
vushort temp16;
|
420 |
|
|
int i;
|
421 |
|
|
|
422 |
|
|
sed135x_ok = 0;
|
423 |
|
|
sed_disp_mode_crt = 0; // assume LCD
|
424 |
|
|
|
425 |
|
|
if ((depth != 4) && (depth != 8) && (depth != 16)) {
|
426 |
|
|
diag_printf("Invalid depth: %d\n", depth);
|
427 |
|
|
return -1;
|
428 |
|
|
}
|
429 |
|
|
|
430 |
|
|
// enable host access
|
431 |
|
|
SED1356_REG_REV_and_MISC = 0x0000;
|
432 |
|
|
|
433 |
|
|
// Check the ID to make sure we even have a SED1356 installed
|
434 |
|
|
temp16 = SED1356_REG_REV_and_MISC & H2SED(SED1356_REV_ID_MASK);
|
435 |
|
|
|
436 |
|
|
if (temp16 != H2SED(SED1356_REV_ID_1356)){
|
437 |
|
|
diag_printf("SED1356 Not Found! SED_REG_REV = %04x.\n", temp16);
|
438 |
|
|
return -1;
|
439 |
|
|
}
|
440 |
|
|
|
441 |
|
|
// Disable the display
|
442 |
|
|
SED1356_REG_DISP_MODE = H2SED(SED1356_DISP_SWIV_NORM |
|
443 |
|
|
SED1356_DISP_MODE_OFF);
|
444 |
|
|
|
445 |
|
|
// Test for the presence of a CRT
|
446 |
|
|
SED1356_REG_GPIO_CTL = 0x0000; // Disable Backlight
|
447 |
|
|
SED1356_REG_GPIO_CFG = H2SED(SED1356_GPIO_GPIO1); // GPIO1 Out, GPIO2 In
|
448 |
|
|
if (SED1356_CRT) sed_disp_mode_crt = 0;
|
449 |
|
|
else sed_disp_mode_crt = 1;
|
450 |
|
|
|
451 |
|
|
// Enable Power Save Mode before we mess with the clocks
|
452 |
|
|
SED1356_REG_MEM_CFG_and_REF_RATE = H2SED(SED1356_REF_TYPE_SELF); // set dram to self refresh first
|
453 |
|
|
// shut off MCLK
|
454 |
|
|
SED1356_REG_PWR_CFG_and_STAT = H2SED(SED1356_PWR_MCLK);
|
455 |
|
|
|
456 |
|
|
// Wait until power is down - when MCLK bit goes true
|
457 |
|
|
while ((SED1356_REG_PWR_CFG_and_STAT & H2SED(SED1356_PWR_MCLK)) == 0){}
|
458 |
|
|
|
459 |
|
|
// Change the programmable clock generator to the desired timing
|
460 |
|
|
if (sed_disp_mode_crt) fs6377_init(SED_DISP_MODE_CRT);
|
461 |
|
|
else fs6377_init(SED_DISP_MODE_LCD);
|
462 |
|
|
|
463 |
|
|
// Re-enable Power
|
464 |
|
|
SED1356_REG_PWR_CFG_and_STAT = 0x0000;
|
465 |
|
|
|
466 |
|
|
// Common Control Registers
|
467 |
|
|
SED1356_REG_MCLK_CFG = H2SED(SED1356_MCLK_SRC_BCLK);
|
468 |
|
|
SED1356_REG_LCD_PCLK_CFG = H2SED(SED1356_PCLK_SRC_CLKI);
|
469 |
|
|
SED1356_REG_CRT_PCLK_CFG = H2SED(SED1356_PCLK_SRC_CLKI);
|
470 |
|
|
SED1356_REG_MEDIA_PCLK_CFG = 0x0000;
|
471 |
|
|
SED1356_REG_WAIT_STATE = H2SED(0x0001);
|
472 |
|
|
SED1356_REG_MEM_CFG_and_REF_RATE = H2SED(SED1356_MEM_CFG_2CAS_EDO |
|
473 |
|
|
SED1356_REF_RATE_2048);
|
474 |
|
|
SED1356_REG_MEM_TMG0_and_1 = H2SED(SED1356_MEM_TMG0_EDO50_MCLK33 |
|
475 |
|
|
SED1356_MEM_TMG1_EDO50_MCLK33);
|
476 |
|
|
SED1356_REG_PANEL_TYPE_and_MOD_RATE = H2SED(SED1356_PANEL_TYPE_16 |
|
477 |
|
|
SED1356_PANEL_TYPE_CLR |
|
478 |
|
|
SED1356_PANEL_TYPE_TFT);
|
479 |
|
|
|
480 |
|
|
// LCD Specific Registers
|
481 |
|
|
SED1356_REG_LCD_HOR_DISP = H2SED((PIXELS_PER_ROW/8) - 1);
|
482 |
|
|
SED1356_REG_LCD_HOR_NONDISP_and_START = H2SED(SED_HOR_NONDISP_LCD |
|
483 |
|
|
(SED_HOR_PULSE_START_LCD << 8));
|
484 |
|
|
SED1356_REG_LCD_HOR_PULSE = H2SED(SED1356_PULSE_WID(SED_HOR_PULSE_WIDTH_LCD) |
|
485 |
|
|
SED1356_PULSE_POL_LOW);
|
486 |
|
|
SED1356_REG_LCD_VER_DISP_HT_LO_and_HI = H2SED((PIXELS_PER_COL - 1) & 0x3ff);
|
487 |
|
|
SED1356_REG_LCD_VER_NONDISP_and_START = H2SED(SED_VER_NONDISP_LCD |
|
488 |
|
|
(SED_VER_PULSE_START_LCD << 8));
|
489 |
|
|
SED1356_REG_LCD_VER_PULSE = H2SED(SED1356_PULSE_WID(SED_VER_PULSE_WIDTH_LCD) |
|
490 |
|
|
SED1356_PULSE_POL_LOW);
|
491 |
|
|
switch (depth) {
|
492 |
|
|
case 4: SED1356_REG_LCD_DISP_MODE_and_MISC = H2SED(SED1356_LCD_DISP_BLANK |
|
493 |
|
|
SED1356_LCD_DISP_SWIV_NORM |
|
494 |
|
|
SED1356_LCD_DISP_4BPP);
|
495 |
|
|
break;
|
496 |
|
|
case 8: SED1356_REG_LCD_DISP_MODE_and_MISC = H2SED(SED1356_LCD_DISP_BLANK |
|
497 |
|
|
SED1356_LCD_DISP_SWIV_NORM |
|
498 |
|
|
SED1356_LCD_DISP_8BPP);
|
499 |
|
|
break;
|
500 |
|
|
default: SED1356_REG_LCD_DISP_MODE_and_MISC = H2SED(SED1356_LCD_DISP_BLANK |
|
501 |
|
|
SED1356_LCD_DISP_SWIV_NORM |
|
502 |
|
|
SED1356_LCD_DISP_16BPP); break;
|
503 |
|
|
}
|
504 |
|
|
|
505 |
|
|
SED1356_REG_LCD_DISP_START_LO_and_MID = 0x0000;
|
506 |
|
|
SED1356_REG_LCD_DISP_START_HI = 0x0000;
|
507 |
|
|
SED1356_REG_LCD_ADD_OFFSET_LO_and_HI = H2SED((SED_ROW_SIZE(depth) / 2) & 0x7ff);
|
508 |
|
|
SED1356_REG_LCD_PIXEL_PAN = 0x0000;
|
509 |
|
|
SED1356_REG_LCD_FIFO_THRESH_LO_and_HI = 0x0000; // auto mode
|
510 |
|
|
|
511 |
|
|
// LCD Specific Registers
|
512 |
|
|
SED1356_REG_CRT_HOR_DISP = H2SED((PIXELS_PER_ROW/8) - 1);
|
513 |
|
|
SED1356_REG_CRT_HOR_NONDISP_and_START = H2SED(SED_HOR_NONDISP_CRT |
|
514 |
|
|
(SED_HOR_PULSE_START_CRT << 8));
|
515 |
|
|
SED1356_REG_CRT_HOR_PULSE = H2SED(SED1356_PULSE_WID(SED_HOR_PULSE_WIDTH_CRT) |
|
516 |
|
|
SED1356_PULSE_POL_LOW);
|
517 |
|
|
SED1356_REG_CRT_VER_DISP_HT_LO_and_HI = H2SED((PIXELS_PER_COL - 1) & 0x3ff);
|
518 |
|
|
SED1356_REG_CRT_VER_NONDISP_and_START = H2SED(SED_VER_NONDISP_CRT |
|
519 |
|
|
(SED_VER_PULSE_START_CRT << 8));
|
520 |
|
|
SED1356_REG_CRT_VER_PULSE_and_OUT_CTL = H2SED(SED1356_PULSE_WID(SED_VER_PULSE_WIDTH_CRT) |
|
521 |
|
|
SED1356_PULSE_POL_LOW | SED1356_CRT_OUT_DAC_LVL);
|
522 |
|
|
switch (depth) {
|
523 |
|
|
case 4: SED1356_REG_CRT_DISP_MODE = H2SED(SED1356_CRT_DISP_BLANK |
|
524 |
|
|
SED1356_CRT_DISP_4BPP);
|
525 |
|
|
break;
|
526 |
|
|
case 8: SED1356_REG_CRT_DISP_MODE = H2SED(SED1356_CRT_DISP_BLANK |
|
527 |
|
|
SED1356_CRT_DISP_8BPP);
|
528 |
|
|
break;
|
529 |
|
|
default: SED1356_REG_CRT_DISP_MODE = H2SED(SED1356_CRT_DISP_BLANK |
|
530 |
|
|
SED1356_CRT_DISP_16BPP);
|
531 |
|
|
break;
|
532 |
|
|
}
|
533 |
|
|
|
534 |
|
|
|
535 |
|
|
SED1356_REG_CRT_DISP_START_LO_and_MID = 0x0000;
|
536 |
|
|
SED1356_REG_CRT_DISP_START_HI = 0x0000;
|
537 |
|
|
SED1356_REG_CRT_ADD_OFFSET_LO_and_HI = H2SED((SED_ROW_SIZE(depth) / 2) & 0x7ff);
|
538 |
|
|
SED1356_REG_CRT_PIXEL_PAN = 0x0000;
|
539 |
|
|
SED1356_REG_CRT_FIFO_THRESH_LO_and_HI = 0x0000; // auto mode
|
540 |
|
|
|
541 |
|
|
// Disable Cursor
|
542 |
|
|
SED1356_REG_LCD_CURSOR_CTL_and_START_ADD = 0x0000;
|
543 |
|
|
SED1356_REG_CRT_CURSOR_CTL_and_START_ADD = 0x0000;
|
544 |
|
|
|
545 |
|
|
// Disable BitBlt
|
546 |
|
|
SED1356_REG_BLT_CTL_0_and_1 = 0x0000;
|
547 |
|
|
SED1356_REG_BLT_ROP_CODE_and_BLT_OP = 0x0000;
|
548 |
|
|
SED1356_REG_BLT_SRC_START_LO_and_MID = 0x0000;
|
549 |
|
|
SED1356_REG_BLT_SRC_START_HI = 0x0000;
|
550 |
|
|
SED1356_REG_BLT_DEST_START_LO_and_MID = 0x0000;
|
551 |
|
|
SED1356_REG_BLT_DEST_START_HI = 0x0000;
|
552 |
|
|
SED1356_REG_BLT_ADD_OFFSET_LO_and_HI = 0x0000;
|
553 |
|
|
SED1356_REG_BLT_WID_LO_and_HI = 0x0000;
|
554 |
|
|
SED1356_REG_BLT_HGT_LO_and_HI = 0x0000;
|
555 |
|
|
SED1356_REG_BLT_BG_CLR_LO_and_HI = 0x0000;
|
556 |
|
|
SED1356_REG_BLT_FG_CLR_LO_and_HI = 0x0000;
|
557 |
|
|
|
558 |
|
|
// Fill the LUT, write to both LCD and CRT luts simultaneously
|
559 |
|
|
SED1356_REG_LUT_MODE = 0x0000;
|
560 |
|
|
for (i = 0; i < 256; i++){
|
561 |
|
|
|
562 |
|
|
SED1356_REG_LUT_ADD = H2SED(i);
|
563 |
|
|
SED1356_REG_LUT_DATA = H2SED(sed_lut_16bit[i][0]); // red
|
564 |
|
|
SED1356_REG_LUT_DATA = H2SED(sed_lut_16bit[i][1]); // green
|
565 |
|
|
SED1356_REG_LUT_DATA = H2SED(sed_lut_16bit[i][2]); // blue
|
566 |
|
|
}
|
567 |
|
|
|
568 |
|
|
// Disable Power Save Mode
|
569 |
|
|
SED1356_REG_PWR_CFG_and_STAT = 0x0000;
|
570 |
|
|
|
571 |
|
|
// Set Watchdog
|
572 |
|
|
// SED1356_REG_WATCHDOG_CTL = 0x0000;
|
573 |
|
|
|
574 |
|
|
// Device found & initialized
|
575 |
|
|
sed135x_ok = 1;
|
576 |
|
|
|
577 |
|
|
// turn on the display
|
578 |
|
|
sed135x_on();
|
579 |
|
|
|
580 |
|
|
// Fill in the info structure
|
581 |
|
|
lcd->height = 480; // FIXME
|
582 |
|
|
lcd->width = 640; // FIXME
|
583 |
|
|
lcd->bpp = depth;
|
584 |
|
|
lcd->type = FB_TRUE_RGB565;
|
585 |
|
|
lcd->rlen = (640*2*2); // FIXME
|
586 |
|
|
lcd->access_size = 2; // Framebuffer fixed at 16 bit access
|
587 |
|
|
lcd->stride = 4; // Only on "odd" 16 byte chunks
|
588 |
|
|
lcd->fb = SED_GET_PHYS_ADD(0);
|
589 |
|
|
lcd->on = sed135x_on;
|
590 |
|
|
lcd->off = sed135x_off;
|
591 |
|
|
|
592 |
|
|
return 0;
|
593 |
|
|
}
|
594 |
|
|
|
595 |
|
|
//--------------------------------------------------------------------------
|
596 |
|
|
// sed_pwr_dn()
|
597 |
|
|
static void
|
598 |
|
|
sed_pwr_dn(void)
|
599 |
|
|
{
|
600 |
|
|
|
601 |
|
|
// Enable Host Access
|
602 |
|
|
SED1356_REG_REV_and_MISC = 0x0000;
|
603 |
|
|
|
604 |
|
|
// Disable the display
|
605 |
|
|
SED1356_REG_DISP_MODE = H2SED(SED1356_DISP_MODE_OFF);
|
606 |
|
|
|
607 |
|
|
// Enable Power Save Mode
|
608 |
|
|
// set dram to self refresh first
|
609 |
|
|
SED1356_REG_MEM_CFG_and_REF_RATE = H2SED(SED1356_REF_TYPE_SELF);
|
610 |
|
|
|
611 |
|
|
// shut off MCLK
|
612 |
|
|
SED1356_REG_PWR_CFG_and_STAT = H2SED(SED1356_PWR_MCLK);
|
613 |
|
|
|
614 |
|
|
// Wait until power is down - when MCLK bit goes true
|
615 |
|
|
while ((SED1356_REG_PWR_CFG_and_STAT & H2SED(SED1356_PWR_MCLK)) == 0){}
|
616 |
|
|
}
|
617 |
|
|
|
618 |
|
|
|