OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [powerpc/] [fads/] [current/] [cdl/] [hal_powerpc_fads.cdl] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
# ====================================================================
2
#
3
#      hal_powerpc_fads.cdl
4
#
5
#      PowerPC/FADS board HAL package configuration data
6
#
7
# ====================================================================
8
## ####ECOSGPLCOPYRIGHTBEGIN####
9
## -------------------------------------------
10
## This file is part of eCos, the Embedded Configurable Operating System.
11
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
12
##
13
## eCos is free software; you can redistribute it and/or modify it under
14
## the terms of the GNU General Public License as published by the Free
15
## Software Foundation; either version 2 or (at your option) any later
16
## version.
17
##
18
## eCos is distributed in the hope that it will be useful, but WITHOUT
19
## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
## for more details.
22
##
23
## You should have received a copy of the GNU General Public License
24
## along with eCos; if not, write to the Free Software Foundation, Inc.,
25
## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
26
##
27
## As a special exception, if other files instantiate templates or use
28
## macros or inline functions from this file, or you compile this file
29
## and link it with other works to produce a work based on this file,
30
## this file does not by itself cause the resulting work to be covered by
31
## the GNU General Public License. However the source code for this file
32
## must still be made available in accordance with section (3) of the GNU
33
## General Public License v2.
34
##
35
## This exception does not invalidate any other reasons why a work based
36
## on this file might be covered by the GNU General Public License.
37
## -------------------------------------------
38
## ####ECOSGPLCOPYRIGHTEND####
39
# ====================================================================
40
######DESCRIPTIONBEGIN####
41
#
42
# Author(s):      jskov
43
# Original data:  bartv, khester
44
# Contributors:
45
# Date:           1999-11-02
46
#
47
#####DESCRIPTIONEND####
48
#
49
# ====================================================================
50
 
51
cdl_package CYGPKG_HAL_POWERPC_FADS {
52
    display       "Motorola FADS PowerPC evaluation board"
53
    parent        CYGPKG_HAL_POWERPC
54
    requires      CYGPKG_HAL_POWERPC_MPC8xx
55
    define_header hal_powerpc_fads.h
56
    include_dir   cyg/hal
57
    description   "
58
        The FADS HAL package provides the support needed to run
59
        eCos on a Motorola FADS board equipped with a PowerPC processor."
60
 
61
    compile       hal_diag.c hal_aux.c fads.S quicc_smc2.c
62
 
63
    # FIXME: Cannot enable this yet since too much support is missing.
64
    # implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
65
 
66
    define_proc {
67
        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "
68
        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "
69
    }
70
 
71
    # Board doesn't have eCos GDB stub support yet.
72
    implements CYGINT_HAL_USE_ROM_MONITOR_UNSUPPORTED
73
 
74
    cdl_component CYG_HAL_STARTUP {
75
        display       "Startup type"
76
        flavor        data
77
        legal_values  {"RAM" "ROM"}
78
        default_value {"RAM"}
79
        no_define
80
        define -file system.h CYG_HAL_STARTUP
81
        description   "
82
           When targetting the FADS board for RAM bootstrap it is expected
83
           that the image will be downloaded via the Motorola MPC8BUG tool."
84
    }
85
 
86
   cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
87
       display      "Number of communication channels on the board"
88
       flavor       data
89
       calculated   1
90
   }
91
 
92
   cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
93
       display          "Debug serial port"
94
       flavor data
95
       legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
96
       default_value    0
97
       description      "
98
           The FADS board has only one serial port. This option
99
           chooses which port will be used to connect to a host
100
           running GDB."
101
    }
102
 
103
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
104
        display          "Diagnostic serial port"
105
        flavor data
106
        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
107
        default_value    0
108
        description      "
109
           The FADS board has only one serial port.  This option
110
           chooses which port will be used for diagnostic output."
111
    }
112
 
113
    # Real-time clock/counter specifics
114
    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
115
        display       "Real-time clock constants."
116
        description   "
117
            Period is busclock/16/100."
118
        flavor        none
119
 
120
        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
121
            display       "Real-time clock numerator"
122
            flavor        data
123
            default_value 1000000000
124
        }
125
        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
126
            display       "Real-time clock denominator"
127
            flavor        data
128
            default_value 100
129
        }
130
        cdl_option CYGNUM_HAL_RTC_PERIOD {
131
            display       "Real-time clock period"
132
            flavor        data
133
            default_value 20833
134
        }
135
    }
136
 
137
    cdl_component CYGBLD_GLOBAL_OPTIONS {
138
        display "Global build options"
139
        flavor  none
140
        parent  CYGPKG_NONE
141
        description   "
142
            Global build options including control over
143
            compiler flags, linker flags and choice of toolchain."
144
 
145
 
146
        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
147
            display "Global command prefix"
148
            flavor  data
149
            no_define
150
            default_value { "powerpc-eabi" }
151
            description "
152
                This option specifies the command prefix used when
153
                invoking the build tools."
154
        }
155
 
156
        cdl_option CYGBLD_GLOBAL_CFLAGS {
157
            display "Global compiler flags"
158
            flavor  data
159
            no_define
160
            default_value { CYGBLD_GLOBAL_WARNFLAGS . "-msoft-float -mcpu=860 -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions " }
161
            description   "
162
                This option controls the global compiler flags which
163
                are used to compile all packages by
164
                default. Individual packages may define
165
                options which override these global flags."
166
        }
167
 
168
        cdl_option CYGBLD_GLOBAL_LDFLAGS {
169
            display "Global linker flags"
170
            flavor  data
171
            no_define
172
            default_value { "-msoft-float -mcpu=860 -g -nostdlib -Wl,--gc-sections -Wl,-static" }
173
            description   "
174
                This option controls the global linker flags. Individual
175
                packages may define options which override these global flags."
176
        }
177
    }
178
 
179
    cdl_component CYGHWR_MEMORY_LAYOUT {
180
        display "Memory layout"
181
        flavor data
182
        no_define
183
        calculated { CYG_HAL_STARTUP == "RAM" ? "powerpc_fads_ram" : \
184
                                                "powerpc_fads_rom" }
185
 
186
        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
187
            display "Memory layout linker script fragment"
188
            flavor data
189
            no_define
190
            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
191
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
192
                                                    "" }
193
        }
194
 
195
        cdl_option CYGHWR_MEMORY_LAYOUT_H {
196
            display "Memory layout header file"
197
            flavor data
198
            no_define
199
            define -file system.h CYGHWR_MEMORY_LAYOUT_H
200
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
201
                                                    "" }
202
        }
203
    }
204
}

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.