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skrzyp |
//==========================================================================
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//
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// moab_ide.c
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//
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// HAL support code for IDE devices on TAMS MOAB
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): msalter
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// Contributors: msalter, gthomas
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// Date: 2002-01-04
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// Purpose: PCI support
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// Description: Implementations of HAL PCI interfaces
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================*/
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#include <pkgconf/hal.h>
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#include <pkgconf/system.h>
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#include CYGBLD_HAL_PLATFORM_H
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#include CYGHWR_MEMORY_LAYOUT_H
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#include <cyg/infra/cyg_type.h> // base types
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#include <cyg/infra/cyg_trac.h> // tracing macros
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#include <cyg/infra/cyg_ass.h> // assertion macros
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#include <cyg/infra/diag.h> // diag_printf()
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#include <cyg/hal/hal_io.h> // IO macros
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#include <cyg/hal/hal_if.h> // calling interface API
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#include <cyg/hal/hal_arch.h> // Register state info
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#include <cyg/hal/hal_diag.h>
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#include <cyg/hal/hal_intr.h> // Interrupt names
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#include <cyg/hal/hal_cache.h>
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#include <cyg/io/pci_hw.h>
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#include <cyg/io/pci.h>
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// Debug control
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// 0 = no messages
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// 1 = identification/discovery
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// 2 = detailed I/O
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#define IDE_DEBUG 0
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int _plf_ide_num_controllers = 0;
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static struct {
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cyg_uint32 cmd_bar;
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cyg_uint32 ctl_bar;
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} ide_ctrl[HAL_IDE_NUM_CONTROLLERS];
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cyg_uint8
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cyg_hal_plf_ide_read_uint8(int ctlr, cyg_uint32 reg)
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{
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cyg_uint8 val;
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HAL_READ_UINT8(ide_ctrl[ctlr].cmd_bar + reg, val);
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#if (IDE_DEBUG & 0x02)
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diag_printf("IDE8[%d.%d] => %x\n", ctlr, reg, val);
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#endif
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return val;
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}
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void
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cyg_hal_plf_ide_write_uint8(int ctlr, cyg_uint32 reg, cyg_uint8 val)
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{
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HAL_WRITE_UINT8(ide_ctrl[ctlr].cmd_bar + reg, val);
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#if (IDE_DEBUG & 0x02)
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diag_printf("IDE8[%d.%d] <= %x\n", ctlr, reg, val);
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#endif
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}
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cyg_uint16
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cyg_hal_plf_ide_read_uint16(int ctlr, cyg_uint32 reg)
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{
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cyg_uint16 val;
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HAL_READ_UINT16(ide_ctrl[ctlr].cmd_bar + reg, val);
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#if (IDE_DEBUG & 0x02)
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diag_printf("IDE16[%d.%d] => %x\n", ctlr, reg, val);
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#endif
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return val;
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}
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void
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cyg_hal_plf_ide_write_uint16(int ctlr, cyg_uint32 reg, cyg_uint16 val)
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{
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HAL_WRITE_UINT16(ide_ctrl[ctlr].cmd_bar + reg, val);
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#if (IDE_DEBUG & 0x02)
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diag_printf("IDE16[%d.%d] <= %x\n", ctlr, reg, val);
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#endif
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}
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void
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cyg_hal_plf_ide_write_control(int ctlr, cyg_uint8 val)
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{
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HAL_WRITE_UINT8(ide_ctrl[ctlr].ctl_bar, val);
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#if (IDE_DEBUG & 0x02)
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diag_printf("IDECTL[%d] <= %x\n", ctlr, val);
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#endif
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}
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static cyg_bool
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find_ide_match_func( cyg_uint16 v, cyg_uint16 d, cyg_uint32 c, void *p )
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{
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return ((v == 0x105A) && (d == 0x4D68));
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}
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int
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cyg_hal_plf_ide_init(void)
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{
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int i;
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cyg_pci_device_id ide_dev = CYG_PCI_NULL_DEVID;
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cyg_pci_device ide_info;
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#if (IDE_DEBUG & 0x01)
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diag_printf("Initializing IDE controller\n");
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#endif
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if (cyg_pci_find_matching(&find_ide_match_func, NULL, &ide_dev)) {
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cyg_pci_get_device_info(ide_dev, &ide_info);
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#if (IDE_DEBUG & 0x01)
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for (i = 0; i < 6; i++) {
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diag_printf("IDE - base[%d]: %08p, size: %08p, map: %08p\n",
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i, ide_info.base_address[i], ide_info.base_size[i], ide_info.base_map[i]);
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}
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#endif
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for (i = 0; i < HAL_IDE_NUM_CONTROLLERS; i++) {
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ide_ctrl[i].cmd_bar = ide_info.base_map[(2*i)+0] & 0xFFFFFFFE;
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ide_ctrl[i].ctl_bar = ide_info.base_map[(2*i)+1] & 0xFFFFFFFE;
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}
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return HAL_IDE_NUM_CONTROLLERS;
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} else {
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#if (IDE_DEBUG & 0x01)
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diag_printf("Can't find IDE controller!\n");
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#endif
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return 0;
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}
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}
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