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//==========================================================================
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//
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// cpm.c
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//
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// PowerPC QUICC support functions
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 2003 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): Gary Thomas
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// Contributors:
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// Date: 2003-03-04
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// Purpose: Common support for the QUICC/CPM
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// Description:
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//
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// Usage:
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// Notes:
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/hal_powerpc_quicc.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/infra/cyg_ass.h>
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#include <cyg/hal/hal_arch.h>
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#include <string.h> // memset
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// eCos headers decribing PowerQUICC:
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#include <cyg/hal/quicc/ppc8xx.h>
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// Information about DPRAM usage
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// This lets the CPM/DPRAM information be shared by all environments
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//
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static short *nextBd = (short *)(CYGHWR_HAL_VSR_TABLE + 0x1F0);
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/*
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* Reset the communications processor
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*/
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void
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_mpc8xx_reset_cpm(void)
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{
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EPPC *eppc = eppc_base();
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static int init_done = 0;
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if (init_done) return;
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init_done++;
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eppc->cp_cr = QUICC_CPM_CR_RESET | QUICC_CPM_CR_BUSY;
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memset(eppc->pram, 0, sizeof(eppc->pram));
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while (eppc->cp_cr & QUICC_CPM_CR_BUSY)
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CYG_EMPTY_STATEMENT;
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*nextBd = QUICC_BD_BASE;
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}
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//
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// Allocate a chunk of memory in the shared CPM memory, typically
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// used for buffer descriptors, etc. The length will be aligned
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// to a multiple of 8 bytes.
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//
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unsigned short
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_mpc8xx_allocBd(int len)
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{
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unsigned short bd;
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bd = *nextBd;
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if ((bd < QUICC_BD_BASE) || (bd > QUICC_BD_END)) {
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// Most likely not set up - make a guess :-(
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bd = *nextBd = QUICC_BD_BASE+0x400;
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}
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CYG_ASSERT((len & 0x7) == 0, "BD length must be multiple of 8 bytes");
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len = (len + 7) & ~7; // Multiple of 8 bytes
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*nextBd += len;
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CYG_ASSERT(*nextBd < QUICC_BD_END, "Out of buffer descriptors!");
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if (*nextBd >= QUICC_BD_END) {
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*nextBd = QUICC_BD_BASE;
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}
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return bd;
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}
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#define BRG_MAX 4
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#define BRG_UNAVAIL -1
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#define BRG_FREE -2
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static unsigned long *brg[BRG_MAX]; // Available generators
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static int alloc[BRG_MAX]; // Which port is assigned where
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// -1 indicates unavailable
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// -2 indicates free
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// xx indicates port assignment
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static void
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_mpc8xx_mark_brg(int port, int brgnum)
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{
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if (brgnum >= BRG_MAX) {
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return; // Invalid selection
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}
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if (alloc[brgnum] == BRG_FREE) {
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// Allocation unknown
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alloc[brgnum] = port;
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}
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}
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unsigned long *
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_mpc8xx_allocate_brg(int port)
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{
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EPPC *eppc = eppc_base();
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static int init = 0;
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int brgnum;
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if (!init) {
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// Set up available pool
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#if defined(CYGHWR_HAL_POWERPC_MPC8XX_852T)
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// The 852T variant only has BRG3/BRG4
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alloc[0] = BRG_UNAVAIL;
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alloc[1] = BRG_UNAVAIL;
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#else
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brg[0] = (unsigned long *)&eppc->brgc1; alloc[0] = BRG_FREE;
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brg[1] = (unsigned long *)&eppc->brgc2; alloc[1] = BRG_FREE;
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#endif
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brg[2] = (unsigned long *)&eppc->brgc3; alloc[2] = BRG_FREE;
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brg[3] = (unsigned long *)&eppc->brgc4; alloc[3] = BRG_FREE;
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#if !defined(CYGSEM_HAL_ROM_MONITOR)
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// Figure out how hardware was set by previous ROM monitor
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#if CYGNUM_HAL_QUICC_SMC1 > 0
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_mpc8xx_mark_brg(QUICC_CPM_SMC1, (eppc->si_simode >> 12) & 0x07);
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#endif
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#if CYGNUM_HAL_QUICC_SMC2 > 0
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_mpc8xx_mark_brg(QUICC_CPM_SMC2, (eppc->si_simode >> 28) & 0x07);
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#endif
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#if CYGNUM_HAL_QUICC_SCC1 > 0
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_mpc8xx_mark_brg(QUICC_CPM_SCC1, (eppc->si_sicr >> 0) & 0x07);
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#endif
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#if CYGNUM_HAL_QUICC_SCC2 > 0
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_mpc8xx_mark_brg(QUICC_CPM_SCC2, (eppc->si_sicr >> 8) & 0x07);
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#endif
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#if CYGNUM_HAL_QUICC_SCC3 > 0
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_mpc8xx_mark_brg(QUICC_CPM_SCC3, (eppc->si_sicr >> 16) & 0x07);
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#endif
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#if CYGNUM_HAL_QUICC_SCC4 > 0
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_mpc8xx_mark_brg(QUICC_CPM_SCC4, (eppc->si_sicr >> 24) & 0x07);
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#endif
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#endif
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init = 1;
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}
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// Find a free generator (or if port has already been assigned)
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for (brgnum = 0; brgnum < BRG_MAX; brgnum++) {
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if (alloc[brgnum] >= 0) {
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// See if it is for this port
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if (alloc[brgnum] == port) {
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// It is - just reuse it (already set up)
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return brg[brgnum];
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}
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}
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}
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// Not currently assigned, try and find a free one
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for (brgnum = 0; brgnum < BRG_MAX; brgnum++) {
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if (alloc[brgnum] == BRG_FREE) {
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// Allocate to this port.
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alloc[brgnum] = port;
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break;
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}
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}
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CYG_ASSERT(brgnum < BRG_MAX, "Out of baud rate generators!");
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// If no generator found - punt!
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if (brgnum == BRG_MAX) {
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brgnum = BRG_MAX-1;
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}
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// Set up clock routing for new assignment
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switch (port) {
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#if CYGNUM_HAL_QUICC_SMC1 > 0
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case QUICC_CPM_SMC1:
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eppc->si_simode = (eppc->si_simode & ~(0x07<<12)) | (brgnum<<12);
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break;
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#endif
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#if CYGNUM_HAL_QUICC_SMC2 > 0
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case QUICC_CPM_SMC2:
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eppc->si_simode = (eppc->si_simode & ~(0x07<<28)) | (brgnum<<28);
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break;
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#endif
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#if CYGNUM_HAL_QUICC_SCC1 > 0
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case QUICC_CPM_SCC1:
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eppc->si_sicr = (eppc->si_sicr & ~(0xFF<<0)) | (((brgnum<<3)|(brgnum<<0))<<0);
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break;
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#endif
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#if CYGNUM_HAL_QUICC_SCC2 > 0
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case QUICC_CPM_SCC2:
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eppc->si_sicr = (eppc->si_sicr & ~(0xFF<<8)) | (((brgnum<<3)|(brgnum<<0))<<8);
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break;
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#endif
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#if CYGNUM_HAL_QUICC_SCC3 > 0
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case QUICC_CPM_SCC3:
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eppc->si_sicr = (eppc->si_sicr & ~(0xFF<<16)) | (((brgnum<<3)|(brgnum<<0))<<16);
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break;
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#endif
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#if CYGNUM_HAL_QUICC_SCC4 > 0
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case QUICC_CPM_SCC4:
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eppc->si_sicr = (eppc->si_sicr & ~(0xFF<<24)) | (((brgnum<<3)|(brgnum<<0))<<24);
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break;
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#endif
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}
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return brg[brgnum];
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}
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// EOF cpm.c
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