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# ====================================================================

#

#      hal_powerpc_viper.cdl

#

#      PowerPC/VIPER board HAL package configuration data

#

# ====================================================================

## ####ECOSGPLCOPYRIGHTBEGIN####

## -------------------------------------------

## This file is part of eCos, the Embedded Configurable Operating System.

## Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.

##

## eCos is free software; you can redistribute it and/or modify it under

## the terms of the GNU General Public License as published by the Free

## Software Foundation; either version 2 or (at your option) any later

## version.

##

## eCos is distributed in the hope that it will be useful, but WITHOUT

## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

## for more details.

##

## You should have received a copy of the GNU General Public License

## along with eCos; if not, write to the Free Software Foundation, Inc.,

## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.

##

## As a special exception, if other files instantiate templates or use

## macros or inline functions from this file, or you compile this file

## and link it with other works to produce a work based on this file,

## this file does not by itself cause the resulting work to be covered by

## the GNU General Public License. However the source code for this file

## must still be made available in accordance with section (3) of the GNU

## General Public License v2.

##

## This exception does not invalidate any other reasons why a work based

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## -------------------------------------------

## ####ECOSGPLCOPYRIGHTEND####

# ====================================================================

######DESCRIPTIONBEGIN####

#

# Author(s):      jskov

# Original data:  hmt

# Contributors:   gthomas

# Date:           1999-11-02

#

#####DESCRIPTIONEND####

#

# ====================================================================

cdl_package CYGPKG_HAL_POWERPC_VIPER {

    display       "A&M Viper PowerPC evaluation board"

    parent        CYGPKG_HAL_POWERPC

    requires      CYGPKG_HAL_POWERPC_MPC8xx

    define_header hal_powerpc_viper.h

    include_dir   cyg/hal

    description   "

        The VIPER HAL package provides the support needed to run

        eCos on a A&M Viper board equipped with a PowerPC processor."

    compile       hal_diag.c hal_aux.c viper.S

    implements    CYGINT_HAL_DEBUG_GDB_STUBS

    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK

    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT

    implements    CYGNUM_HAL_QUICC_SMC1

    implements    CYGNUM_HAL_QUICC_SCC1

    define_proc {

        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "

        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "

    }

    cdl_component CYGPKG_HAL_POWERPC_VIPER_MODEL {

        display       "Viper model"

        requires      { (CYGHWR_HAL_POWERPC_VIPER_I + CYGHWR_HAL_POWERPC_VIPER_II) == 1 }

        default_value 1

        no_define

        description "

           The sub-options of this component define the model of Viper"

        cdl_option  CYGHWR_HAL_POWERPC_VIPER_I {

            display       "Viper-I with 860T"

            requires      !CYGHWR_HAL_POWERPC_VIPER_II

            requires      { (CYGHWR_HAL_POWERPC_MPC8XX == "860T") ||

                            (CYGHWR_HAL_POWERPC_MPC8XX == "862P") }

            default_value 1

            define_proc {

                puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"A&M Viper\""

                puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""

            }

            description "

                Select this model for an original Viper with the MPC860T or MPC862P processor."

        }

        cdl_option  CYGHWR_HAL_POWERPC_VIPER_II {

            display       "Viper-I with 860T"

            requires      !CYGHWR_HAL_POWERPC_VIPER_I

            requires      { (CYGHWR_HAL_POWERPC_MPC8XX == "860T") ||

                            (CYGHWR_HAL_POWERPC_MPC8XX == "866T") }

            default_value 0

            define_proc {

                puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"A&M Viper\""

                puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""

            }

            description "

                Select this model for a Viper with the new board layout.  This

                version will be outfitted with either a MPC860T or MPC866T processor."

        }

    }

    cdl_component CYG_HAL_STARTUP {

        display       "Startup type"

        flavor        data

        legal_values  {"RAM" "ROM" "ROMRAM"}

        default_value {"RAM"}

        no_define

        define -file system.h CYG_HAL_STARTUP

        description   "

           This option is used to control where the application program will

           run, either from RAM or ROM (flash) memory.  ROM based applications

           must be self contained, while RAM applications will typically assume

           the existence of a debug environment, such as GDB stubs."

    }

    cdl_option CYGHWR_HAL_POWERPC_BOARD_SPEED {

        display          "Development board clock speed (MHz)"

        flavor           data

        legal_values     { 47 51 55 59 63 100 133 }

        default_value    63

        description      "

           VIPER Development Boards have various system clock speeds

           depending on the processor fitted.  Select the clock speed

           appropriate for your board so that the system can set the serial

           baud rate correctly, amongst other things."

   }

    # Real-time clock/counter specifics

    cdl_component CYGNUM_HAL_RTC_CONSTANTS {

        display       "Real-time clock constants."

        description   "

            Period is busclock/16/100."

        flavor        none

        cdl_option CYGNUM_HAL_RTC_NUMERATOR {

            display       "Real-time clock numerator"

            flavor        data

            default_value 1000000000

        }

        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {

            display       "Real-time clock denominator"

            flavor        data

            default_value 100

        }

        cdl_option CYGNUM_HAL_RTC_PERIOD {

            display       "Real-time clock period"

            flavor        data

            default_value { ((((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/4)/16)/CYGNUM_HAL_RTC_DENOMINATOR) }

        }

    }

    cdl_component CYGBLD_GLOBAL_OPTIONS {

        display "Global build options"

        flavor  none

        description   "

            Global build options including control over

            compiler flags, linker flags and choice of toolchain."

        parent  CYGPKG_NONE

        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {

            display "Global command prefix"

            flavor  data

            no_define

            default_value { "powerpc-eabi" }

            description "

                This option specifies the command prefix used when

                invoking the build tools."

        }

        cdl_option CYGBLD_GLOBAL_CFLAGS {

            display "Global compiler flags"

            flavor  data

            no_define

            default_value { CYGBLD_GLOBAL_WARNFLAGS . "-msoft-float -mcpu=860 -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions " }

            description   "

                This option controls the global compiler flags which

                are used to compile all packages by

                default. Individual packages may define

                options which override these global flags."

        }

        cdl_option CYGBLD_GLOBAL_LDFLAGS {

            display "Global linker flags"

            flavor  data

            no_define

            default_value { "-msoft-float -mcpu=860 -g -nostdlib -Wl,--gc-sections -Wl,-static" }

            description   "

                This option controls the global linker flags. Individual

                packages may define options which override these global flags."

        }

        cdl_option CYGBLD_BUILD_GDB_STUBS {

            display "Build GDB stub ROM image"

            default_value 0

            requires { CYG_HAL_STARTUP == "ROM" }

            requires CYGSEM_HAL_ROM_MONITOR

            requires CYGBLD_BUILD_COMMON_GDB_STUBS

            requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS

            requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT

            requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT

            requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT

            requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM

            no_define

            description "

                This option enables the building of the GDB stubs for the

                board. The common HAL controls takes care of most of the

                build process, but the platform CDL takes care of creating

                an S-Record data file suitable for programming using

                the board's EPPC-Bug firmware monitor."

            make -priority 320 {

                /bin/gdb_module.bin : /bin/gdb_module.img

                $(OBJCOPY) -O srec --change-address=0x02000000 $< $(@:.bin=.srec)

                $(OBJCOPY) -O binary $< $@

            }

        }

    }

    cdl_component CYGPKG_HAL_POWERPC_VIPER_OPTIONS {

        display "VIPER build options"

        flavor  none

        description   "

            Package specific build options including control over

            compiler flags used only in building this package,

            and details of which tests are built."

        cdl_option CYGPKG_HAL_POWERPC_VIPER_CFLAGS_ADD {

            display "Additional compiler flags"

            flavor  data

            no_define

            default_value { "" }

            description   "

                This option modifies the set of compiler flags for

                building the VIPER HAL. These flags are used in addition

                to the set of global flags."

        }

        cdl_option CYGPKG_HAL_POWERPC_VIPER_CFLAGS_REMOVE {

            display "Suppressed compiler flags"

            flavor  data

            no_define

            default_value { "" }

            description   "

                This option modifies the set of compiler flags for

                building the VIPER HAL. These flags are removed from

                the set of global flags if present."

        }

        cdl_option CYGPKG_HAL_POWERPC_VIPER_TESTS {

            display "VIPER tests"

            flavor  data

            no_define

            calculated { "tests/vipertime" }

            description   "

                This option specifies the set of tests for the VIPER HAL."

        }

    }

    cdl_component CYGHWR_MEMORY_LAYOUT {

        display "Memory layout"

        flavor data

        no_define

        calculated { CYG_HAL_STARTUP == "RAM" ? "powerpc_viper_ram" : \

                     CYG_HAL_STARTUP == "ROMRAM" ? "powerpc_viper_romram" : \

                                                "powerpc_viper_rom" }

        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {

            display "Memory layout linker script fragment"

            flavor data

            no_define

            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI

            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \

                         CYG_HAL_STARTUP == "ROMRAM" ? "" : \

                                                    "" }

        }

        cdl_option CYGHWR_MEMORY_LAYOUT_H {

            display "Memory layout header file"

            flavor data

            no_define

            define -file system.h CYGHWR_MEMORY_LAYOUT_H

            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \

                         CYG_HAL_STARTUP == "ROMRAM" ? "" : \

                                                    "" }

        }

    }

    cdl_option CYGSEM_HAL_ROM_MONITOR {

        display       "Behave as a ROM monitor"

        flavor        bool

        default_value 0

        parent        CYGPKG_HAL_ROM_MONITOR

        requires      { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "ROMRAM" }

        description   "

            Enable this option if this program is to be used as a ROM monitor,

            i.e. applications will be loaded into RAM on the board, and this

            ROM monitor may process exceptions or interrupts generated from the

            application. This enables features such as utilizing a separate

            interrupt stack when exceptions are generated."

    }

    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {

        display       "Redboot HAL options"

        flavor        none

        no_define

        parent        CYGPKG_REDBOOT

        active_if     CYGPKG_REDBOOT

        description   "

            This option lists the target's requirements for a valid Redboot

            configuration."

        cdl_option CYGSEM_REDBOOT_PLF_LINUX_BOOT {

            active_if      CYGBLD_BUILD_REDBOOT_WITH_EXEC

            display        "Support booting Linux via RedBoot"

            flavor         bool

            default_value  1

            description    "

               This option enables RedBoot to support booting of a Linux kernel."

            compile plf_redboot_linux_exec.c

        }

        cdl_option CYGBLD_BUILD_REDBOOT_BIN {

            display       "Build Redboot ROM binary image"

            active_if     CYGBLD_BUILD_REDBOOT

            default_value 1

            no_define

            description "This option enables the conversion of the Redboot ELF

                         image to a binary image suitable for ROM programming."

#            compile -library=libextras.a redboot_cmds.c

            make -priority 325 {

                /bin/redboot.bin : /bin/redboot.elf

                $(OBJCOPY) --strip-debug $< $(@:.bin=.img)

                $(OBJCOPY) -O srec $< $(@:.bin=.srec)

                $(OBJCOPY) -O binary $< $@

            }

        }

    }

}