| 1 |
786 |
skrzyp |
#ifndef CYGONCE_HAL_VAR_BANK_H
|
| 2 |
|
|
#define CYGONCE_HAL_VAR_BANK_H
|
| 3 |
|
|
//=============================================================================
|
| 4 |
|
|
//
|
| 5 |
|
|
// hal_var_bank.h
|
| 6 |
|
|
//
|
| 7 |
|
|
// Architecture abstractions for variants without banked registers
|
| 8 |
|
|
//
|
| 9 |
|
|
//=============================================================================
|
| 10 |
|
|
// ####ECOSGPLCOPYRIGHTBEGIN####
|
| 11 |
|
|
// -------------------------------------------
|
| 12 |
|
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
| 13 |
|
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
|
| 14 |
|
|
//
|
| 15 |
|
|
// eCos is free software; you can redistribute it and/or modify it under
|
| 16 |
|
|
// the terms of the GNU General Public License as published by the Free
|
| 17 |
|
|
// Software Foundation; either version 2 or (at your option) any later
|
| 18 |
|
|
// version.
|
| 19 |
|
|
//
|
| 20 |
|
|
// eCos is distributed in the hope that it will be useful, but WITHOUT
|
| 21 |
|
|
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
| 22 |
|
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
| 23 |
|
|
// for more details.
|
| 24 |
|
|
//
|
| 25 |
|
|
// You should have received a copy of the GNU General Public License
|
| 26 |
|
|
// along with eCos; if not, write to the Free Software Foundation, Inc.,
|
| 27 |
|
|
// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
|
| 28 |
|
|
//
|
| 29 |
|
|
// As a special exception, if other files instantiate templates or use
|
| 30 |
|
|
// macros or inline functions from this file, or you compile this file
|
| 31 |
|
|
// and link it with other works to produce a work based on this file,
|
| 32 |
|
|
// this file does not by itself cause the resulting work to be covered by
|
| 33 |
|
|
// the GNU General Public License. However the source code for this file
|
| 34 |
|
|
// must still be made available in accordance with section (3) of the GNU
|
| 35 |
|
|
// General Public License v2.
|
| 36 |
|
|
//
|
| 37 |
|
|
// This exception does not invalidate any other reasons why a work based
|
| 38 |
|
|
// on this file might be covered by the GNU General Public License.
|
| 39 |
|
|
// -------------------------------------------
|
| 40 |
|
|
// ####ECOSGPLCOPYRIGHTEND####
|
| 41 |
|
|
//=============================================================================
|
| 42 |
|
|
//#####DESCRIPTIONBEGIN####
|
| 43 |
|
|
//
|
| 44 |
|
|
// Author(s): jskov
|
| 45 |
|
|
// Contributors:jskov
|
| 46 |
|
|
// Date: 2002-01-11
|
| 47 |
|
|
// Purpose: Architecture abstractions for variants without banked registers
|
| 48 |
|
|
//
|
| 49 |
|
|
//####DESCRIPTIONEND####
|
| 50 |
|
|
//
|
| 51 |
|
|
//=============================================================================
|
| 52 |
|
|
|
| 53 |
|
|
//-----------------------------------------------------------------------------
|
| 54 |
|
|
// Processor saved states:
|
| 55 |
|
|
|
| 56 |
|
|
typedef struct
|
| 57 |
|
|
{
|
| 58 |
|
|
// These are common to all saved states
|
| 59 |
|
|
cyg_uint32 r[16]; // Data regs
|
| 60 |
|
|
cyg_uint32 macl; // Multiply and accumulate - low
|
| 61 |
|
|
cyg_uint32 mach; // Multiply and accumulate - high
|
| 62 |
|
|
cyg_uint32 pr; // Procedure Reg
|
| 63 |
|
|
#if 0 // FIXME: how are these accessed?
|
| 64 |
|
|
cyg_uint32 mod; // Modulo register
|
| 65 |
|
|
cyg_uint32 rs; // Repeat start
|
| 66 |
|
|
cyg_uint32 re; // Repeat end
|
| 67 |
|
|
#endif
|
| 68 |
|
|
cyg_uint32 sr; // Status Reg
|
| 69 |
|
|
cyg_uint32 pc; // Program Counter
|
| 70 |
|
|
|
| 71 |
|
|
// This marks the limit of state saved during a context switch and
|
| 72 |
|
|
// is used to calculate necessary stack allocation for context switches.
|
| 73 |
|
|
// It would probably be better to have a union instead...
|
| 74 |
|
|
cyg_uint32 context_size[0];
|
| 75 |
|
|
|
| 76 |
|
|
// These are only saved on interrupts
|
| 77 |
|
|
cyg_uint32 vbr; // Vector Base Register
|
| 78 |
|
|
cyg_uint32 gbr; // Global Base Register
|
| 79 |
|
|
|
| 80 |
|
|
// These are only saved on interrupts
|
| 81 |
|
|
cyg_uint32 event; // vector number
|
| 82 |
|
|
} HAL_SavedRegisters;
|
| 83 |
|
|
|
| 84 |
|
|
//-----------------------------------------------------------------------------
|
| 85 |
|
|
// Context Initialization
|
| 86 |
|
|
// Initialize the context of a thread.
|
| 87 |
|
|
// Arguments:
|
| 88 |
|
|
// _sparg_ name of variable containing current sp, will be written with new sp
|
| 89 |
|
|
// _thread_ thread object address, passed as argument to entry point
|
| 90 |
|
|
// _entry_ entry point address.
|
| 91 |
|
|
// _id_ bit pattern used in initializing registers, for debugging.
|
| 92 |
|
|
|
| 93 |
|
|
#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \
|
| 94 |
|
|
CYG_MACRO_START \
|
| 95 |
|
|
register CYG_WORD _sp_ = (CYG_WORD)_sparg_; \
|
| 96 |
|
|
register HAL_SavedRegisters *_regs_; \
|
| 97 |
|
|
int _i_; \
|
| 98 |
|
|
_sp_ = _sp_ & ~(CYGARC_ALIGNMENT-1); \
|
| 99 |
|
|
/* Note that _regs_ below should be aligned if HAL_SavedRegisters */ \
|
| 100 |
|
|
/* stops being aligned to CYGARC_ALIGNMENT */ \
|
| 101 |
|
|
_regs_ = (HAL_SavedRegisters *)((_sp_) - sizeof(HAL_SavedRegisters)); \
|
| 102 |
|
|
for( _i_ = 0; _i_ < 16; _i_++ ) (_regs_)->r[_i_] = (_id_)|_i_; \
|
| 103 |
|
|
(_regs_)->r[15] = (CYG_WORD)(_regs_); /* SP = top of stack */ \
|
| 104 |
|
|
(_regs_)->r[04] = (CYG_WORD)(_thread_); /* R4 = arg1 = thread ptr */ \
|
| 105 |
|
|
(_regs_)->mach = 0; /* MACH = 0 */ \
|
| 106 |
|
|
(_regs_)->macl = 0; /* MACL = 0 */ \
|
| 107 |
|
|
(_regs_)->pr = (CYG_WORD)(_entry_); /* PR = entry point */ \
|
| 108 |
|
|
(_regs_)->sr = 0; /* SR = enable interrupts */ \
|
| 109 |
|
|
(_regs_)->pc = (CYG_WORD)(_entry_); /* set PC for thread dbg */ \
|
| 110 |
|
|
_sparg_ = (CYG_ADDRESS)_regs_; \
|
| 111 |
|
|
CYG_MACRO_END
|
| 112 |
|
|
|
| 113 |
|
|
//-----------------------------------------------------------------------------
|
| 114 |
|
|
// Thread register state manipulation for GDB support.
|
| 115 |
|
|
|
| 116 |
|
|
// Translate a stack pointer as saved by the thread context macros above into
|
| 117 |
|
|
// a pointer to a HAL_SavedRegisters structure.
|
| 118 |
|
|
#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \
|
| 119 |
|
|
(_regs_) = (HAL_SavedRegisters *)(_sp_)
|
| 120 |
|
|
|
| 121 |
|
|
// Copy a set of registers from a HAL_SavedRegisters structure into a
|
| 122 |
|
|
// GDB ordered array.
|
| 123 |
|
|
#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ ) \
|
| 124 |
|
|
CYG_MACRO_START \
|
| 125 |
|
|
CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \
|
| 126 |
|
|
int _i_; \
|
| 127 |
|
|
\
|
| 128 |
|
|
for( _i_ = 0; _i_ < 16; _i_++ ) \
|
| 129 |
|
|
_regval_[_i_] = (_regs_)->r[_i_]; \
|
| 130 |
|
|
\
|
| 131 |
|
|
_regval_[16] = (_regs_)->pc; \
|
| 132 |
|
|
_regval_[17] = (_regs_)->pr; \
|
| 133 |
|
|
_regval_[18] = (_regs_)->gbr; \
|
| 134 |
|
|
_regval_[19] = (_regs_)->vbr; \
|
| 135 |
|
|
_regval_[20] = (_regs_)->mach; \
|
| 136 |
|
|
_regval_[21] = (_regs_)->macl; \
|
| 137 |
|
|
_regval_[22] = (_regs_)->sr; \
|
| 138 |
|
|
\
|
| 139 |
|
|
/* 23-51 not used atm. */ \
|
| 140 |
|
|
CYG_MACRO_END
|
| 141 |
|
|
|
| 142 |
|
|
// Copy a GDB ordered array into a HAL_SavedRegisters structure.
|
| 143 |
|
|
#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \
|
| 144 |
|
|
CYG_MACRO_START \
|
| 145 |
|
|
CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \
|
| 146 |
|
|
int _i_; \
|
| 147 |
|
|
\
|
| 148 |
|
|
for( _i_ = 0; _i_ < 16; _i_++ ) \
|
| 149 |
|
|
(_regs_)->r[_i_] = _regval_[_i_]; \
|
| 150 |
|
|
\
|
| 151 |
|
|
(_regs_)->pc = _regval_[16]; \
|
| 152 |
|
|
(_regs_)->pr = _regval_[17]; \
|
| 153 |
|
|
(_regs_)->gbr = _regval_[18]; \
|
| 154 |
|
|
(_regs_)->vbr = _regval_[19]; \
|
| 155 |
|
|
(_regs_)->mach = _regval_[20]; \
|
| 156 |
|
|
(_regs_)->macl = _regval_[21]; \
|
| 157 |
|
|
(_regs_)->sr = _regval_[22]; \
|
| 158 |
|
|
CYG_MACRO_END
|
| 159 |
|
|
|
| 160 |
|
|
//--------------------------------------------------------------------------
|
| 161 |
|
|
// CPU address space translation macros
|
| 162 |
|
|
#define CYGARC_BUS_ADDRESS(x) ((CYG_ADDRWORD)(x) & 0x1fffffff)
|
| 163 |
|
|
#define CYGARC_CACHED_ADDRESS(x) (CYGARC_BUS_ADDRESS(x)|0x00000000)
|
| 164 |
|
|
#define CYGARC_UNCACHED_ADDRESS(x) (CYGARC_BUS_ADDRESS(x)|0x20000000)
|
| 165 |
|
|
|
| 166 |
|
|
//-----------------------------------------------------------------------------
|
| 167 |
|
|
#endif // CYGONCE_HAL_VAR_BANK_H
|
| 168 |
|
|
// End of hal_var_bank.h
|
