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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [sh/] [hs7729pci/] [current/] [include/] [plf_io.h] - Blame information for rev 817

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1 786 skrzyp
#ifndef CYGONCE_PLF_IO_H
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#define CYGONCE_PLF_IO_H
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//=============================================================================
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//
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//      plf_io.h
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//
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//      Platform specific IO support
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    jskov 
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// Contributors: jskov
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// Date:         2001-05-29
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// Purpose:      HS7729PCI SD0001 PCI IO support macros
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// Description: 
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// Usage:        #include <cyg/hal/plf_io.h>
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <cyg/hal/hal_io.h>             // IO macros
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#include <cyg/hal/sd0001.h>             // SD0001 registers
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#include <cyg/hal/hal_intr.h>           // interrupt
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extern cyg_uint32 cyg_hal_plf_pci_cfg_read_dword (cyg_uint32 bus, cyg_uint32 devfn,
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                                                  cyg_uint32 offset);
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extern cyg_uint16 cyg_hal_plf_pci_cfg_read_word  (cyg_uint32 bus, cyg_uint32 devfn,
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                                                  cyg_uint32 offset);
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extern cyg_uint8 cyg_hal_plf_pci_cfg_read_byte   (cyg_uint32 bus, cyg_uint32 devfn,
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                                                  cyg_uint32 offset);
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extern void cyg_hal_plf_pci_cfg_write_dword (cyg_uint32 bus, cyg_uint32 devfn,
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                                             cyg_uint32 offset, cyg_uint32 val);
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extern void cyg_hal_plf_pci_cfg_write_word  (cyg_uint32 bus, cyg_uint32 devfn,
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                                             cyg_uint32 offset, cyg_uint16 val);
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extern void cyg_hal_plf_pci_cfg_write_byte   (cyg_uint32 bus, cyg_uint32 devfn,
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                                              cyg_uint32 offset, cyg_uint8 val);
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// Initialize the PCI bus.
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externC void cyg_hal_plf_pci_init(void);
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#define HAL_PCI_INIT() cyg_hal_plf_pci_init()
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// Map PCI device resources starting from these addresses in PCI space.
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#define HAL_PCI_ALLOC_BASE_IO     0x00000000
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#define HAL_PCI_ALLOC_BASE_MEMORY 0x00000000
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// This is where the PCI spaces are mapped in the CPU's address space.
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#define HAL_PCI_PHYSICAL_IO_BASE     0xb0800000
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#define HAL_PCI_PHYSICAL_MEMORY_BASE 0xb1000000
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// Read a value from the PCI configuration space of the appropriate
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// size at an address composed from the bus, devfn and offset.
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#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val )  \
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    __val = cyg_hal_plf_pci_cfg_read_byte((__bus),  (__devfn), (__offset))
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#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val ) \
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    __val = cyg_hal_plf_pci_cfg_read_word((__bus),  (__devfn), (__offset))
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#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val ) \
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    __val = cyg_hal_plf_pci_cfg_read_dword((__bus),  (__devfn), (__offset))
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// Write a value to the PCI configuration space of the appropriate
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// size at an address composed from the bus, devfn and offset.
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#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val )  \
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    cyg_hal_plf_pci_cfg_write_byte((__bus),  (__devfn), (__offset), (__val))
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#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val ) \
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    cyg_hal_plf_pci_cfg_write_word((__bus),  (__devfn), (__offset), (__val))
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#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val ) \
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    cyg_hal_plf_pci_cfg_write_dword((__bus),  (__devfn), (__offset), (__val))
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// Read/write data to PCI IO space
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#if 0
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extern void cyg_hal_plf_pci_io_write_byte (cyg_uint32 addr, cyg_uint8 data);
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extern void cyg_hal_plf_pci_io_write_word (cyg_uint32 addr, cyg_uint16 data);
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extern void cyg_hal_plf_pci_io_write_dword (cyg_uint32 addr, cyg_uint32 data);
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extern cyg_uint8 cyg_hal_plf_pci_io_read_byte (cyg_uint32 addr);
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extern cyg_uint16 cyg_hal_plf_pci_io_read_word (cyg_uint32 addr);
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extern cyg_uint32 cyg_hal_plf_pci_io_read_dword (cyg_uint32 addr);
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#define HAL_PCI_IO_READ_UINT8(addr, datum)   datum = cyg_hal_plf_pci_io_read_byte((cyg_uint32)addr)
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#define HAL_PCI_IO_READ_UINT16(addr, datum)  datum = cyg_hal_plf_pci_io_read_word((cyg_uint32)addr)
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#define HAL_PCI_IO_READ_UINT32(addr, datum)  datum = cyg_hal_plf_pci_io_read_dword((cyg_uint32)addr)
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#define HAL_PCI_IO_WRITE_UINT8(addr, datum)  cyg_hal_plf_pci_io_write_byte((cyg_uint32)addr, datum)
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#define HAL_PCI_IO_WRITE_UINT16(addr, datum) cyg_hal_plf_pci_io_write_word((cyg_uint32)addr, datum)
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#define HAL_PCI_IO_WRITE_UINT32(addr, datum) cyg_hal_plf_pci_io_write_dword((cyg_uint32)addr, datum)
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#endif
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// Translate the PCI interrupt requested by the device (INTA#, INTB#,
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// INTC# or INTD#) to the associated CPU interrupt (i.e., HAL vector).
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#define HAL_PCI_TRANSLATE_INTERRUPT( __bus, __devfn, __vec, __valid)          \
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    CYG_MACRO_START                                                           \
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    cyg_uint8 __req;                                                          \
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    HAL_PCI_CFG_READ_UINT8(__bus, __devfn, CYG_PCI_CFG_INT_PIN, __req);       \
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    if (0 != __req) {                                                         \
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        CYG_ADDRWORD __translation[4] = {                                     \
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            CYGNUM_HAL_INTERRUPT_PCIC,                                        \
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            CYGNUM_HAL_INTERRUPT_PCIB,                                        \
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            CYGNUM_HAL_INTERRUPT_PCIA,                                        \
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            CYGNUM_HAL_INTERRUPT_PCID};                                       \
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                                                                              \
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        __vec = __translation[((__req+CYG_PCI_DEV_GET_DEV(__devfn))&3)];      \
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        __valid = true;                                                       \
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    } else {                                                                  \
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        /* Device will not generate interrupt requests. */                    \
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        __valid = false;                                                      \
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    }                                                                         \
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    CYG_MACRO_END
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// Can only do local bus (I think, my Japanese isn't good enough to be sure :)
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// Ignore all but the first function on the SD0001
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#define HAL_PCI_IGNORE_DEVICE(__bus, __dev, __fn)         \
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 ((0 != __bus)                                            \
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  || ((0 == __dev) && (0 != __fn)))
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// Bus address translation macros
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#define HAL_PCI_CPU_TO_BUS(__cpu_addr, __bus_addr)   \
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    CYG_MACRO_START                                  \
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    (__bus_addr) = CYGARC_BUS_ADDRESS(__cpu_addr);   \
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    CYG_MACRO_END
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#define HAL_PCI_BUS_TO_CPU(__bus_addr, __cpu_addr)        \
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    CYG_MACRO_START                                       \
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    (__cpu_addr) = CYGARC_UNCACHED_ADDRESS(__bus_addr);   \
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    CYG_MACRO_END
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//-----------------------------------------------------------------------------
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// end of plf_io.h
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#endif // CYGONCE_PLF_IO_H

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