| 1 |
786 |
skrzyp |
//=============================================================================
|
| 2 |
|
|
//
|
| 3 |
|
|
// smsc37c93x.c
|
| 4 |
|
|
//
|
| 5 |
|
|
// Init code for SMSC 37C93x super IO controller
|
| 6 |
|
|
//
|
| 7 |
|
|
//=============================================================================
|
| 8 |
|
|
// ####ECOSGPLCOPYRIGHTBEGIN####
|
| 9 |
|
|
// -------------------------------------------
|
| 10 |
|
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
| 11 |
|
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
|
| 12 |
|
|
//
|
| 13 |
|
|
// eCos is free software; you can redistribute it and/or modify it under
|
| 14 |
|
|
// the terms of the GNU General Public License as published by the Free
|
| 15 |
|
|
// Software Foundation; either version 2 or (at your option) any later
|
| 16 |
|
|
// version.
|
| 17 |
|
|
//
|
| 18 |
|
|
// eCos is distributed in the hope that it will be useful, but WITHOUT
|
| 19 |
|
|
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
| 20 |
|
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
| 21 |
|
|
// for more details.
|
| 22 |
|
|
//
|
| 23 |
|
|
// You should have received a copy of the GNU General Public License
|
| 24 |
|
|
// along with eCos; if not, write to the Free Software Foundation, Inc.,
|
| 25 |
|
|
// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
|
| 26 |
|
|
//
|
| 27 |
|
|
// As a special exception, if other files instantiate templates or use
|
| 28 |
|
|
// macros or inline functions from this file, or you compile this file
|
| 29 |
|
|
// and link it with other works to produce a work based on this file,
|
| 30 |
|
|
// this file does not by itself cause the resulting work to be covered by
|
| 31 |
|
|
// the GNU General Public License. However the source code for this file
|
| 32 |
|
|
// must still be made available in accordance with section (3) of the GNU
|
| 33 |
|
|
// General Public License v2.
|
| 34 |
|
|
//
|
| 35 |
|
|
// This exception does not invalidate any other reasons why a work based
|
| 36 |
|
|
// on this file might be covered by the GNU General Public License.
|
| 37 |
|
|
// -------------------------------------------
|
| 38 |
|
|
// ####ECOSGPLCOPYRIGHTEND####
|
| 39 |
|
|
//=============================================================================
|
| 40 |
|
|
//#####DESCRIPTIONBEGIN####
|
| 41 |
|
|
//
|
| 42 |
|
|
// Author(s): jskov
|
| 43 |
|
|
// Contributors:jskov
|
| 44 |
|
|
// Date: 2001-05-30
|
| 45 |
|
|
// Description: Init code for SMSC 37C93x super IO controller
|
| 46 |
|
|
//
|
| 47 |
|
|
//####DESCRIPTIONEND####
|
| 48 |
|
|
//
|
| 49 |
|
|
//=============================================================================
|
| 50 |
|
|
|
| 51 |
|
|
#include <pkgconf/hal.h>
|
| 52 |
|
|
#include CYGBLD_HAL_PLATFORM_H
|
| 53 |
|
|
|
| 54 |
|
|
#include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP macros
|
| 55 |
|
|
#include <cyg/hal/hal_io.h> // IO macros
|
| 56 |
|
|
#include <cyg/hal/hal_intr.h> // interrupt vectors
|
| 57 |
|
|
|
| 58 |
|
|
|
| 59 |
|
|
//-----------------------------------------------------------------------------
|
| 60 |
|
|
|
| 61 |
|
|
#define SMSC_READ_UINT8(_a_, _d_) \
|
| 62 |
|
|
CYG_MACRO_START \
|
| 63 |
|
|
cyg_uint16 t; \
|
| 64 |
|
|
HAL_READ_UINT16((_a_), t); \
|
| 65 |
|
|
(_d_) = (t >> 8) & 0xff; \
|
| 66 |
|
|
CYG_MACRO_END
|
| 67 |
|
|
|
| 68 |
|
|
#define SMSC_WRITE_UINT8(_a_, _d_) \
|
| 69 |
|
|
CYG_MACRO_START \
|
| 70 |
|
|
HAL_WRITE_UINT16((_a_), (_d_)<<8); \
|
| 71 |
|
|
CYG_MACRO_END
|
| 72 |
|
|
|
| 73 |
|
|
//-----------------------------------------------------------------------------
|
| 74 |
|
|
|
| 75 |
|
|
// From page 137+ in SMSC-37C93x.pdf
|
| 76 |
|
|
#define SMSC_CONFIG 0xa80007e0
|
| 77 |
|
|
#define SMSC_CONFIG_DATA 0xa80007e2
|
| 78 |
|
|
|
| 79 |
|
|
#define SMSC_CONFIG_DEV 0x07
|
| 80 |
|
|
#define SMSC_CONFIG_POWER 0x22
|
| 81 |
|
|
#define SMSC_CONFIG_ACTIVATE 0x30
|
| 82 |
|
|
#define SMSC_CONFIG_ENTER 0x55
|
| 83 |
|
|
#define SMSC_CONFIG_BASE_HIGH 0x60
|
| 84 |
|
|
#define SMSC_CONFIG_BASE_LOW 0x61
|
| 85 |
|
|
#define SMSC_CONFIG_IRQ 0x70
|
| 86 |
|
|
#define SMSC_CONFIG_EXIT 0xaa
|
| 87 |
|
|
#define SMSC_CONFIG_MODE 0xf0
|
| 88 |
|
|
|
| 89 |
|
|
#define SMSC_CONFIG_DEV_COM1 0x04
|
| 90 |
|
|
#define SMSC_CONFIG_DEV_COM2 0x05
|
| 91 |
|
|
#define SMSC_CONFIG_DEV_RTC 0x06
|
| 92 |
|
|
|
| 93 |
|
|
#define SMSC_CONFIG_MODE_HIGH 0x02
|
| 94 |
|
|
|
| 95 |
|
|
#define SMSC_CONFIG_ACTIVATE_ENABLE 0x01
|
| 96 |
|
|
|
| 97 |
|
|
#define SMSC_CONFIG_POWER_COM1 0x10
|
| 98 |
|
|
#define SMSC_CONFIG_POWER_COM2 0x20
|
| 99 |
|
|
|
| 100 |
|
|
|
| 101 |
|
|
void
|
| 102 |
|
|
cyg_hal_init_superIO(void)
|
| 103 |
|
|
{
|
| 104 |
|
|
// Note: two writes unlike the 37m81x!
|
| 105 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ENTER);
|
| 106 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ENTER);
|
| 107 |
|
|
|
| 108 |
|
|
// Power ON COM1 and COM2
|
| 109 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_POWER, SMSC_CONFIG_POWER_COM1|SMSC_CONFIG_POWER_COM2);
|
| 110 |
|
|
|
| 111 |
|
|
// Configure and enable COM1
|
| 112 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_DEV);
|
| 113 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_DEV_COM1);
|
| 114 |
|
|
|
| 115 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_HIGH);
|
| 116 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, 0x03);
|
| 117 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_LOW);
|
| 118 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, 0xf8);
|
| 119 |
|
|
|
| 120 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_IRQ);
|
| 121 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, 3); // UIO_IRQ3
|
| 122 |
|
|
|
| 123 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_MODE);
|
| 124 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_MODE_HIGH);
|
| 125 |
|
|
|
| 126 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ACTIVATE);
|
| 127 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_ACTIVATE_ENABLE);
|
| 128 |
|
|
|
| 129 |
|
|
// Configure and enable COM2
|
| 130 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_DEV);
|
| 131 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_DEV_COM2);
|
| 132 |
|
|
|
| 133 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_HIGH);
|
| 134 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, 0x02);
|
| 135 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_LOW);
|
| 136 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, 0xf8);
|
| 137 |
|
|
|
| 138 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_IRQ);
|
| 139 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, 4); // UIO_IRQ4
|
| 140 |
|
|
|
| 141 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_MODE);
|
| 142 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_MODE_HIGH);
|
| 143 |
|
|
|
| 144 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ACTIVATE);
|
| 145 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_ACTIVATE_ENABLE);
|
| 146 |
|
|
|
| 147 |
|
|
// Configure and enable RTC
|
| 148 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_DEV);
|
| 149 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_DEV_RTC);
|
| 150 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ACTIVATE);
|
| 151 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_ACTIVATE_ENABLE);
|
| 152 |
|
|
|
| 153 |
|
|
SMSC_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_EXIT);
|
| 154 |
|
|
}
|
| 155 |
|
|
|
| 156 |
|
|
//-----------------------------------------------------------------------------
|
| 157 |
|
|
// end of smsc37c93x.c
|
