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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [sh/] [sh3/] [current/] [include/] [var_regs.h] - Blame information for rev 786

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1 786 skrzyp
#ifndef CYGONCE_VAR_SH_REGS_H
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#define CYGONCE_VAR_SH_REGS_H
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//=============================================================================
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//
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//      sh_regs.h
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//
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//      SH CPU definitions
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   jskov
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// Contributors:jskov
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// Date:        1999-04-24
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// Purpose:     Define CPU memory mapped registers etc.
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// Usage:       #include <cyg/hal/sh_regs.h>
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// Notes:
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//   This file describes registers for on-core modules found in all
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//   the SH3 CPUs supported by the HAL. For each CPU is defined a
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//   module specification file (mod_<CPU model number>.h) which lists
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//   modules (and their version if applicable) included in that
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//   particular CPU model.  Note that the versioning is ad hoc;
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//   it doesn't reflect Hitachi internal versioning in any way.
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//              
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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// Find out which modules are supported by the chosen CPU
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#include <pkgconf/system.h>
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#include CYGBLD_HAL_CPU_MODULES_H
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//==========================================================================
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//                             CPU Definitions
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//==========================================================================
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//--------------------------------------------------------------------------
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// Status register
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#define CYGARC_REG_SR_MD                0x40000000
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#define CYGARC_REG_SR_RB                0x20000000
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#define CYGARC_REG_SR_BL                0x10000000
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#define CYGARC_REG_SR_M                 0x00000200
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#define CYGARC_REG_SR_Q                 0x00000100
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#define CYGARC_REG_SR_IMASK             0x000000f0
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#define CYGARC_REG_SR_I3                0x00000080
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#define CYGARC_REG_SR_I2                0x00000040
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#define CYGARC_REG_SR_I1                0x00000020
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#define CYGARC_REG_SR_I0                0x00000010
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#define CYGARC_REG_SR_S                 0x00000002
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#define CYGARC_REG_SR_T                 0x00000001
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//==========================================================================
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//                             Module Definitions
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//==========================================================================
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#include <cyg/hal/mod_regs_bsc.h>
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#include <cyg/hal/mod_regs_cac.h>
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#include <cyg/hal/mod_regs_cpg.h>
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#include <cyg/hal/mod_regs_intc.h>
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#include <cyg/hal/mod_regs_mmu.h>
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#include <cyg/hal/mod_regs_rtc.h>
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#include <cyg/hal/mod_regs_ser.h>
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#include <cyg/hal/mod_regs_tmu.h>
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#include <cyg/hal/mod_regs_ubc.h>
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#ifdef CYGARC_SH_MOD_DMAC
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#include <cyg/hal/mod_regs_dma.h>
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#endif
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#ifdef CYGARC_SH_MOD_PFC
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#include <cyg/hal/mod_regs_pfc.h>
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#endif
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//--------------------------------------------------------------------------
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#endif // ifndef CYGONCE_VAR_SH_REGS_H
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// End of var_regs.h

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