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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [sh/] [sh4/] [current/] [include/] [mod_202.h] - Blame information for rev 817

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1 786 skrzyp
#ifndef CYGONCE_HAL_MOD_77xx_H
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#define CYGONCE_HAL_MOD_77xx_H
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//=============================================================================
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//
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//      mod_202.h
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//
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//      List modules available on CPU
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   nickg
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// Date:        2003-08-20
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// Purpose:     Define modules (and versions) available on this CPU.
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// Usage:       Included from <cyg/hal/sh_regs.h>
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//
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//              
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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//-----------------------------------------------------------------------------
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// Modules provided by the CPU
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#define CYGARC_SH_MOD_CPG  1
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#define CYGARC_SH_MOD_SCIF 1
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#define CYGARC_SH_MOD_UBC  1
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#define CYGARC_SH_MOD_INTC 2
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//-----------------------------------------------------------------------------
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// Extra details for Cache Module (CAC)
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//=============================================================================
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// Icache
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// Cache dimenions
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#define CYGARC_SH_MOD_CAC_I_SIZE        16384 // Size of cache in bytes
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#define CYGARC_SH_MOD_CAC_I_LINE_SIZE   32    // Size of a cache line
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#define CYGARC_SH_MOD_CAC_I_WAYS        2     // Associativity of the cache
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// Cache addressing information
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// entry: bits 12 -  5
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#define CYGARC_SH_MOD_ICAC_ADDRESS_BASE   0xf0000000
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#define CYGARC_SH_MOD_ICAC_ADDRESS_TOP    0xf0004000
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#define CYGARC_SH_MOD_ICAC_ADDRESS_STEP   0x00000020
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// V : bit 0
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// Writing zero to V forces an invalidate of the line
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#define CYGARC_SH_MOD_ICAC_ADDRESS_FLUSH  0x00000000
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//=============================================================================
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// Dcache
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// Cache dimenions
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#define CYGARC_SH_MOD_CAC_D_SIZE        32768 // Size of cache in bytes
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#define CYGARC_SH_MOD_CAC_D_LINE_SIZE   32    // Size of a cache line
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#define CYGARC_SH_MOD_CAC_D_WAYS        2     // Associativity of the cache
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// Cache addressing information
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// entry: bits 13 -  5
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#define CYGARC_SH_MOD_DCAC_ADDRESS_BASE   0xf4000000
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#define CYGARC_SH_MOD_DCAC_ADDRESS_TOP    0xf4008000
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#define CYGARC_SH_MOD_DCAC_ADDRESS_STEP   0x00000020
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// U : bit 1
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// V : bit 0
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// Writing zero to both forces a flush of the line if it is dirty.
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#define CYGARC_SH_MOD_DCAC_ADDRESS_FLUSH  0x00000000
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//-----------------------------------------------------------------------------
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// Extra details for interrupt handling
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#define CYGARC_SH_SOFTWARE_IP_UPDATE
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#endif // CYGONCE_HAL_MOD_202_H

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