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//=============================================================================
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//
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// mod_regs_pcic.h
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//
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// PCIC (PCI controller) Module register definitions
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): jskov
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// Contributors:jskov
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// Date: 2001-07-10
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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//--------------------------------------------------------------------------
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// PCI control registers
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#define CYGARC_REG_PCIC_BASE 0xfe200000
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#define CYGARC_REG_PCIC_IO_BASE 0xfe240000
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#define CYGARC_REG_PCIC_IO_BASE_MASK 0x0003ffff
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#define CYGARC_REG_PCIC_MEM_BASE 0xfd000000
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#define CYGARC_REG_PCIC_CFG (CYGARC_REG_PCIC_BASE)
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#define CYGARC_REG_PCIC_CR (CYGARC_REG_PCIC_BASE + 0x100)
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#define CYGARC_REG_PCIC_LSR0 (CYGARC_REG_PCIC_BASE + 0x104)
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#define CYGARC_REG_PCIC_LSR1 (CYGARC_REG_PCIC_BASE + 0x108)
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#define CYGARC_REG_PCIC_LAR0 (CYGARC_REG_PCIC_BASE + 0x10c)
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#define CYGARC_REG_PCIC_LAR1 (CYGARC_REG_PCIC_BASE + 0x110)
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#define CYGARC_REG_PCIC_INT (CYGARC_REG_PCIC_BASE + 0x114)
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#define CYGARC_REG_PCIC_INTM (CYGARC_REG_PCIC_BASE + 0x118)
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#define CYGARC_REG_PCIC_ALR (CYGARC_REG_PCIC_BASE + 0x11c)
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#define CYGARC_REG_PCIC_CLR (CYGARC_REG_PCIC_BASE + 0x120)
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#define CYGARC_REG_PCIC_AINT (CYGARC_REG_PCIC_BASE + 0x130)
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#define CYGARC_REG_PCIC_AINTM (CYGARC_REG_PCIC_BASE + 0x134)
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#define CYGARC_REG_PCIC_BMLR (CYGARC_REG_PCIC_BASE + 0x138)
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#define CYGARC_REG_PCIC_DMABT (CYGARC_REG_PCIC_BASE + 0x140)
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#define CYGARC_REG_PCIC_DPA0 (CYGARC_REG_PCIC_BASE + 0x180)
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#define CYGARC_REG_PCIC_DLA0 (CYGARC_REG_PCIC_BASE + 0x184)
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#define CYGARC_REG_PCIC_DTC0 (CYGARC_REG_PCIC_BASE + 0x188)
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#define CYGARC_REG_PCIC_DCR0 (CYGARC_REG_PCIC_BASE + 0x18c)
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#define CYGARC_REG_PCIC_DPA1 (CYGARC_REG_PCIC_BASE + 0x190)
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#define CYGARC_REG_PCIC_DLA1 (CYGARC_REG_PCIC_BASE + 0x194)
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#define CYGARC_REG_PCIC_DTC1 (CYGARC_REG_PCIC_BASE + 0x198)
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#define CYGARC_REG_PCIC_DCR1 (CYGARC_REG_PCIC_BASE + 0x19c)
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#define CYGARC_REG_PCIC_DPA2 (CYGARC_REG_PCIC_BASE + 0x1a0)
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#define CYGARC_REG_PCIC_DLA2 (CYGARC_REG_PCIC_BASE + 0x1a4)
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#define CYGARC_REG_PCIC_DTC2 (CYGARC_REG_PCIC_BASE + 0x1a8)
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#define CYGARC_REG_PCIC_DCR2 (CYGARC_REG_PCIC_BASE + 0x1ac)
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#define CYGARC_REG_PCIC_DPA3 (CYGARC_REG_PCIC_BASE + 0x1b0)
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#define CYGARC_REG_PCIC_DLA3 (CYGARC_REG_PCIC_BASE + 0x1b4)
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#define CYGARC_REG_PCIC_DTC3 (CYGARC_REG_PCIC_BASE + 0x1b8)
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#define CYGARC_REG_PCIC_DCR3 (CYGARC_REG_PCIC_BASE + 0x1bc)
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#define CYGARC_REG_PCIC_PAR (CYGARC_REG_PCIC_BASE + 0x1c0)
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#define CYGARC_REG_PCIC_MBR (CYGARC_REG_PCIC_BASE + 0x1c4)
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#define CYGARC_REG_PCIC_IOBR (CYGARC_REG_PCIC_BASE + 0x1c8)
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#define CYGARC_REG_PCIC_PINT (CYGARC_REG_PCIC_BASE + 0x1cc)
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#define CYGARC_REG_PCIC_PINTM (CYGARC_REG_PCIC_BASE + 0x1d0)
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#define CYGARC_REG_PCIC_CLKR (CYGARC_REG_PCIC_BASE + 0x1d4)
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#define CYGARC_REG_PCIC_BCR1 (CYGARC_REG_PCIC_BASE + 0x1e0)
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#define CYGARC_REG_PCIC_BCR2 (CYGARC_REG_PCIC_BASE + 0x1e4)
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#define CYGARC_REG_PCIC_WCR1 (CYGARC_REG_PCIC_BASE + 0x1e8)
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#define CYGARC_REG_PCIC_WCR2 (CYGARC_REG_PCIC_BASE + 0x1ec)
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#define CYGARC_REG_PCIC_WCR3 (CYGARC_REG_PCIC_BASE + 0x1f0)
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#define CYGARC_REG_PCIC_MCR (CYGARC_REG_PCIC_BASE + 0x1f4)
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#define CYGARC_REG_PCIC_PCTR (CYGARC_REG_PCIC_BASE + 0x200)
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#define CYGARC_REG_PCIC_PDTR (CYGARC_REG_PCIC_BASE + 0x204)
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#define CYGARC_REG_PCIC_PDR (CYGARC_REG_PCIC_BASE + 0x220)
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#define CYGARC_REG_PCIC_CR_MAGIC 0xa5000000
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#define CYGARC_REG_PCIC_CR_TRDSGL 0x00000200
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#define CYGARC_REG_PCIC_CR_BYTESWAP 0x00000100
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#define CYGARC_REG_PCIC_CR_PCIPUP 0x00000080
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#define CYGARC_REG_PCIC_CR_BMABT 0x00000040
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#define CYGARC_REG_PCIC_CR_MD10 0x00000020
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#define CYGARC_REG_PCIC_CR_MD9 0x00000010
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#define CYGARC_REG_PCIC_CR_SERR 0x00000008
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#define CYGARC_REG_PCIC_CR_INTA 0x00000004
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#define CYGARC_REG_PCIC_CR_PCIRST 0x00000002
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#define CYGARC_REG_PCIC_CR_CFINIT 0x00000001
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#define CYGARC_REG_PCIC_CR_INIT 0xa5000001
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#define CYGARC_REG_PCIC_IOBR_MASK 0xfffc0000
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#define CYGARC_REG_PCIC_PAR_ENABLE 0x80000000
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#define CYGARC_REG_PCIC_PAR_BUSNO_shift 16
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#define CYGARC_REG_PCIC_PAR_FUNC_shift 8
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#define CYGARC_REG_PCIC_INTM_M_LOCKON 0x00008000
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#define CYGARC_REG_PCIC_INTM_T_TGT_ABORT 0x00004000
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#define CYGARC_REG_PCIC_INTM_TGT_RETRY 0x00000200
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#define CYGARC_REG_PCIC_INTM_MST_DIS 0x00000100
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#define CYGARC_REG_PCIC_INTM_ADRPERR 0x00000080
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#define CYGARC_REG_PCIC_INTM_SERR_DET 0x00000040
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#define CYGARC_REG_PCIC_INTM_T_DPERR_WT 0x00000020
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#define CYGARC_REG_PCIC_INTM_T_PERR_DET 0x00000010
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#define CYGARC_REG_PCIC_INTM_M_TGT_ABORT 0x00000008
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#define CYGARC_REG_PCIC_INTM_M_MST_ABORT 0x00000004
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#define CYGARC_REG_PCIC_INTM_M_DPERR_WT 0x00000002
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#define CYGARC_REG_PCIC_INTM_M_DPERR_RD 0x00000001
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#define CYGARC_REG_PCIC_INTM_INIT 0x0000c3ff
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#define CYGARC_REG_PCIC_AINTM_MST_BRKN 0x00002000
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#define CYGARC_REG_PCIC_AINTM_TGT_BUSTO 0x00001000
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#define CYGARC_REG_PCIC_AINTM_MST_BUSTO 0x00000800
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#define CYGARC_REG_PCIC_AINTM_TGT_ABORT 0x00000008
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#define CYGARC_REG_PCIC_AINTM_MST_ABORT 0x00000004
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#define CYGARC_REG_PCIC_AINTM_DPERR_WT 0x00000002
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#define CYGARC_REG_PCIC_AINTM_DPERR_RD 0x00000001
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#define CYGARC_REG_PCIC_AINTM_INIT 0x0000380f
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