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//=============================================================================
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//
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// mod_regs_rtc.h
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//
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// RTC (real time clock) Module register definitions
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later
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// version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with eCos; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// As a special exception, if other files instantiate templates or use
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// macros or inline functions from this file, or you compile this file
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// and link it with other works to produce a work based on this file,
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// this file does not by itself cause the resulting work to be covered by
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// the GNU General Public License. However the source code for this file
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// must still be made available in accordance with section (3) of the GNU
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// General Public License v2.
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//
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// This exception does not invalidate any other reasons why a work based
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// on this file might be covered by the GNU General Public License.
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// -------------------------------------------
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// ####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): jskov
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// Contributors:jskov, Hajime Ishitani
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// Date: 2000-10-30
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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//--------------------------------------------------------------------------
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// RealTime Clock
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#define CYGARC_REG_RC64CNT 0xFFC80000 // 8bit
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#define CYGARC_REG_RSECCNT 0xFFC80004 // 8bit
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#define CYGARC_REG_RMINCNT 0xFFC80008 // 8bit
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#define CYGARC_REG_RHRCNT 0xFFC8000C // 8bit
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#define CYGARC_REG_RWKCNT 0xFFC80010 // 8bit
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#define CYGARC_REG_RDAYCNT 0xFFC80014 // 8bit
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#define CYGARC_REG_RMONCNT 0xFFC80018 // 8bit
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#define CYGARC_REG_RYRCNT 0xFFC8001C // 16bit
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#define CYGARC_REG_RSECAR 0xFFC80020 // 8bit
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#define CYGARC_REG_RMINAR 0xFFC80024 // 8bit
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#define CYGARC_REG_RHRAR 0xFFC80028 // 8bit
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#define CYGARC_REG_RWKAR 0xFFC8002C // 8bit
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#define CYGARC_REG_RDAYAR 0xFFC80030 // 8bit
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#define CYGARC_REG_RMONAR 0xFFC80034 // 8bit
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#define CYGARC_REG_RCR1 0xFFC80038 // 8bit
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#define CYGARC_REG_RCR2 0xFFC8003C // 8bit
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#define CYGARC_REG_RCR3 0xFFC80050 // 8bit
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#define CYGARC_REG_RYRAR 0xFFC80054 // 8bit
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#define CYGARC_REG_RCR1_CF 0x80 // carry flag
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#define CYGARC_REG_RCR1_CIE 0x10 // carry interrupt enable
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#define CYGARC_REG_RCR1_AIE 0x08 // alarm interrupt enable
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#define CYGARC_REG_RCR1_AF 0x01 // alarm flag
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#define CYGARC_REG_RCR2_PEF 0x80 // periodic interrupt flag
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#define CYGARC_REG_RCR2_PES2 0x40 // periodic interrupt setting
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#define CYGARC_REG_RCR2_PES1 0x20
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#define CYGARC_REG_RCR2_PES0 0x10
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#define CYGARC_REG_RCR2_RTCEN 0x08 // RTC enable
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#define CYGARC_REG_RCR2_ADJ 0x04 // second adjustment
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#define CYGARC_REG_RCR2_RESET 0x02 // reset
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#define CYGARC_REG_RCR2_START 0x01 // start
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