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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [sh/] [sh4/] [current/] [include/] [var_intr.h] - Blame information for rev 817

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1 786 skrzyp
#ifndef CYGONCE_HAL_VAR_INTR_H
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#define CYGONCE_HAL_VAR_INTR_H
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//==========================================================================
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//
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//      var_intr.h
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//
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//      SH4 Interrupt and clock support
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    jskov
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// Contributors: jskov,
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// Date:         1999-04-24
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// Purpose:      Define Interrupt support
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// Description:  The macros defined here provide the HAL APIs for handling
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//               interrupts and the clock.
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//              
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// Usage:
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//               #include <cyg/hal/hal_intr.h>
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//               ...
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//              
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include CYGBLD_HAL_CPU_MODULES_H       // INTC module selection
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// More include statements below. First part of this file must be
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// usable for both assembly and C files, so only use defines here.
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//--------------------------------------------------------------------------
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// Optional platform overrides and fallbacks
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#include <cyg/hal/plf_intr.h>
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#ifndef CYGPRI_HAL_INTERRUPT_UPDATE_LEVEL_PLF
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# define CYGPRI_HAL_INTERRUPT_UPDATE_LEVEL_PLF(vec, level)                  \
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    case CYGNUM_HAL_INTERRUPT_NMI:                                          \
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        /* fall through */                                                  \
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    case CYGNUM_HAL_INTERRUPT_LVL0 ... CYGNUM_HAL_INTERRUPT_LVL14:          \
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        /* Cannot change levels */                                          \
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        break;
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#endif
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#ifndef CYGPRI_HAL_INTERRUPT_ACKNOWLEDGE_PLF
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# define CYGPRI_HAL_INTERRUPT_ACKNOWLEDGE_PLF(vec)
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#endif
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#ifndef CYGPRI_HAL_INTERRUPT_CONFIGURE_PLF
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# define CYGPRI_HAL_INTERRUPT_CONFIGURE_PLF(vec, level, up)
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#endif
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//--------------------------------------------------------------------------
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// Additional SH4 exception vectors. 
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// These are identified with event values 0x800 and 0x820, so we need to
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// extend the decode macros accordingly. Performance wise it's not an
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// issue - these are exceptions, not interrupts. No critical fast path.
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#define CYGNUM_HAL_VECTOR_FPU_EXCEPTION          9 // FPU exception
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#define CYGNUM_HAL_VECTOR_TLB_MUTI_HIT          10 // mutible TLB hit
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#define CYGNUM_HAL_VECTOR_FPU_DISABLE           17
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#define CYGNUM_HAL_VECTOR_SLOT_FPU_DISABLE      18
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#define CYG_VECTOR_IS_INTERRUPT(v)   \
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    ((CYGNUM_HAL_VECTOR_INSTRUCTION_BP < (v)) && ((v) < CYGNUM_HAL_VECTOR_FPU_DISABLE))
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#define CYGNUM_HAL_VSR_MAX                   CYGNUM_HAL_VECTOR_SLOT_FPU_DISABLE
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#define CYGNUM_HAL_VSR_EXCEPTION_COUNT       (CYGNUM_HAL_VSR_MAX-CYGNUM_HAL_VECTOR_POWERON+1)
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#define CYGNUM_HAL_INTERRUPT_RESERVED_5C0    32
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#define CYGNUM_HAL_INTERRUPT_RESERVED_5E0    33
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#define CYGNUM_HAL_INTERRUPT_HUDI            34
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#define CYGNUM_HAL_INTERRUPT_GPIO            35
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#define CYGNUM_HAL_INTERRUPT_DMAC_DMTE0      36
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#define CYGNUM_HAL_INTERRUPT_DMAC_DMTE1      37
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#define CYGNUM_HAL_INTERRUPT_DMAC_DMTE2      38
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#define CYGNUM_HAL_INTERRUPT_DMAC_DMTE3      39
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#define CYGNUM_HAL_INTERRUPT_DMAC_DMAE       40
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#define CYGNUM_HAL_INTERRUPT_RESERVED_6E0    41
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#define CYGNUM_HAL_INTERRUPT_SCIF_ERI        42
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#define CYGNUM_HAL_INTERRUPT_SCIF_RXI        43
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#define CYGNUM_HAL_INTERRUPT_SCIF_BRI        44
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#define CYGNUM_HAL_INTERRUPT_SCIF_TXI        45
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#define CYGNUM_HAL_ISR_MAX                   CYGNUM_HAL_INTERRUPT_SCIF_TXI
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#if (CYGARC_SH_MOD_INTC == 2)
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#ifndef CYGHWR_HAL_SH_IRQ_USE_IRQLVL
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# define CYGNUM_HAL_INTERRUPT_IRL0           CYGNUM_HAL_INTERRUPT_LVL2
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# define CYGNUM_HAL_INTERRUPT_IRL1           CYGNUM_HAL_INTERRUPT_LVL5
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# define CYGNUM_HAL_INTERRUPT_IRL2           CYGNUM_HAL_INTERRUPT_LVL8
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# define CYGNUM_HAL_INTERRUPT_IRL3           CYGNUM_HAL_INTERRUPT_LVL11
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#endif
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#define CYGNUM_HAL_INTERRUPT_PCISERR         66
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#define CYGNUM_HAL_INTERRUPT_PCIDMA3         67
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#define CYGNUM_HAL_INTERRUPT_PCIDMA2         68
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#define CYGNUM_HAL_INTERRUPT_PCIDMA1         69
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#define CYGNUM_HAL_INTERRUPT_PCIDMA0         70
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#define CYGNUM_HAL_INTERRUPT_PCIPWON         71
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#define CYGNUM_HAL_INTERRUPT_PCIPWDWN        72
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#define CYGNUM_HAL_INTERRUPT_PCIERR          73
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#define CYGNUM_HAL_INTERRUPT_TUNI3           74
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#define CYGNUM_HAL_INTERRUPT_TUNI4           78
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#undef CYGNUM_HAL_ISR_MAX
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#define CYGNUM_HAL_ISR_MAX                   CYGNUM_HAL_INTERRUPT_TUNI4
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#endif // (CYGARC_SH_MOD_INTC == 2)
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// Exception vectors. These are the values used when passed out to an
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// external exception handler using cyg_hal_deliver_exception()
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// These are in addition to the exceptions defined by the architecture.
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#define CYGNUM_HAL_EXCEPTION_FPU_EXCEPTION          9 // fpu exception
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#define CYGNUM_HAL_EXCEPTION_TLB_MULTI_HIT         10 // TLB multi hit exception
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#define CYGNUM_HAL_EXCEPTION_FPU_DISABLE           17
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#define CYGNUM_HAL_EXCEPTION_SLOT_FPU_DISABLE      18
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#define CYGNUM_HAL_EXCEPTION_MIN          CYGNUM_HAL_EXCEPTION_POWERON
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#define CYGNUM_HAL_EXCEPTION_MAX          CYGNUM_HAL_EXCEPTION_SLOT_FPU_DISABLE
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// The vector used by the Real time clock
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#define CYGNUM_HAL_INTERRUPT_RTC             CYGNUM_HAL_INTERRUPT_TMU0_TUNI0
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//--------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_VAR_INTR_H
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// End of hal_intr.h

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