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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [sparc/] [arch/] [current/] [include/] [hal_arch.h] - Blame information for rev 851

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#ifndef CYGONCE_HAL_ARCH_H
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#define CYGONCE_HAL_ARCH_H
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//==========================================================================
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//
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//      hal_arch.h
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//
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//      Architecture specific abstractions
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//
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//==========================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    nickg, gthomas, hmt
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// Contributors: nickg, gthomas, hmt
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// Date:         1999-02-20
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// Purpose:      Define architecture abstractions
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// Usage:        #include <cyg/hal/hal_arch.h>
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// 
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/hal_sparc.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/hal_intr.h>           // HAL_DISABLE_INTERRUPTS
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//--------------------------------------------------------------------------
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// Processor saved states:
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//
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// All these structures must be doubleword (64 bit) aligned.
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// The code that creates them on the stack will ensure this is so.
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#define HAL_THREAD_CONTEXT_GLOBAL_BASE 0
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#define HAL_THREAD_CONTEXT_OUT_BASE    8
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#define HAL_THREAD_CONTEXT_LOCAL_BASE 16
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#define HAL_THREAD_CONTEXT_IN_BASE    24
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typedef struct
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{
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    // this is the save structure found at *(stack_ptr) always, note that
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    // i[6] is the frame pointer is the previous stack pointer, and
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    // o[6] is the stack pointer is the next frame pointer,
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    // so they form a linked list back up the call stack.
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    cyg_uint32  l[8];                                   /* Locals r16-r23 */
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    cyg_uint32  i[8];                                   /* Ins    r24-r31 */
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} HAL_SavedWindow;
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typedef struct
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{
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    // Window save at stack pointer
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    HAL_SavedWindow li;
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//16
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    // This is the rest of the save state:
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    //   NOTE: g[0] is used for the CWP, for %g0 == 0.  Also note that the
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    //   assembler routines must load/store it in the right order.
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    cyg_uint32  g[8] ;                                  /* Globals r0- r7 */
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    cyg_uint32  o[8] ;                                  /* Outs    r8-r15 */
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//32 words in size
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95
// There is no need to save any other state; for example, condition codes,
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// the PC and NextPC, and Y, are preserved in local registers in the trap
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// handling window and so preserved in the caller stack frame as viewed
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// from an ISR.  Note that the VSR is jumped to with those locals being set
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// up (and Y in situ), and it must preserve them itself before calling any
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// subsequent handlers (ISRs).
101
 
102
} HAL_SavedRegisters;
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104
 
105
typedef struct
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{
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    // Window save at stack pointer
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    HAL_SavedWindow li;
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    cyg_uint32      composite_return_ptr;          /* structure returns */
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    cyg_uint32      spill_args[6];                 /* for callee to store */
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    cyg_uint32      spare;                         /* keep this 64-bits   */
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} HAL_FrameStructure;
113
 
114
 
115
//--------------------------------------------------------------------------
116
// Exception handling function.
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// This function is defined by the kernel according to this prototype. It is
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// invoked from the HAL to deal with any CPU exceptions that the HAL does
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// not want to deal with itself. It usually invokes the kernel's exception
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// delivery mechanism.
121
 
122
externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );
123
 
124
//--------------------------------------------------------------------------
125
// Bit manipulation macros
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#ifndef CYGPKG_HAL_SPARC_SCAN
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/* Most sparc's does not have 'scan' instruction */
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externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask);
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externC cyg_uint32 hal_msbit_index(cyg_uint32 mask);
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#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask);
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#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask);
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#else
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#define HAL_LSBIT_INDEX(index, mask)            \
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    CYG_MACRO_START                             \
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    asm volatile (                              \
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        "scan   %1, 0, %%l7;"                   \
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        "mov    31, %0;"                        \
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        "sub    %0, %%l7, %0"                   \
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        : "=r"(index)                           \
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        : "r"(mask & ~(mask-1))                 \
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        : "l7"                                  \
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        );                                      \
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CYG_MACRO_END
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145
#define HAL_MSBIT_INDEX(index, mask)            \
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    CYG_MACRO_START                             \
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    asm volatile (                              \
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        "scan   %1, 0, %%l7;"                   \
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        "mov    31, %0;"                        \
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        "sub    %0, %%l7, %0"                   \
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        : "=r"(index)                           \
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        : "r"(mask)                             \
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        : "l7"                                  \
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        );                                      \
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CYG_MACRO_END
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#endif
157
 
158
//--------------------------------------------------------------------------
159
// Context Initialization
160
// Initialize the context of a thread.
161
// Arguments:
162
// _sparg_ name of variable containing current sp, will be written with new sp
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// _thread_ thread object address, passed as argument to entry point
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// _entry_ entry point address.
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// _id_ bit pattern used in initializing registers, for debugging.
166
 
167
externC CYG_ADDRESS
168
hal_thread_init_context(  CYG_WORD sparg,
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                          CYG_WORD thread,
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                          CYG_WORD entry,
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                          CYG_WORD id );
172
 
173
#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ )         \
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CYG_MACRO_START                                                             \
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    _sparg_ = hal_thread_init_context( (CYG_WORD)(_sparg_),                 \
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                                       (CYG_WORD)(_thread_),                \
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                                       (CYG_WORD)(_entry_),                 \
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                                       (CYG_WORD)(_id_) );                  \
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CYG_MACRO_END
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181
//---------------------------------------------------------------------------
182
// Context switch macros.
183
// The arguments are pointers to locations where the stack pointer
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// of the current thread is to be stored, and from where the sp of the
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// next thread is to be fetched.
186
 
187
externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from );
188
externC void hal_thread_load_context( CYG_ADDRESS to )
189
    __attribute__ ((noreturn));
190
 
191
#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_)                    \
192
        hal_thread_switch_context((CYG_ADDRESS)_tspptr_,                \
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                                  (CYG_ADDRESS)_fspptr_);
194
 
195
#define HAL_THREAD_LOAD_CONTEXT(_tspptr_)                               \
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        hal_thread_load_context( (CYG_ADDRESS)_tspptr_ );
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198
 
199
//---------------------------------------------------------------------------
200
// Execution reorder barrier.
201
// When optimizing the compiler can reorder code. In multithreaded systems
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// where the order of actions is vital, this can sometimes cause problems.
203
// This macro may be inserted into places where reordering should not happen.
204
 
205
#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )
206
 
207
//---------------------------------------------------------------------------
208
// Breakpoint support
209
// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen
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// if executed.
211
// HAL_BREAKINST is the value of the breakpoint instruction and 
212
// HAL_BREAKINST_SIZE is its size in bytes.
213
 
214
#define HAL_BREAKPOINT(_label_)                \
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asm volatile (" .globl  " #_label_ ";"         \
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              #_label_":"                      \
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              "ta 1"                           \
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    );
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#define HAL_BREAKINST           {0x91,0xd0,0x20,0x01}
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#define HAL_BREAKINST_SIZE      4
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223
//---------------------------------------------------------------------------
224
// Thread register state manipulation for GDB support.
225
 
226
// Translate a stack pointer as saved by the thread context macros above into
227
// a pointer to a HAL_SavedRegisters structure.
228
#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ )  \
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        (_regs_) = (HAL_SavedRegisters *)(_sp_)
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231
// Routines in icontext.c used here because they're quite large for
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// the SPARC (note param order):
233
externC void
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cyg_hal_sparc_get_gdb_regs( void *gdb_regset,
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                            HAL_SavedRegisters *eCos_regset );
236
 
237
externC void
238
cyg_hal_sparc_set_gdb_regs( HAL_SavedRegisters *eCos_regset,
239
                            void *gdb_regset );
240
 
241
 
242
// Copy a set of registers from a HAL_SavedRegisters structure into a GDB
243
// ordered array.
244
#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ )              \
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    CYG_MACRO_START                                             \
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        cyg_hal_sparc_get_gdb_regs( (_aregval_), (_regs_) );    \
247
CYG_MACRO_END
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// Copy a GDB ordered array into a HAL_SavedRegisters structure.
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#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ )             \
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    CYG_MACRO_START                                             \
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        cyg_hal_sparc_set_gdb_regs( (_regs_), (_aregval_) );    \
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CYG_MACRO_END
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255
//---------------------------------------------------------------------------
256
// HAL setjmp
257
 
258
#define CYGARC_JMP_BUF_SIZE 32 // (words)
259
 
260
// this too must be doubleword aligned (64 bit)
261
 
262
typedef cyg_uint64 hal_jmp_buf[ CYGARC_JMP_BUF_SIZE / 2 ];
263
 
264
externC int hal_setjmp(hal_jmp_buf env);
265
externC void hal_longjmp(hal_jmp_buf env, int val);
266
 
267
//---------------------------------------------------------------------------
268
// Flush Register Windows
269
//
270
// This is implemented as trap 3 in some SPARC systems.
271
// This macro is only for use from normal, foreground code.
272
// (including exception handlers and the like)
273
 
274
#define HAL_FLUSH_REGISTERS_TO_STACK()                                      \
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    CYG_MACRO_START                                                         \
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    cyg_uint32 _saveintr_;                                                  \
277
    HAL_DISABLE_INTERRUPTS( _saveintr_ ); /* leave traps on */              \
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    asm volatile (                                                          \
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        /* force out all our callers register sets onto the stack        */ \
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        /* if necessary: the system will handily take care of this for   */ \
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        /* us as follows:                                                */ \
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        "save   %%sp, -16 * 4, %%sp;"   /* need all these to preserve    */ \
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        "save   %%sp, -16 * 4, %%sp;"   /* the linked list property...   */ \
284
        "save   %%sp, -16 * 4, %%sp;"                                       \
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        "save   %%sp, -16 * 4, %%sp;"                                       \
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        "save   %%sp, -16 * 4, %%sp;"                                       \
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        "save   %%sp, -16 * 4, %%sp;"                                       \
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        "restore;"                                                          \
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        "restore;"                                                          \
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        "restore;"                                                          \
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        "restore;"                                                          \
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        "restore;"                                                          \
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        "restore"                                                           \
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        /* six of these is correct; a seventh would force out the        */ \
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        /* current set that we are using right now.  Note that minimal   */ \
296
        /* space is allowed on stack for locals and ins in case this     */ \
297
        /* sequence itself gets interrupted and recurses too deep.       */ \
298
        :                                                                   \
299
        :                                                                   \
300
        : "memory"                                                          \
301
        );                                                                  \
302
    HAL_RESTORE_INTERRUPTS( _saveintr_ );                                   \
303
CYG_MACRO_END
304
 
305
//---------------------------------------------------------------------------
306
// Idle thread code.
307
// This macro is called in the idle thread loop, and gives the HAL the
308
// chance to insert code. Typical idle thread behaviour might be to halt the
309
// processor.
310
 
311
externC void hal_idle_thread_action(cyg_uint32 loop_count);
312
 
313
#ifndef HAL_IDLE_THREAD_ACTION
314
#define HAL_IDLE_THREAD_ACTION(_count_) \
315
      /* Cyg_Clock::real_time_clock->tick() */
316
#endif
317
 
318
//---------------------------------------------------------------------------
319
 
320
// Minimal and sensible stack sizes: the intention is that applications
321
// will use these to provide a stack size in the first instance prior to
322
// proper analysis.  Idle thread stack should be this big.
323
 
324
//    THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
325
//           THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
326
// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
327
 
328
// We define quite large stack needs for SPARC, for it requires 576
329
// bytes (144 words) to process an interrupt and thread-switch, and
330
// momentarily, but needed in case of recursive interrupts, it needs 208
331
// words - if a sequence of saves to push out other regsets is interrupted.
332
 
333
// This is not a config option because it should not be adjusted except
334
// under "enough rope" sort of disclaimers.
335
 
336
// A minimal, optimized stack frame is 24 words, but even -O2 code seems to
337
// place a few locals in the locals area: round this up to provide a
338
// sensible overestimate:
339
#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 32)
340
 
341
// Stack needed for a context switch: this is implicit in the estimate for
342
// interrupts so not explicitly used below:
343
#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 32)
344
 
345
// Interrupt + call to ISR, interrupt_end() and the DSR
346
#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \
347
    ((208 * 4) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
348
 
349
// And we have lots of registers so no particular amount is added in for
350
// typical local variable usage.
351
 
352
// Typically we have 4 nestable interrupt sources, clock, serialin,
353
// serialout, (and NMI button, but you want it to not destroy context):
354
 
355
#define CYGNUM_HAL_STACK_SIZE_MINIMUM \
356
        (4 * CYGNUM_HAL_STACK_INTERRUPT_SIZE + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
357
 
358
#define CYGNUM_HAL_STACK_SIZE_TYPICAL \
359
        (CYGNUM_HAL_STACK_SIZE_MINIMUM + 8 * CYGNUM_HAL_STACK_FRAME_SIZE)
360
 
361
//--------------------------------------------------------------------------
362
// Macros for switching context between two eCos instances (jump from
363
// code in ROM to code in RAM or vice versa).
364
#define CYGARC_HAL_SAVE_GP()
365
#define CYGARC_HAL_RESTORE_GP()
366
 
367
//-----------------------------------------------------------------------------
368
 
369
#endif // CYGONCE_HAL_ARCH_H
370
// End of hal_arch.h

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