OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [sparclite/] [sim/] [current/] [include/] [pkgconf/] [mlt_sparclite_sim_ram.mlt] - Blame information for rev 786

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp
version 0
2
region ram 2000000 80000 0 !
3
section rom_vectors 0 1 0 1 1 1 1 1 2000000 2000000 text text !
4
section text 0 1 0 1 0 1 0 1 fini fini !
5
section fini 0 1 0 1 0 1 0 1 rodata rodata !
6
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
7
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
8
section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
9
section gcc_except_table 0 1 0 1 0 1 0 1 data data !
10
section data 0 1 0 1 0 1 0 1 bss bss !
11
section bss 0 8 0 1 0 1 0 1 heap1 heap1 !
12
section heap1 0 8 0 0 0 0 0 0 !

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.