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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [v85x/] [v850/] [current/] [src/] [hal_diag.c] - Blame information for rev 786

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1 786 skrzyp
/*=============================================================================
2
//
3
//      hal_diag.c
4
//
5
//      HAL diagnostic output code
6
//
7
//=============================================================================
8
// ####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later
16
// version.
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT
19
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
// for more details.
22
//
23
// You should have received a copy of the GNU General Public License
24
// along with eCos; if not, write to the Free Software Foundation, Inc.,
25
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
26
//
27
// As a special exception, if other files instantiate templates or use
28
// macros or inline functions from this file, or you compile this file
29
// and link it with other works to produce a work based on this file,
30
// this file does not by itself cause the resulting work to be covered by
31
// the GNU General Public License. However the source code for this file
32
// must still be made available in accordance with section (3) of the GNU
33
// General Public License v2.
34
//
35
// This exception does not invalidate any other reasons why a work based
36
// on this file might be covered by the GNU General Public License.
37
// -------------------------------------------
38
// ####ECOSGPLCOPYRIGHTEND####
39
//=============================================================================
40
//#####DESCRIPTIONBEGIN####
41
//
42
// Author(s):   nickg, gthomas
43
// Contributors:nickg, gthomas, jlarmour
44
// Date:        2001-03-21
45
// Purpose:     HAL diagnostic output
46
// Description: Implementations of HAL diagnostic output support.
47
//
48
//####DESCRIPTIONEND####
49
//
50
//===========================================================================*/
51
 
52
#include <pkgconf/hal.h>
53
 
54
#if CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0
55
 
56
#include <pkgconf/system.h>
57
#include CYGBLD_HAL_PLATFORM_H
58
 
59
#include <cyg/infra/cyg_type.h>         // base types
60
#include <cyg/infra/cyg_ass.h>          // assertion macros
61
 
62
#include <cyg/hal/hal_arch.h>           // basic machine info
63
#include <cyg/hal/hal_intr.h>           // interrupt macros
64
#include <cyg/hal/hal_io.h>             // IO macros
65
#include <cyg/hal/hal_diag.h>
66
 
67
#include <cyg/hal/hal_stub.h>           // target_register_t
68
#include <cyg/hal/hal_if.h>             // Calling interface definitions
69
#include <cyg/hal/hal_misc.h>           // Helper functions
70
#include <cyg/hal/drv_api.h>            // CYG_ISR_HANDLED
71
 
72
#include <cyg/hal/v850_common.h>        // hardware registers, etc.
73
 
74
 
75
#define BAUD_COUNT ((CYGHWR_HAL_V85X_CPU_FREQ/2)/CYGHWR_HAL_V85X_V850_DIAG_BAUD)
76
#define BAUD_DIVISOR 1
77
 
78
/*---------------------------------------------------------------------------*/
79
// V850
80
 
81
void
82
init_serial_channel(void* base)
83
{
84
    volatile unsigned char *mode = (volatile unsigned char *)V850_REG_ASIM0;
85
    volatile unsigned char *brgc = (volatile unsigned char *)V850_REG_BRGC0;
86
    volatile unsigned char *brgm0 = (volatile unsigned char *)V850_REG_BRGMC00;
87
#ifdef V850_REG_BRGMC01
88
    volatile unsigned char *brgm1 = (volatile unsigned char *)V850_REG_BRGMC01;
89
#endif
90
    volatile unsigned char *rxstat = (volatile unsigned char *)V850_REG_SRIC0;
91
    volatile unsigned char *rxerr = (volatile unsigned char *)V850_REG_SERIC0;
92
    volatile unsigned char *txstat = (volatile unsigned char *)V850_REG_STIC0;
93
    int count = BAUD_COUNT;
94
    int divisor = BAUD_DIVISOR;
95
 
96
    while (count > 0xFF) {
97
        count >>= 1;
98
        divisor++;
99
    }
100
 
101
    *mode = 0xC8;
102
    *brgc = count;
103
    *brgm0 = divisor & 0x07;
104
#ifdef V850_REG_BRGMC01
105
    *brgm1 = divisor >> 3;
106
#endif
107
    *rxstat = 0x47;
108
    *rxerr = 0;
109
    *txstat = 0x47;
110
}
111
 
112
// Actually send character down the wire
113
void
114
cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 c)
115
{
116
    volatile unsigned char *TxDATA = (volatile unsigned char *)V850_REG_TXS0;
117
    volatile unsigned char *TxSTAT = (volatile unsigned char *)V850_REG_STIC0;
118
    int timeout = 0xFFFF;
119
 
120
    CYGARC_HAL_SAVE_GP();
121
 
122
    // Send character
123
    *TxDATA = (unsigned char)c;
124
    // Wait for Tx not busy
125
    while ((*TxSTAT & 0x80) == 0x00) {
126
        if (--timeout == 0)
127
            break;
128
    }
129
    *TxSTAT &= ~0x80;
130
 
131
    CYGARC_HAL_RESTORE_GP();
132
}
133
 
134
static cyg_bool
135
cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch)
136
{
137
    volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXB0;
138
    volatile unsigned char *RxSTAT = (volatile unsigned char *)V850_REG_SRIC0;
139
 
140
    if ((*RxSTAT & 0x80) == 0x00)
141
        return false;
142
 
143
    *ch = (char)*RxDATA;
144
    *RxSTAT &= ~0x80;
145
    return true;
146
}
147
 
148
cyg_uint8
149
cyg_hal_plf_serial_getc(void* __ch_data)
150
{
151
    cyg_uint8 ch;
152
    CYGARC_HAL_SAVE_GP();
153
 
154
    while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));
155
 
156
    CYGARC_HAL_RESTORE_GP();
157
    return ch;
158
}
159
 
160
static void
161
cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
162
                         cyg_uint32 __len)
163
{
164
    CYGARC_HAL_SAVE_GP();
165
 
166
    while(__len-- > 0)
167
        cyg_hal_plf_serial_putc(__ch_data, *__buf++);
168
 
169
    CYGARC_HAL_RESTORE_GP();
170
}
171
 
172
static void
173
cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
174
{
175
    CYGARC_HAL_SAVE_GP();
176
 
177
    while(__len-- > 0)
178
        *__buf++ = cyg_hal_plf_serial_getc(__ch_data);
179
 
180
    CYGARC_HAL_RESTORE_GP();
181
}
182
 
183
static cyg_int32 msec_timeout = 1000;
184
 
185
cyg_bool
186
cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
187
{
188
    int delay_count = msec_timeout * 10; // delay in .1 ms steps
189
    cyg_bool res;
190
    CYGARC_HAL_SAVE_GP();
191
 
192
    for(;;) {
193
        res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
194
        if (res || 0 == delay_count--)
195
            break;
196
 
197
        CYGACC_CALL_IF_DELAY_US(100);
198
    }
199
 
200
    CYGARC_HAL_RESTORE_GP();
201
    return res;
202
}
203
 
204
static int
205
cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
206
{
207
    static int irq_state = 0;
208
    int ret = 0;
209
    CYGARC_HAL_SAVE_GP();
210
 
211
    switch (__func) {
212
    case __COMMCTL_IRQ_ENABLE:
213
        HAL_INTERRUPT_UNMASK(CYGNUM_HAL_VECTOR_INTCSI1);
214
        irq_state = 1;
215
        break;
216
    case __COMMCTL_IRQ_DISABLE:
217
        ret = irq_state;
218
        irq_state = 0;
219
        HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1);
220
        break;
221
    case __COMMCTL_DBG_ISR_VECTOR:
222
        ret = CYGNUM_HAL_VECTOR_INTCSI1;
223
        break;
224
    case __COMMCTL_SET_TIMEOUT:
225
    {
226
        va_list ap;
227
 
228
        va_start(ap, __func);
229
 
230
        ret = msec_timeout;
231
        msec_timeout = va_arg(ap, cyg_uint32);
232
 
233
        va_end(ap);
234
    }
235
    default:
236
        break;
237
    }
238
    CYGARC_HAL_RESTORE_GP();
239
    return ret;
240
}
241
 
242
static int
243
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
244
                       CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
245
{
246
    volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXB0;
247
    cyg_uint8 c;
248
    int res = 0;
249
    CYGARC_HAL_SAVE_GP();
250
 
251
    c = (char)*RxDATA;
252
    *__ctrlc = 0;
253
    if( cyg_hal_is_break( &c , 1 ) )
254
        *__ctrlc = 1;
255
 
256
    cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1);
257
 
258
    res = CYG_ISR_HANDLED;
259
 
260
    CYGARC_HAL_RESTORE_GP();
261
    return res;
262
}
263
 
264
static void
265
cyg_hal_plf_serial_init(void)
266
{
267
    hal_virtual_comm_table_t* comm;
268
    int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
269
 
270
    // Disable interrupts.
271
    HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1);
272
 
273
    // Init channels
274
    init_serial_channel((cyg_uint8*)0);
275
 
276
    // Setup procs in the vector table
277
 
278
    // Set channel 0
279
    CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
280
    comm = CYGACC_CALL_IF_CONSOLE_PROCS();
281
    CYGACC_COMM_IF_CH_DATA_SET(*comm, 0);
282
    CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
283
    CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
284
    CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
285
    CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
286
    CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
287
    CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
288
    CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
289
 
290
    // Restore original console
291
    CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
292
}
293
 
294
__externC void cyg_hal_plf_ice_diag_init();
295
 
296
void
297
cyg_hal_plf_comms_init(void)
298
{
299
    static int initialized = 0;
300
 
301
    if (initialized)
302
        return;
303
 
304
    initialized = 1;
305
 
306
    cyg_hal_plf_serial_init();
307
 
308
#ifdef CYGDBG_HAL_V85X_V850_ICE_DIAG
309
    cyg_hal_plf_ice_diag_init();
310
#endif
311
}
312
 
313
//=============================================================================
314
// Compatibility with older stubs
315
//=============================================================================
316
 
317
#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
318
 
319
// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e.
320
// totally stand-alone) system.
321
 
322
//#ifdef CYGSEM_HAL_ROM_MONITOR
323
//#define CYG_HAL_STARTUP_ROM
324
//#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
325
//#endif
326
 
327
#if (defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)) \
328
    && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
329
#define HAL_DIAG_USES_HARDWARE
330
#else
331
#if !defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN)
332
#define HAL_DIAG_USES_HARDWARE
333
#endif
334
#endif
335
 
336
void hal_diag_init(void)
337
{
338
    init_serial_channel(0);
339
}
340
 
341
#ifdef HAL_DIAG_USES_HARDWARE
342
 
343
void hal_diag_write_char(char c)
344
{
345
    CYG_INTERRUPT_STATE old;
346
    HAL_DISABLE_INTERRUPTS(old);
347
    cyg_hal_plf_serial_putc(0, c);
348
    HAL_RESTORE_INTERRUPTS(old);
349
}
350
 
351
void hal_diag_read_char(char *c)
352
{
353
    *c = cyg_hal_plf_serial_getc(0);
354
}
355
 
356
#else // HAL_DIAG relies on GDB
357
 
358
void
359
hal_diag_read_char(char *c)
360
{
361
    *c = cyg_hal_plf_serial_getc(0);
362
}
363
 
364
void
365
hal_diag_write_char(char c)
366
{
367
    static char line[100];
368
    static int pos = 0;
369
 
370
    // No need to send CRs
371
    if( c == '\r' ) return;
372
 
373
    line[pos++] = c;
374
 
375
    if( c == '\n' || pos == sizeof(line) )
376
    {
377
        CYG_INTERRUPT_STATE old;
378
 
379
        // Disable interrupts. This prevents GDB trying to interrupt us
380
        // while we are in the middle of sending a packet. The serial
381
        // receive interrupt will be seen when we re-enable interrupts
382
        // later.
383
 
384
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
385
        CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old);
386
#else
387
        HAL_DISABLE_INTERRUPTS(old);
388
#endif
389
 
390
        while(1)
391
        {
392
            static char hex[] = "0123456789ABCDEF";
393
            cyg_uint8 csum = 0;
394
            int i;
395
            char c1;
396
 
397
            cyg_hal_plf_serial_putc(0, '$');
398
            cyg_hal_plf_serial_putc(0, 'O');
399
            csum += 'O';
400
            for( i = 0; i < pos; i++ )
401
            {
402
                char ch = line[i];
403
                char h = hex[(ch>>4)&0xF];
404
                char l = hex[ch&0xF];
405
                cyg_hal_plf_serial_putc(0, h);
406
                cyg_hal_plf_serial_putc(0, l);
407
                csum += h;
408
                csum += l;
409
            }
410
            cyg_hal_plf_serial_putc(0, '#');
411
            cyg_hal_plf_serial_putc(0, hex[(csum>>4)&0xF]);
412
            cyg_hal_plf_serial_putc(0, hex[csum&0xF]);
413
 
414
            // Wait for the ACK character '+' from GDB here and handle
415
            // receiving a ^C instead.  This is the reason for this clause
416
            // being a loop.
417
            c1 = cyg_hal_plf_serial_getc(0);
418
 
419
            if( c1 == '+' )
420
                break;              // a good acknowledge
421
 
422
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && \
423
    defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
424
            cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1);
425
            if( c1 == 3 ) {
426
                // Ctrl-C: breakpoint.
427
                cyg_hal_gdb_interrupt (__builtin_return_address(0));
428
                break;
429
            }
430
#endif
431
            // otherwise, loop round again
432
        }
433
 
434
        pos = 0;
435
 
436
        // And re-enable interrupts
437
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
438
        CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old);
439
#else
440
        HAL_RESTORE_INTERRUPTS(old);
441
#endif
442
    }
443
}
444
#endif  // USE HARDWARE
445
 
446
#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
447
 
448
#endif // #if CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0
449
 
450
/*---------------------------------------------------------------------------*/
451
/* End of hal_diag.c */

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