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[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [io/] [pci/] [current/] [src/] [pci_hw.c] - Blame information for rev 825

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1 786 skrzyp
//=============================================================================
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//
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//      pci_hw.c
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//
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//      PCI hardware library
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//
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//=============================================================================
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// ####ECOSGPLCOPYRIGHTBEGIN####                                            
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// -------------------------------------------                              
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// This file is part of eCos, the Embedded Configurable Operating System.   
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under    
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// the terms of the GNU General Public License as published by the Free     
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// Software Foundation; either version 2 or (at your option) any later      
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// version.                                                                 
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT      
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or    
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License    
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// for more details.                                                        
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//
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// You should have received a copy of the GNU General Public License        
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// along with eCos; if not, write to the Free Software Foundation, Inc.,    
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// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.            
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//
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// As a special exception, if other files instantiate templates or use      
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// macros or inline functions from this file, or you compile this file      
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// and link it with other works to produce a work based on this file,       
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// this file does not by itself cause the resulting work to be covered by   
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// the GNU General Public License. However the source code for this file    
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// must still be made available in accordance with section (3) of the GNU   
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// General Public License v2.                                               
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//
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// This exception does not invalidate any other reasons why a work based    
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// on this file might be covered by the GNU General Public License.         
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// -------------------------------------------                              
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// ####ECOSGPLCOPYRIGHTEND####                                              
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    jskov, from design by nickg 
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// Contributors: jskov
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// Date:         1999-08-09
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// Purpose:      PCI hardware configuration access
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// Description: 
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <cyg/io/pci_hw.h>
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// CYG_PCI_PRESENT only gets defined for targets that provide PCI HAL support.
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// See pci_hw.h for details.
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#ifdef CYG_PCI_PRESENT
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// Init
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void
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cyg_pcihw_init(void)
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{
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    HAL_PCI_INIT();
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}
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// Read functions
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void
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cyg_pcihw_read_config_uint8( cyg_uint8 bus, cyg_uint8 devfn,
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                             cyg_uint8 offset, cyg_uint8 *val)
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{
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    HAL_PCI_CFG_READ_UINT8(bus, devfn, offset, *val);
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}
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void
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cyg_pcihw_read_config_uint16( cyg_uint8 bus, cyg_uint8 devfn,
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                              cyg_uint8 offset, cyg_uint16 *val)
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{
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    HAL_PCI_CFG_READ_UINT16(bus, devfn, offset, *val);
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}
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void
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cyg_pcihw_read_config_uint32( cyg_uint8 bus, cyg_uint8 devfn,
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                              cyg_uint8 offset, cyg_uint32 *val)
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{
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    HAL_PCI_CFG_READ_UINT32(bus, devfn, offset, *val);
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}
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// Write functions
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void
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cyg_pcihw_write_config_uint8( cyg_uint8 bus, cyg_uint8 devfn,
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                             cyg_uint8 offset, cyg_uint8 val)
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{
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    HAL_PCI_CFG_WRITE_UINT8(bus, devfn, offset, val);
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}
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void
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cyg_pcihw_write_config_uint16( cyg_uint8 bus, cyg_uint8 devfn,
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                              cyg_uint8 offset, cyg_uint16 val)
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{
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    HAL_PCI_CFG_WRITE_UINT16(bus, devfn, offset, val);
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}
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void
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cyg_pcihw_write_config_uint32( cyg_uint8 bus, cyg_uint8 devfn,
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                              cyg_uint8 offset, cyg_uint32 val)
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{
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    HAL_PCI_CFG_WRITE_UINT32(bus, devfn, offset, val);
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}
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// Interrupt translation
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cyg_bool
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cyg_pcihw_translate_interrupt( cyg_uint8 bus, cyg_uint8 devfn,
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                               CYG_ADDRWORD *vec)
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{
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    cyg_bool valid;
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    HAL_PCI_TRANSLATE_INTERRUPT(bus, devfn, *vec, valid);
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    return valid;
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}
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#endif // ifdef CYG_PCI_PRESENT
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//-----------------------------------------------------------------------------
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// end of pci_hw.c

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