OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_AT91FR40008_GCC/] [ATEB40x.cfg] - Blame information for rev 773

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 577 jeremybenn
[SETUP]
2
CpuVendor=Atmel
3
CpuChip=AT91R40807
4
FlashVendor=Atmel
5
FlashChip=AT49BV/F1614A
6
RamAddress=$00000000
7
RamSupport=1
8
FlashAddress=$01000000
9
FlashWidth=16
10
FlashChipsPerSector=1
11
LittleEndian=0
12
SectStart=0
13
SectEnd=38
14
AutoErase=0
15
AutoVerify=1
16
CpuEndian=LITTLE
17
SimCount=3
18
MemoryCount=0
19
ProgramFile=E:\temp\embesttest\Demo\ARM7_AT91R40008_GCC_Embest\rtosdemo.hex
20
UploadFile=c:\EB40_Lower.bin
21
Format=Intel Hex
22
Sim3=EBI_RCR:$00000001
23
Sim2=EBI_CSR1:$02002122
24
Sim1=EBI_CSR0:$01002539

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.