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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_AT91FR40008_GCC/] [aic.h] - Blame information for rev 611

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Line No. Rev Author Line
1 577 jeremybenn
//*----------------------------------------------------------------------------
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//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
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//*----------------------------------------------------------------------------
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//* The software is delivered "AS IS" without warranty or condition of any
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//* kind, either express, implied or statutory. This includes without
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//* limitation any warranty or condition with respect to merchantability or
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//* fitness for any particular purpose, or against the infringements of
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//* intellectual property rights of others.
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//*----------------------------------------------------------------------------
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//* File Name           : aic.h
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//* Object              : Advanced Interrupt Controller Definition File.
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//*
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//* 1.0 01/04/00 JCZ    : Creation
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//*----------------------------------------------------------------------------
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#ifndef aic_h
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#define aic_h
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//#include    "periph/stdc/std_c.h"
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/*-----------------------------------------*/
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/* AIC User Interface Structure Definition */
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/*-----------------------------------------*/
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typedef struct
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{
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    at91_reg        AIC_SMR[32] ;       /* Source Mode Register */
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    at91_reg        AIC_SVR[32] ;       /* Source Vector Register */
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    at91_reg        AIC_IVR ;           /* IRQ Vector Register */
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    at91_reg        AIC_FVR ;           /* FIQ Vector Register */
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    at91_reg        AIC_ISR ;           /* Interrupt Status Register */
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    at91_reg        AIC_IPR ;           /* Interrupt Pending Register */
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    at91_reg        AIC_IMR ;           /* Interrupt Mask Register */
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    at91_reg        AIC_CISR ;          /* Core Interrupt Status Register */
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    at91_reg        reserved0 ;
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    at91_reg        reserved1 ;
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    at91_reg        AIC_IECR ;          /* Interrupt Enable Command Register */
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    at91_reg        AIC_IDCR ;          /* Interrupt Disable Command Register */
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    at91_reg        AIC_ICCR ;          /* Interrupt Clear Command Register */
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    at91_reg        AIC_ISCR ;          /* Interrupt Set Command Register */
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    at91_reg        AIC_EOICR ;         /* End of Interrupt Command Register */
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    at91_reg        AIC_SPU ;           /* Spurious Vector Register */
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} StructAIC ;
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/*--------------------------------------------*/
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/* AIC_SMR[]: Interrupt Source Mode Registers */
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/*--------------------------------------------*/
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#define AIC_PRIOR                       0x07    /* Priority */
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#define AIC_SRCTYPE                     0x60    /* Source Type Definition */
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/* Internal Interrupts */
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#define AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00    /* Level Sensitive */
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#define AIC_SRCTYPE_INT_EDGE_TRIGGERED  0x20    /* Edge Triggered */
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/* External Interrupts */
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#define AIC_SRCTYPE_EXT_LOW_LEVEL       0x00    /* Low Level */
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#define AIC_SRCTYPE_EXT_NEGATIVE_EDGE   0x20    /* Negative Edge */
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#define AIC_SRCTYPE_EXT_HIGH_LEVEL      0x40    /* High Level */
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#define AIC_SRCTYPE_EXT_POSITIVE_EDGE   0x60    /* Positive Edge */
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/*------------------------------------*/
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/* AIC_ISR: Interrupt Status Register */
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/*------------------------------------*/
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#define AIC_IRQID                       0x1F    /* Current source interrupt */
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/*------------------------------------------*/
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/* AIC_CISR: Interrupt Core Status Register */
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/*------------------------------------------*/
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#define AIC_NFIQ                        0x01    /* Core FIQ Status */
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#define AIC_NIRQ                        0x02    /* Core IRQ Status */
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/*-------------------------------*/
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/* Advanced Interrupt Controller */
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/*-------------------------------*/
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#define AIC_BASE                        ((StructAIC *)0xFFFFF000)
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#endif /* aic_h */

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