OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_AT91FR40008_GCC/] [pio.h] - Blame information for rev 607

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 577 jeremybenn
//*---------------------------------------------------------------------------
2
//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
3
//*---------------------------------------------------------------------------
4
//* The software is delivered "AS IS" without warranty or condition of any
5
//* kind, either express, implied or statutory. This includes without
6
//* limitation any warranty or condition with respect to merchantability or
7
//* fitness for any particular purpose, or against the infringements of
8
//* intellectual property rights of others.
9
//*-----------------------------------------------------------------------------
10
//* File Name           : pio.h
11
//* Object              : Parallel I/O Definition File
12
//* Translator          : ARM Software Development Toolkit V2.11a
13
//*
14
//* 1.0 20/10/97 JCZ    : Creation
15
//* 2.0 21/10/98 JCZ    : Clean up
16
//*---------------------------------------------------------------------------
17
 
18
#ifndef pio_h
19
#define pio_h
20
 
21
/*---------------------------------------------*/
22
/* Parallel I/O Interface Structure Definition */
23
/*---------------------------------------------*/
24
 
25
typedef struct
26
{
27
    at91_reg        PIO_PER ;           /* PIO Enable Register */
28
    at91_reg        PIO_PDR ;           /* PIO Disable Register */
29
    at91_reg        PIO_PSR ;           /* PIO Status Register */
30
    at91_reg        Reserved0 ;
31
    at91_reg        PIO_OER ;           /* Output Enable Register */
32
    at91_reg        PIO_ODR ;           /* Output Disable Register */
33
    at91_reg        PIO_OSR ;           /* Output Status Register */
34
    at91_reg        Reserved1 ;
35
    at91_reg        PIO_IFER ;          /* Input Filter Enable Register */
36
    at91_reg        PIO_IFDR ;          /* Input Filter Disable Register */
37
    at91_reg        PIO_IFSR ;          /* Input Filter Status Register */
38
    at91_reg        Reserved2 ;
39
    at91_reg        PIO_SODR ;          /* Set Output Data Register */
40
    at91_reg        PIO_CODR ;          /* Clear Output Data Register */
41
    at91_reg        PIO_ODSR ;          /* Output Data Status Register */
42
    at91_reg        PIO_PDSR ;          /* Pin Data Status Register */
43
    at91_reg        PIO_IER ;           /* Interrupt Enable Register */
44
    at91_reg        PIO_IDR ;           /* Interrupt Disable Register */
45
    at91_reg        PIO_IMR ;           /* Interrupt Mask Register */
46
    at91_reg        PIO_ISR ;           /* Interrupt Status Register */
47
} StructPIO ;
48
 
49
/*-----------------------------*/
50
/* PIO Handler type definition */
51
/*-----------------------------*/
52
 
53
//typedef void (*TypePIOHandler) ( StructPIO *pio_pt, u_int pio_mask ) ;
54
 
55
/*--------------------------------*/
56
/* Device Dependancies Definition */
57
/*--------------------------------*/
58
 
59
/* Number of PIO Controller */
60
#define NB_PIO_CTRL     1
61
/* Base Address */
62
#define PIO_BASE        ((StructPIO *) 0xFFFF0000 )
63
/* Number of PIO Lines */
64
#define NB_PIO          32
65
 
66
/* Parallel I/O Bits Definition */
67
#define P0              (1<<0)
68
#define P1              (1<<1)
69
#define P2              (1<<2)
70
#define P3              (1<<3)
71
#define P4              (1<<4)
72
#define P5              (1<<5)
73
#define P6              (1<<6)
74
#define P7              (1<<7)
75
#define P8              (1<<8)
76
#define P9              (1<<9)
77
#define P10             (1<<10)
78
#define P11             (1<<11)
79
#define P12             (1<<12)
80
#define P13             (1<<13)
81
#define P14             (1<<14)
82
#define P15             (1<<15)
83
#define P16             (1<<16)
84
#define P17             (1<<17)
85
#define P18             (1<<18)
86
#define P19             (1<<19)
87
#define P20             (1<<20)
88
#define P21             (1<<21)
89
#define P22             (1<<22)
90
#define P23             (1<<23)
91
#define P24             (1<<24)
92
#define P25             (1<<25)
93
#define P26             (1<<26)
94
#define P27             (1<<27)
95
#define P28             (1<<28)
96
#define P29             (1<<29)
97
#define P30             (1<<30)
98
#define P31             (1<<31)
99
 
100
/* PIO Multiplexing Definition */
101
 
102
/* There is only one PIO Controller */
103
#define PIO_CTRL        0
104
 
105
#define PIO_TC0         PIO_CTRL
106
#define TCLK0           P0
107
#define TIOA0           P1
108
#define TIOB0           P2
109
#define PIN_TC0         (TIOA0|TIOB0|TCLK0)
110
 
111
#define PIO_TC1         PIO_CTRL
112
#define TCLK1           P3
113
#define TIOA1           P4
114
#define TIOB1           P5
115
#define PIN_TC1         (TIOA1|TIOB1|TCLK1)
116
 
117
#define PIO_TC2         PIO_CTRL
118
#define TCLK2           P6
119
#define TIOA2           P7
120
#define TIOB2           P8
121
#define PIN_TC2         (TIOA2|TIOB2|TCLK2)
122
 
123
#define PIO_EXT_IRQ     PIO_CTRL
124
#define PIN_IRQ0        P9
125
#define PIN_IRQ1        P10
126
#define PIN_IRQ2        P11
127
#define PIN_FIQ         P12
128
 
129
#define PIO_USART0      PIO_CTRL
130
#define SCK0            P13
131
#define TXD0            P14
132
#define RXD0            P15
133
#define PIN_USART0      (SCK0|TXD0|RXD0)
134
 
135
#define PIO_USART1      PIO_CTRL
136
#define SCK1            P20
137
#define TXD1            P21
138
#define RXD1            P22
139
#define PIN_USART1      (SCK1|TXD1|RXD1)
140
 
141
#define MCKO            P25
142
#define CS2             P26
143
#define CS3             P27
144
#define CS4             P31
145
#define CS5             P30
146
#define CS6             P29
147
#define CS7             P28
148
 
149
#endif /* pio_h */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.