OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_AT91FR40008_GCC/] [serial/] [serial.c] - Blame information for rev 609

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 577 jeremybenn
/*
2
    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
3
 
4
    ***************************************************************************
5
    *                                                                         *
6
    * If you are:                                                             *
7
    *                                                                         *
8
    *    + New to FreeRTOS,                                                   *
9
    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
10
    *    + Looking for basic training,                                        *
11
    *    + Wanting to improve your FreeRTOS skills and productivity           *
12
    *                                                                         *
13
    * then take a look at the FreeRTOS books - available as PDF or paperback  *
14
    *                                                                         *
15
    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
16
    *                  http://www.FreeRTOS.org/Documentation                  *
17
    *                                                                         *
18
    * A pdf reference manual is also available.  Both are usually delivered   *
19
    * to your inbox within 20 minutes to two hours when purchased between 8am *
20
    * and 8pm GMT (although please allow up to 24 hours in case of            *
21
    * exceptional circumstances).  Thank you for your support!                *
22
    *                                                                         *
23
    ***************************************************************************
24
 
25
    This file is part of the FreeRTOS distribution.
26
 
27
    FreeRTOS is free software; you can redistribute it and/or modify it under
28
    the terms of the GNU General Public License (version 2) as published by the
29
    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
30
    ***NOTE*** The exception to the GPL is included to allow you to distribute
31
    a combined work that includes FreeRTOS without being obliged to provide the
32
    source code for proprietary components outside of the FreeRTOS kernel.
33
    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
34
    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
35
    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
36
    more details. You should have received a copy of the GNU General Public
37
    License and the FreeRTOS license exception along with FreeRTOS; if not it
38
    can be viewed here: http://www.freertos.org/a00114.html and also obtained
39
    by writing to Richard Barry, contact details for whom are available on the
40
    FreeRTOS WEB site.
41
 
42
    1 tab == 4 spaces!
43
 
44
    http://www.FreeRTOS.org - Documentation, latest information, license and
45
    contact details.
46
 
47
    http://www.SafeRTOS.com - A version that is certified for use in safety
48
    critical systems.
49
 
50
    http://www.OpenRTOS.com - Commercial support, development, porting,
51
    licensing and training services.
52
*/
53
 
54
/*
55
        BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
56
 
57
        This file contains all the serial port components that can be compiled to
58
        either ARM or THUMB mode.  Components that must be compiled to ARM mode are
59
        contained in serialISR.c.
60
*/
61
 
62
/* Standard includes. */
63
#include <stdlib.h>
64
 
65
/* Scheduler includes. */
66
#include "FreeRTOS.h"
67
#include "queue.h"
68
#include "task.h"
69
 
70
/* Demo application includes. */
71
#include "serial.h"
72
#include "AT91R40008.h"
73
#include "usart.h"
74
#include "pio.h"
75
#include "aic.h"
76
 
77
/*-----------------------------------------------------------*/
78
 
79
/* Constants to setup and access the UART. */
80
#define portUSART0_AIC_CHANNEL  ( ( unsigned long ) 2 )
81
 
82
#define serINVALID_QUEUE                ( ( xQueueHandle ) 0 )
83
#define serHANDLE                               ( ( xComPortHandle ) 1 )
84
#define serNO_BLOCK                             ( ( portTickType ) 0 )
85
 
86
/*-----------------------------------------------------------*/
87
 
88
/* Queues used to hold received characters, and characters waiting to be
89
transmitted. */
90
static xQueueHandle xRxedChars;
91
static xQueueHandle xCharsForTx;
92
 
93
/*-----------------------------------------------------------*/
94
 
95
/*
96
 * The queues are created in serialISR.c as they are used from the ISR.
97
 * Obtain references to the queues and THRE Empty flag.
98
 */
99
extern void vSerialISRCreateQueues(  unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx );
100
 
101
/*-----------------------------------------------------------*/
102
 
103
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
104
{
105
unsigned long ulSpeed;
106
unsigned long ulCD;
107
xComPortHandle xReturn = serHANDLE;
108
extern void ( vUART_ISR_Wrapper )( void );
109
 
110
        /* The queues are used in the serial ISR routine, so are created from
111
        serialISR.c (which is always compiled to ARM mode. */
112
        vSerialISRCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );
113
 
114
        if(
115
                ( xRxedChars != serINVALID_QUEUE ) &&
116
                ( xCharsForTx != serINVALID_QUEUE ) &&
117
                ( ulWantedBaud != ( unsigned long ) 0 )
118
          )
119
        {
120
                portENTER_CRITICAL();
121
                {
122
                        /* Enable clock to USART0... */
123
                        AT91C_BASE_PS->PS_PCER = AT91C_PS_US0;
124
 
125
                        /* Disable all USART0 interrupt sources to begin... */
126
                        AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;
127
 
128
                        /* Reset various status bits (just in case)... */
129
                        AT91C_BASE_US0->US_CR = US_RSTSTA;
130
 
131
                        AT91C_BASE_PIO->PIO_PDR = TXD0 | RXD0;  /* Enable RXD and TXD pins */
132
                        AT91C_BASE_US0->US_CR = US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS;
133
 
134
                        /* Clear Transmit and Receive Counters */
135
                        AT91C_BASE_US0->US_RCR = 0;
136
                        AT91C_BASE_US0->US_TCR = 0;
137
 
138
                        /* Input clock to baud rate generator is MCK */
139
                        ulSpeed = configCPU_CLOCK_HZ * 10;
140
                        ulSpeed = ulSpeed / 16;
141
                        ulSpeed = ulSpeed / ulWantedBaud;
142
 
143
                        /* compute the error */
144
                        ulCD  = ulSpeed / 10;
145
                        if ((ulSpeed - (ulCD * 10)) >= 5)
146
                        ulCD++;
147
 
148
                        /* Define the baud rate divisor register */
149
                        AT91C_BASE_US0->US_BRGR = ulCD;
150
 
151
                        /* Define the USART mode */
152
                        AT91C_BASE_US0->US_MR = US_CLKS_MCK | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1 | US_CHMODE_NORMAL;
153
 
154
                        /* Write the Timeguard Register */
155
                        AT91C_BASE_US0->US_TTGR = 0;
156
 
157
                        /* Setup the interrupt for USART0.
158
 
159
                        Store interrupt handler function address in USART0 vector register... */
160
                        AT91C_BASE_AIC->AIC_SVR[ portUSART0_AIC_CHANNEL ] = (unsigned long)vUART_ISR_Wrapper;
161
 
162
                        /* USART0 interrupt level-sensitive, priority 1... */
163
                        AT91C_BASE_AIC->AIC_SMR[ portUSART0_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | 1;
164
 
165
                        /* Clear some pending USART0 interrupts (just in case)... */
166
                        AT91C_BASE_US0->US_CR = US_RSTSTA;
167
 
168
                        /* Enable USART0 interrupt sources (but not Tx for now)... */
169
                        AT91C_BASE_US0->US_IER = US_RXRDY;
170
 
171
                        /* Enable USART0 interrupts in the AIC... */
172
                        AT91C_BASE_AIC->AIC_IECR = ( 1 << portUSART0_AIC_CHANNEL );
173
 
174
                        /* Enable receiver and transmitter... */
175
                        AT91C_BASE_US0->US_CR = US_RXEN | US_TXEN;
176
                }
177
                portEXIT_CRITICAL();
178
        }
179
        else
180
        {
181
                xReturn = ( xComPortHandle ) 0;
182
        }
183
 
184
        return xReturn;
185
}
186
/*-----------------------------------------------------------*/
187
 
188
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
189
{
190
        /* The port handle is not required as this driver only supports UART0. */
191
        ( void ) pxPort;
192
 
193
        /* Get the next character from the buffer.  Return false if no characters
194
        are available, or arrive before xBlockTime expires. */
195
        if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
196
        {
197
                return pdTRUE;
198
        }
199
        else
200
        {
201
                return pdFALSE;
202
        }
203
}
204
/*-----------------------------------------------------------*/
205
 
206
void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
207
{
208
signed char *pxNext;
209
 
210
        /* NOTE: This implementation does not handle the queue being full as no
211
        block time is used! */
212
 
213
        /* The port handle is not required as this driver only supports UART0. */
214
        ( void ) pxPort;
215
        ( void ) usStringLength;
216
 
217
        /* Send each character in the string, one at a time. */
218
        pxNext = ( signed char * ) pcString;
219
        while( *pxNext )
220
        {
221
                xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
222
                pxNext++;
223
        }
224
}
225
/*-----------------------------------------------------------*/
226
 
227
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
228
{
229
        ( void ) pxPort;
230
 
231
        /* Place the character in the queue of characters to be transmitted. */
232
        if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
233
        {
234
                return pdFAIL;
235
        }
236
 
237
        /* Turn on the Tx interrupt so the ISR will remove the character from the
238
        queue and send it.   This does not need to be in a critical section as
239
        if the interrupt has already removed the character the next interrupt
240
        will simply turn off the Tx interrupt again. */
241
        AT91C_BASE_US0->US_IER = US_TXRDY;
242
 
243
        return pdPASS;
244
}
245
/*-----------------------------------------------------------*/
246
 
247
void vSerialClose( xComPortHandle xPort )
248
{
249
        /* Not supported as not required by the demo application. */
250
        ( void ) xPort;
251
}
252
/*-----------------------------------------------------------*/
253
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.