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jeremybenn |
//*----------------------------------------------------------------------------
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//* ATMEL Microcontroller Software Support - ROUSSET -
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//*----------------------------------------------------------------------------
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//* The software is delivered "AS IS" without warranty or condition of any
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//* kind, either express, implied or statutory. This includes without
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//* limitation any warranty or condition with respect to merchantability or
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//* fitness for any particular purpose, or against the infringements of
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//* intellectual property rights of others.
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//*-----------------------------------------------------------------------------
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//* File Name : tc.h
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//* Object : Timer Counter Header File
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//*
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//* 1.0 01/04/00 JCZ : Creation
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//* 1.0 01/09/00 JPP : modification TC_BEEVT, TC_BEEVT_SET_OUTPUT,
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//* TC_BEEVT_CLEAR_OUTPUT, TC_BEEVT_TOGGLE_OUTPUT
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//*-----------------------------------------------------------------------------
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#ifndef tc_h
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#define tc_h
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//#include "periph/stdc/std_c.h"
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//#include "periph/pio/lib_pio.h"
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/*-------------------------------------------*/
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/* Timer User Interface Structure Definition */
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/*-------------------------------------------*/
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typedef struct
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{
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at91_reg TC_CCR ; /* Control Register */
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at91_reg TC_CMR ; /* Mode Register */
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at91_reg Reserved0 ;
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at91_reg Reserved1 ;
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at91_reg TC_CV ; /* Counter value */
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at91_reg TC_RA ; /* Register A */
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at91_reg TC_RB ; /* Register B */
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at91_reg TC_RC ; /* Register C */
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at91_reg TC_SR ; /* Status Register */
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at91_reg TC_IER ; /* Interrupt Enable Register */
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at91_reg TC_IDR ; /* Interrupt Disable Register */
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at91_reg TC_IMR ; /* Interrupt Mask Register */
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at91_reg Reserved2 ;
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at91_reg Reserved3 ;
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at91_reg Reserved4 ;
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at91_reg Reserved5 ;
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} StructTC ;
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#define NB_TC_CHANNEL 3
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typedef struct
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{
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StructTC TC[NB_TC_CHANNEL] ;
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at91_reg TC_BCR ; /* Block Control Register */
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at91_reg TC_BMR ; /* Block Mode Register */
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} StructTCBlock ;
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/*--------------------------------------------------------*/
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/* TC_CCR: Timer Counter Control Register Bits Definition */
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/*--------------------------------------------------------*/
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#define TC_CLKEN 0x1
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#define TC_CLKDIS 0x2
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#define TC_SWTRG 0x4
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/*---------------------------------------------------------------*/
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/* TC_CMR: Timer Counter Channel Mode Register Bits Definition */
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/*---------------------------------------------------------------*/
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/*-----------------*/
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/* Clock Selection */
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/*-----------------*/
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#define TC_CLKS 0x7
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#define TC_CLKS_MCK2 0x0
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#define TC_CLKS_MCK8 0x1
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#define TC_CLKS_MCK32 0x2
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#define TC_CLKS_MCK128 0x3
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#define TC_CLKS_MCK1024 0x4
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#define TC_CLKS_SLCK 0x4
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#define TC_CLKS_XC0 0x5
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#define TC_CLKS_XC1 0x6
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#define TC_CLKS_XC2 0x7
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/*-----------------*/
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/* Clock Inversion */
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/*-----------------*/
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#define TC_CLKI 0x8
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/*------------------------*/
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/* Burst Signal Selection */
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/*------------------------*/
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#define TC_BURST 0x30
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#define TC_BURST_NONE 0x0
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#define TC_BUSRT_XC0 0x10
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#define TC_BURST_XC1 0x20
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#define TC_BURST_XC2 0x30
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/*------------------------------------------------------*/
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/* Capture Mode : Counter Clock Stopped with RB Loading */
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/*------------------------------------------------------*/
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#define TC_LDBSTOP 0x40
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/*-------------------------------------------------------*/
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/* Waveform Mode : Counter Clock Stopped with RC Compare */
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/*-------------------------------------------------------*/
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#define TC_CPCSTOP 0x40
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/*-------------------------------------------------------*/
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/* Capture Mode : Counter Clock Disabled with RB Loading */
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/*--------------------------------------------------------*/
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#define TC_LDBDIS 0x80
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/*--------------------------------------------------------*/
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/* Waveform Mode : Counter Clock Disabled with RC Compare */
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/*--------------------------------------------------------*/
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#define TC_CPCDIS 0x80
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/*------------------------------------------------*/
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/* Capture Mode : External Trigger Edge Selection */
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/*------------------------------------------------*/
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#define TC_ETRGEDG 0x300
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#define TC_ETRGEDG_EDGE_NONE 0x0
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#define TC_ETRGEDG_RISING_EDGE 0x100
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#define TC_ETRGEDG_FALLING_EDGE 0x200
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#define TC_ETRGEDG_BOTH_EDGE 0x300
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/*-----------------------------------------------*/
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/* Waveform Mode : External Event Edge Selection */
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/*-----------------------------------------------*/
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#define TC_EEVTEDG 0x300
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#define TC_EEVTEDG_EDGE_NONE 0x0
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#define TC_EEVTEDG_RISING_EDGE 0x100
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#define TC_EEVTEDG_FALLING_EDGE 0x200
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#define TC_EEVTEDG_BOTH_EDGE 0x300
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/*--------------------------------------------------------*/
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/* Capture Mode : TIOA or TIOB External Trigger Selection */
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/*--------------------------------------------------------*/
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#define TC_ABETRG 0x400
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#define TC_ABETRG_TIOB 0x0
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#define TC_ABETRG_TIOA 0x400
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/*------------------------------------------*/
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/* Waveform Mode : External Event Selection */
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/*------------------------------------------*/
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#define TC_EEVT 0xC00
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#define TC_EEVT_TIOB 0x0
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#define TC_EEVT_XC0 0x400
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#define TC_EEVT_XC1 0x800
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#define TC_EEVT_XC2 0xC00
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/*--------------------------------------------------*/
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/* Waveform Mode : Enable Trigger on External Event */
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/*--------------------------------------------------*/
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#define TC_ENETRG 0x1000
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/*----------------------------------*/
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/* RC Compare Enable Trigger Enable */
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/*----------------------------------*/
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#define TC_CPCTRG 0x4000
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/*----------------*/
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/* Mode Selection */
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/*----------------*/
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#define TC_WAVE 0x8000
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#define TC_CAPT 0x0
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/*-------------------------------------*/
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/* Capture Mode : RA Loading Selection */
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/*-------------------------------------*/
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#define TC_LDRA 0x30000
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#define TC_LDRA_EDGE_NONE 0x0
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#define TC_LDRA_RISING_EDGE 0x10000
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#define TC_LDRA_FALLING_EDGE 0x20000
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#define TC_LDRA_BOTH_EDGE 0x30000
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/*-------------------------------------------*/
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/* Waveform Mode : RA Compare Effect on TIOA */
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/*-------------------------------------------*/
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#define TC_ACPA 0x30000
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#define TC_ACPA_OUTPUT_NONE 0x0
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#define TC_ACPA_SET_OUTPUT 0x10000
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#define TC_ACPA_CLEAR_OUTPUT 0x20000
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#define TC_ACPA_TOGGLE_OUTPUT 0x30000
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/*-------------------------------------*/
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/* Capture Mode : RB Loading Selection */
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/*-------------------------------------*/
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#define TC_LDRB 0xC0000
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#define TC_LDRB_EDGE_NONE 0x0
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#define TC_LDRB_RISING_EDGE 0x40000
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#define TC_LDRB_FALLING_EDGE 0x80000
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#define TC_LDRB_BOTH_EDGE 0xC0000
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/*-------------------------------------------*/
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/* Waveform Mode : RC Compare Effect on TIOA */
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/*-------------------------------------------*/
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#define TC_ACPC 0xC0000
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#define TC_ACPC_OUTPUT_NONE 0x0
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#define TC_ACPC_SET_OUTPUT 0x40000
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#define TC_ACPC_CLEAR_OUTPUT 0x80000
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#define TC_ACPC_TOGGLE_OUTPUT 0xC0000
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/*-----------------------------------------------*/
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/* Waveform Mode : External Event Effect on TIOA */
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/*-----------------------------------------------*/
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#define TC_AEEVT 0x300000
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#define TC_AEEVT_OUTPUT_NONE 0x0
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#define TC_AEEVT_SET_OUTPUT 0x100000
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#define TC_AEEVT_CLEAR_OUTPUT 0x200000
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#define TC_AEEVT_TOGGLE_OUTPUT 0x300000
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/*-------------------------------------------------*/
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/* Waveform Mode : Software Trigger Effect on TIOA */
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/*-------------------------------------------------*/
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#define TC_ASWTRG 0xC00000
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#define TC_ASWTRG_OUTPUT_NONE 0x0
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#define TC_ASWTRG_SET_OUTPUT 0x400000
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#define TC_ASWTRG_CLEAR_OUTPUT 0x800000
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#define TC_ASWTRG_TOGGLE_OUTPUT 0xC00000
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/*-------------------------------------------*/
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/* Waveform Mode : RB Compare Effect on TIOB */
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/*-------------------------------------------*/
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#define TC_BCPB 0x1000000
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#define TC_BCPB_OUTPUT_NONE 0x0
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#define TC_BCPB_SET_OUTPUT 0x1000000
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#define TC_BCPB_CLEAR_OUTPUT 0x2000000
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#define TC_BCPB_TOGGLE_OUTPUT 0x3000000
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/*-------------------------------------------*/
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/* Waveform Mode : RC Compare Effect on TIOB */
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/*-------------------------------------------*/
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#define TC_BCPC 0xC000000
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#define TC_BCPC_OUTPUT_NONE 0x0
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#define TC_BCPC_SET_OUTPUT 0x4000000
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#define TC_BCPC_CLEAR_OUTPUT 0x8000000
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#define TC_BCPC_TOGGLE_OUTPUT 0xC000000
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/*-----------------------------------------------*/
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/* Waveform Mode : External Event Effect on TIOB */
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/*-----------------------------------------------*/
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#define TC_BEEVT 0x30000000 //* bit 29-28
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#define TC_BEEVT_OUTPUT_NONE 0x0
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#define TC_BEEVT_SET_OUTPUT 0x10000000 //* bit 29-28 01
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#define TC_BEEVT_CLEAR_OUTPUT 0x20000000 //* bit 29-28 10
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#define TC_BEEVT_TOGGLE_OUTPUT 0x30000000 //* bit 29-28 11
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/*- -----------------------------------------------*/
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/* Waveform Mode : Software Trigger Effect on TIOB */
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/*-------------------------------------------------*/
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#define TC_BSWTRG 0xC0000000
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#define TC_BSWTRG_OUTPUT_NONE 0x0
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#define TC_BSWTRG_SET_OUTPUT 0x40000000
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#define TC_BSWTRG_CLEAR_OUTPUT 0x80000000
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#define TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000
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/*------------------------------------------------------*/
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/* TC_SR: Timer Counter Status Register Bits Definition */
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/*------------------------------------------------------*/
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#define TC_COVFS 0x1 /* Counter Overflow Status */
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#define TC_LOVRS 0x2 /* Load Overrun Status */
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#define TC_CPAS 0x4 /* RA Compare Status */
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#define TC_CPBS 0x8 /* RB Compare Status */
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#define TC_CPCS 0x10 /* RC Compare Status */
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#define TC_LDRAS 0x20 /* RA Loading Status */
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#define TC_LDRBS 0x40 /* RB Loading Status */
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#define TC_ETRGS 0x80 /* External Trigger Status */
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#define TC_CLKSTA 0x10000 /* Clock Status */
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#define TC_MTIOA 0x20000 /* TIOA Mirror */
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#define TC_MTIOB 0x40000 /* TIOB Status */
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/*--------------------------------------------------------------*/
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/* TC_BCR: Timer Counter Block Control Register Bits Definition */
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/*--------------------------------------------------------------*/
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#define TC_SYNC 0x1 /* Synchronisation Trigger */
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/*------------------------------------------------------------*/
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/* TC_BMR: Timer Counter Block Mode Register Bits Definition */
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/*------------------------------------------------------------*/
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#define TC_TC0XC0S 0x3 /* External Clock Signal 0 Selection */
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#define TC_TCLK0XC0 0x0
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#define TC_NONEXC0 0x1
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#define TC_TIOA1XC0 0x2
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#define TC_TIOA2XC0 0x3
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#define TC_TC1XC1S 0xC /* External Clock Signal 1 Selection */
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#define TC_TCLK1XC1 0x0
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#define TC_NONEXC1 0x4
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#define TC_TIOA0XC1 0x8
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#define TC_TIOA2XC1 0xC
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#define TC_TC2XC2S 0x30 /* External Clock Signal 2 Selection */
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#define TC_TCLK2XC2 0x0
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#define TC_NONEXC2 0x10
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#define TC_TIOA0XC2 0x20
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#define TC_TIOA1XC2 0x30
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#endif /* tc_h */
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