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jeremybenn |
/*----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support - ROUSSET -
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*----------------------------------------------------------------------------
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* The software is delivered "AS IS" without warranty or condition of any
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* kind, either express, implied or statutory. This includes without
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* limitation any warranty or condition with respect to merchantability or
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* fitness for any particular purpose, or against the infringements of
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* intellectual property rights of others.
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*----------------------------------------------------------------------------
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* File Name : Board.h
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* Object : AT91SAM7S Evaluation Board Features Definition File.
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*
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* Creation : JPP 16/Jun/2004
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*----------------------------------------------------------------------------
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*/
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#ifndef Board_h
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#define Board_h
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#include "AT91SAM7S64.h"
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#define __inline static inline
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#include "lib_AT91SAM7S64.h"
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#define true -1
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#define false 0
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/*-------------------------------*/
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/* SAM7Board Memories Definition */
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/*-------------------------------*/
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// The AT91SAM7S64 embeds a 16-Kbyte SRAM bank, and 64 K-Byte Flash
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#define INT_SARM 0x00200000
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#define INT_SARM_REMAP 0x00000000
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#define INT_FLASH 0x00000000
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#define INT_FLASH_REMAP 0x01000000
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#define FLASH_PAGE_NB 512
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#define FLASH_PAGE_SIZE 128
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/*-----------------*/
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/* Leds Definition */
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/*-----------------*/
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/* PIO Flash PA PB PIN */
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#define LED1 (1<<0) /* PA0 / PGMEN0 & PWM0 TIOA0 48 */
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#define LED2 (1<<1) /* PA1 / PGMEN1 & PWM1 TIOB0 47 */
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#define LED3 (1<<2) /* PA2 & PWM2 SCK0 44 */
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#define LED4 (1<<3) /* PA3 & TWD NPCS3 43 */
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#define NB_LED 4
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#define LED_MASK (LED1|LED2|LED3|LED4)
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/*-------------------------*/
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/* Push Buttons Definition */
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/*-------------------------*/
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/* PIO Flash PA PB PIN */
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#define SW1_MASK (1<<19) /* PA19 / PGMD7 & RK FIQ 13 */
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#define SW2_MASK (1<<20) /* PA20 / PGMD8 & RF IRQ0 16 */
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#define SW3_MASK (1<<15) /* PA15 / PGM3 & TF TIOA1 20 */
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#define SW4_MASK (1<<14) /* PA14 / PGMD2 & SPCK PWM3 21 */
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#define SW_MASK (SW1_MASK|SW2_MASK|SW3_MASK|SW4_MASK)
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#define SW1 (1<<19) // PA19
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#define SW2 (1<<20) // PA20
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#define SW3 (1<<15) // PA15
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#define SW4 (1<<14) // PA14
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/*------------------*/
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/* USART Definition */
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/*------------------*/
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/* SUB-D 9 points J3 DBGU*/
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#define DBGU_RXD AT91C_PA9_DRXD /* JP11 must be close */
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#define DBGU_TXD AT91C_PA10_DTXD /* JP12 must be close */
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#define AT91C_DBGU_BAUD 115200 // Baud rate
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#define US_RXD_PIN AT91C_PA5_RXD0 /* JP9 must be close */
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#define US_TXD_PIN AT91C_PA6_TXD0 /* JP7 must be close */
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#define US_RTS_PIN AT91C_PA7_RTS0 /* JP8 must be close */
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#define US_CTS_PIN AT91C_PA8_CTS0 /* JP6 must be close */
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/*--------------*/
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/* Master Clock */
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/*--------------*/
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#define EXT_OC 18432000 // Exetrnal ocilator MAINCK
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#define MCK 47923200 // MCK (PLLRC div by 2)
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#define MCKKHz (MCK/1000) //
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#endif /* Board_h */
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