OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_AT91SAM7X256_Eclipse/] [RTOSDemo/] [USB/] [USB_ISR.c] - Blame information for rev 595

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 577 jeremybenn
/*
2
    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
3
 
4
    ***************************************************************************
5
    *                                                                         *
6
    * If you are:                                                             *
7
    *                                                                         *
8
    *    + New to FreeRTOS,                                                   *
9
    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
10
    *    + Looking for basic training,                                        *
11
    *    + Wanting to improve your FreeRTOS skills and productivity           *
12
    *                                                                         *
13
    * then take a look at the FreeRTOS books - available as PDF or paperback  *
14
    *                                                                         *
15
    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
16
    *                  http://www.FreeRTOS.org/Documentation                  *
17
    *                                                                         *
18
    * A pdf reference manual is also available.  Both are usually delivered   *
19
    * to your inbox within 20 minutes to two hours when purchased between 8am *
20
    * and 8pm GMT (although please allow up to 24 hours in case of            *
21
    * exceptional circumstances).  Thank you for your support!                *
22
    *                                                                         *
23
    ***************************************************************************
24
 
25
    This file is part of the FreeRTOS distribution.
26
 
27
    FreeRTOS is free software; you can redistribute it and/or modify it under
28
    the terms of the GNU General Public License (version 2) as published by the
29
    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
30
    ***NOTE*** The exception to the GPL is included to allow you to distribute
31
    a combined work that includes FreeRTOS without being obliged to provide the
32
    source code for proprietary components outside of the FreeRTOS kernel.
33
    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
34
    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
35
    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
36
    more details. You should have received a copy of the GNU General Public
37
    License and the FreeRTOS license exception along with FreeRTOS; if not it
38
    can be viewed here: http://www.freertos.org/a00114.html and also obtained
39
    by writing to Richard Barry, contact details for whom are available on the
40
    FreeRTOS WEB site.
41
 
42
    1 tab == 4 spaces!
43
 
44
    http://www.FreeRTOS.org - Documentation, latest information, license and
45
    contact details.
46
 
47
    http://www.SafeRTOS.com - A version that is certified for use in safety
48
    critical systems.
49
 
50
    http://www.OpenRTOS.com - Commercial support, development, porting,
51
    licensing and training services.
52
*/
53
 
54
/* Scheduler includes. */
55
#include "FreeRTOS.h"
56
#include "task.h"
57
#include "queue.h"
58
 
59
/* Demo app includes. */
60
#include "USBSample.h"
61
 
62
#define usbINT_CLEAR_MASK       (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )
63
 
64
#define usbCSR_CLEAR_BIT( pulValueNow, ulBit )                                                                                  \
65
{                                                                                                                                                                               \
66
        /* Set TXCOMP, RX_DATA_BK0, RXSETUP, */                                                                                         \
67
        /* STALLSENT and RX_DATA_BK1 to 1 so the */                                                                                     \
68
        /* write has no effect. */                                                                                                                      \
69
        ( * ( ( unsigned long * ) pulValueNow ) ) |= ( unsigned long ) 0x4f;            \
70
                                                                                                                                                                                \
71
        /* Clear the FORCE_STALL and TXPKTRDY bits */                                                                           \
72
        /* so the write has no effect. */                                                                                                       \
73
        ( * ( ( unsigned long * ) pulValueNow ) ) &= ( unsigned long ) 0xffffffcf;      \
74
                                                                                                                                                                                \
75
        /* Clear whichever bit we want clear. */                                                                                        \
76
        ( * ( ( unsigned long * ) pulValueNow ) ) &= ( ~ulBit );                                                \
77
}
78
 
79
 
80
/*-----------------------------------------------------------*/
81
 
82
/*
83
 * ISR entry point.
84
 */
85
 
86
void vUSB_ISR_Wrapper( void ) __attribute__((naked));
87
 
88
/*
89
 * Actual ISR handler.  This must be separate from the entry point as the stack
90
 * is used.
91
 */
92
void vUSB_ISR_Handler( void ) __attribute__((noinline));
93
 
94
/*-----------------------------------------------------------*/
95
 
96
/* Array in which the USB interrupt status is passed between the ISR and task. */
97
static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];
98
 
99
/* Queue used to pass messages between the ISR and the task. */
100
extern xQueueHandle xUSBInterruptQueue;
101
 
102
/*-----------------------------------------------------------*/
103
 
104
void vUSB_ISR_Handler( void )
105
{
106
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
107
static volatile unsigned long ulNextMessage = 0;
108
xISRStatus *pxMessage;
109
unsigned long ulTemp, ulRxBytes;
110
 
111
        /* To reduce the amount of time spent in this interrupt it would be
112
        possible to defer the majority of this processing to an 'interrupt task',
113
        that is a task that runs at a higher priority than any of the application
114
        tasks. */
115
 
116
        /* Take the next message from the queue.  Note that usbQUEUE_LENGTH *must*
117
        be all 1's, as in 0x01, 0x03, 0x07, etc. */
118
        pxMessage = &( xISRMessages[ ( ulNextMessage & usbQUEUE_LENGTH ) ] );
119
        ulNextMessage++;
120
 
121
        /* Take a snapshot of the current USB state for processing at the task
122
        level. */
123
        pxMessage->ulISR = AT91C_BASE_UDP->UDP_ISR;
124
        pxMessage->ulCSR0 = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];
125
 
126
        /* Clear the interrupts from the ICR register.  The bus end interrupt is
127
        cleared separately as it does not appear in the mask register. */
128
        AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;
129
 
130
        /* If there are bytes in the FIFO then we have to retrieve them here.
131
        Ideally this would be done at the task level.  However we need to clear the
132
        RXSETUP interrupt before leaving the ISR, and this may cause the data in
133
        the FIFO to be overwritten.  Also the DIR bit has to be changed before the
134
        RXSETUP bit is cleared (as per the SAM7 manual). */
135
        ulTemp = pxMessage->ulCSR0;
136
 
137
        /* Are there any bytes in the FIFO? */
138
        ulRxBytes = ulTemp >> 16;
139
        ulRxBytes &= usbRX_COUNT_MASK;
140
 
141
        /* With this minimal implementation we are only interested in receiving
142
        setup bytes on the control end point. */
143
        if( ( ulRxBytes > 0 ) && ( ulTemp & AT91C_UDP_RXSETUP ) )
144
        {
145
                /* Take off 1 for a zero based index. */
146
                while( ulRxBytes > 0 )
147
                {
148
                        ulRxBytes--;
149
                        pxMessage->ucFifoData[ ulRxBytes ] = AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ];
150
                }
151
 
152
                /* The direction must be changed first. */
153
                usbCSR_SET_BIT( &ulTemp, ( AT91C_UDP_DIR ) );
154
                AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;
155
        }
156
 
157
        /* Must write zero's to TXCOMP, STALLSENT, RXSETUP, and the RX DATA
158
        registers to clear the interrupts in the CSR register. */
159
        usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK );
160
        AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;
161
 
162
        /* Also clear the interrupts in the CSR1 register. */
163
        ulTemp = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ];
164
        usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK );
165
        AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] = ulTemp;
166
 
167
        /* The message now contains the entire state and optional data from
168
        the USB interrupt.  This can now be posted on the Rx queue ready for
169
        processing at the task level. */
170
        xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
171
 
172
        /* We may want to switch to the USB task, if this message has made
173
        it the highest priority task that is ready to execute. */
174
        if( xHigherPriorityTaskWoken )
175
        {
176
                portYIELD_FROM_ISR();
177
        }
178
 
179
        /* Clear the AIC ready for the next interrupt. */
180
        AT91C_BASE_AIC->AIC_EOICR = 0;
181
}
182
/*-----------------------------------------------------------*/
183
 
184
void vUSB_ISR_Wrapper( void )
185
{
186
        /* Save the context of the interrupted task. */
187
        portSAVE_CONTEXT();
188
 
189
        /* Call the handler itself.  This must be a separate function as it uses
190
        the stack. */
191
        __asm volatile ("bl vUSB_ISR_Handler");
192
 
193
        /* Restore the context of the task that is going to
194
        execute next. This might not be the same as the originally
195
        interrupted task.*/
196
        portRESTORE_CONTEXT();
197
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.