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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_AT91SAM7X256_Eclipse/] [RTOSDemo/] [USB/] [USB_ISR.c] - Blame information for rev 620

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1 577 jeremybenn
/*
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    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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    ***************************************************************************
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    *                                                                         *
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    * If you are:                                                             *
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    *                                                                         *
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    *    + New to FreeRTOS,                                                   *
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    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
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    *    + Looking for basic training,                                        *
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    *    + Wanting to improve your FreeRTOS skills and productivity           *
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    *                                                                         *
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    * then take a look at the FreeRTOS books - available as PDF or paperback  *
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    *                                                                         *
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    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
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    *                  http://www.FreeRTOS.org/Documentation                  *
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    *                                                                         *
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    * A pdf reference manual is also available.  Both are usually delivered   *
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    * to your inbox within 20 minutes to two hours when purchased between 8am *
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    * and 8pm GMT (although please allow up to 24 hours in case of            *
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    * exceptional circumstances).  Thank you for your support!                *
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    *                                                                         *
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    ***************************************************************************
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    This file is part of the FreeRTOS distribution.
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    FreeRTOS is free software; you can redistribute it and/or modify it under
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    the terms of the GNU General Public License (version 2) as published by the
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    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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    ***NOTE*** The exception to the GPL is included to allow you to distribute
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    a combined work that includes FreeRTOS without being obliged to provide the
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    source code for proprietary components outside of the FreeRTOS kernel.
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    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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    more details. You should have received a copy of the GNU General Public
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    License and the FreeRTOS license exception along with FreeRTOS; if not it
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    can be viewed here: http://www.freertos.org/a00114.html and also obtained
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    by writing to Richard Barry, contact details for whom are available on the
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    FreeRTOS WEB site.
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    1 tab == 4 spaces!
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    http://www.FreeRTOS.org - Documentation, latest information, license and
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    contact details.
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    http://www.SafeRTOS.com - A version that is certified for use in safety
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    critical systems.
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    http://www.OpenRTOS.com - Commercial support, development, porting,
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    licensing and training services.
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*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#include "queue.h"
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/* Demo app includes. */
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#include "USBSample.h"
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#define usbINT_CLEAR_MASK       (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )
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#define usbCSR_CLEAR_BIT( pulValueNow, ulBit )                                                                                  \
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{                                                                                                                                                                               \
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        /* Set TXCOMP, RX_DATA_BK0, RXSETUP, */                                                                                         \
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        /* STALLSENT and RX_DATA_BK1 to 1 so the */                                                                                     \
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        /* write has no effect. */                                                                                                                      \
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        ( * ( ( unsigned long * ) pulValueNow ) ) |= ( unsigned long ) 0x4f;            \
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                                                                                                                                                                                \
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        /* Clear the FORCE_STALL and TXPKTRDY bits */                                                                           \
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        /* so the write has no effect. */                                                                                                       \
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        ( * ( ( unsigned long * ) pulValueNow ) ) &= ( unsigned long ) 0xffffffcf;      \
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                                                                                                                                                                                \
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        /* Clear whichever bit we want clear. */                                                                                        \
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        ( * ( ( unsigned long * ) pulValueNow ) ) &= ( ~ulBit );                                                \
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}
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/*-----------------------------------------------------------*/
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/*
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 * ISR entry point.
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 */
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void vUSB_ISR_Wrapper( void ) __attribute__((naked));
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/*
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 * Actual ISR handler.  This must be separate from the entry point as the stack
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 * is used.
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 */
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void vUSB_ISR_Handler( void ) __attribute__((noinline));
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/*-----------------------------------------------------------*/
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/* Array in which the USB interrupt status is passed between the ISR and task. */
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static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];
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/* Queue used to pass messages between the ISR and the task. */
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extern xQueueHandle xUSBInterruptQueue;
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/*-----------------------------------------------------------*/
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void vUSB_ISR_Handler( void )
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{
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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static volatile unsigned long ulNextMessage = 0;
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xISRStatus *pxMessage;
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unsigned long ulTemp, ulRxBytes;
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        /* To reduce the amount of time spent in this interrupt it would be
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        possible to defer the majority of this processing to an 'interrupt task',
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        that is a task that runs at a higher priority than any of the application
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        tasks. */
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        /* Take the next message from the queue.  Note that usbQUEUE_LENGTH *must*
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        be all 1's, as in 0x01, 0x03, 0x07, etc. */
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        pxMessage = &( xISRMessages[ ( ulNextMessage & usbQUEUE_LENGTH ) ] );
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        ulNextMessage++;
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        /* Take a snapshot of the current USB state for processing at the task
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        level. */
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        pxMessage->ulISR = AT91C_BASE_UDP->UDP_ISR;
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        pxMessage->ulCSR0 = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ];
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        /* Clear the interrupts from the ICR register.  The bus end interrupt is
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        cleared separately as it does not appear in the mask register. */
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        AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;
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        /* If there are bytes in the FIFO then we have to retrieve them here.
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        Ideally this would be done at the task level.  However we need to clear the
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        RXSETUP interrupt before leaving the ISR, and this may cause the data in
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        the FIFO to be overwritten.  Also the DIR bit has to be changed before the
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        RXSETUP bit is cleared (as per the SAM7 manual). */
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        ulTemp = pxMessage->ulCSR0;
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        /* Are there any bytes in the FIFO? */
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        ulRxBytes = ulTemp >> 16;
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        ulRxBytes &= usbRX_COUNT_MASK;
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        /* With this minimal implementation we are only interested in receiving
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        setup bytes on the control end point. */
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        if( ( ulRxBytes > 0 ) && ( ulTemp & AT91C_UDP_RXSETUP ) )
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        {
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                /* Take off 1 for a zero based index. */
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                while( ulRxBytes > 0 )
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                {
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                        ulRxBytes--;
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                        pxMessage->ucFifoData[ ulRxBytes ] = AT91C_BASE_UDP->UDP_FDR[ usbEND_POINT_0 ];
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                }
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                /* The direction must be changed first. */
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                usbCSR_SET_BIT( &ulTemp, ( AT91C_UDP_DIR ) );
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                AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;
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        }
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        /* Must write zero's to TXCOMP, STALLSENT, RXSETUP, and the RX DATA
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        registers to clear the interrupts in the CSR register. */
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        usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK );
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        AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_0 ] = ulTemp;
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        /* Also clear the interrupts in the CSR1 register. */
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        ulTemp = AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ];
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        usbCSR_CLEAR_BIT( &ulTemp, usbINT_CLEAR_MASK );
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        AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_1 ] = ulTemp;
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        /* The message now contains the entire state and optional data from
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        the USB interrupt.  This can now be posted on the Rx queue ready for
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        processing at the task level. */
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        xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
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        /* We may want to switch to the USB task, if this message has made
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        it the highest priority task that is ready to execute. */
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        if( xHigherPriorityTaskWoken )
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        {
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                portYIELD_FROM_ISR();
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        }
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        /* Clear the AIC ready for the next interrupt. */
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        AT91C_BASE_AIC->AIC_EOICR = 0;
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}
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/*-----------------------------------------------------------*/
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void vUSB_ISR_Wrapper( void )
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{
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        /* Save the context of the interrupted task. */
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        portSAVE_CONTEXT();
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        /* Call the handler itself.  This must be a separate function as it uses
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        the stack. */
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        __asm volatile ("bl vUSB_ISR_Handler");
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        /* Restore the context of the task that is going to
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        execute next. This might not be the same as the originally
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        interrupted task.*/
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        portRESTORE_CONTEXT();
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}

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