OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_AT91SAM7X256_Eclipse/] [at91sam7_ecr.script] - Blame information for rev 610

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 577 jeremybenn
halt
2
wait_halt
3
sleep 10
4
mww 0xfffffd44 0x00008000       # disable watchdog
5
mww 0xfffffd08 0xa5000001       # enable user reset
6
mww 0xfffffc20 0x00000601       # CKGR_MOR : enable the main oscillator
7
sleep 10
8
mww 0xfffffc2c 0x12560a64       # CKGR_PLLR: 119.8MHz (DIV=100,MUL=598+1)
9
sleep 10
10
mww 0xfffffc30 0x00000007       # PMC_MCKR : MCK = PLL / 2 = 59.9MHz
11
sleep 10
12
mww 0xffffff60 0x003c0100       # MC_FMR: flash mode (FWS=1,FMCN=60)
13
arm7_9 force_hw_bkpts enable    # program resides in flash

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.