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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_LPC2368_Eclipse/] [RTOSDemo/] [lpc2368.ld] - Blame information for rev 620

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Line No. Rev Author Line
1 577 jeremybenn
MEMORY
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{
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        flash   : ORIGIN = 0x00000000, LENGTH = 500K
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        ram     : ORIGIN = 0x40000000, LENGTH = 32K
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        usbram   : ORIGIN = 0x7FD00000, LENGTH = 8K
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        ethram   : ORIGIN = 0x7FE00000, LENGTH = 16K
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}
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__stack_end__ = 0x40000000 + 32K - 4;
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SECTIONS
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{
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        . = 0;
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        startup : { *(.startup)} >flash
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        prog :
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        {
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                *(.text)
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                *(.rodata)
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                *(.rodata*)
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                *(.glue_7)
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                *(.glue_7t)
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                KEEP(*(.eh_frame))
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        } >flash
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        __end_of_text__ = .;
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        .data :
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        {
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                __data_beg__ = .;
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                __data_beg_src__ = __end_of_text__;
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                *(.data)
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                __data_end__ = .;
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        } >ram AT>flash
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        .bss :
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        {
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                __bss_beg__ = .;
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                *(.bss)
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        } >ram
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        /* Align here to ensure that the .bss section occupies space up to
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        _end.  Align after .bss to ensure correct alignment even if the
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        .bss section disappears because there are no input sections.  */
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        . = ALIGN(32 / 8);
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        _bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
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        .usbram (NOLOAD):
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        {
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        __usbram_beg__ = .;
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        *(.dmaram)
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                __usbram_end__ = .;
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        } >usbram
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        .ethram (NOLOAD):
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        {
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        __ethram_beg__ = .;
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        *(.ethram)
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                __ethram_end__ = .;
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        } >ethram
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}
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        . = ALIGN(32 / 8);
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        _end = .;
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        PROVIDE (end = .);
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