OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_STR71x_IAR/] [Library/] [71x_lib.c] - Blame information for rev 577

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 577 jeremybenn
/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
2
* File Name          : 71x_lib.c
3
* Author             : MCD Application Team
4
* Date First Issued  : 05/16/2003
5
* Description        : Peripherals pointers initialization
6
********************************************************************************
7
* History:
8
*  30/11/2004 : V2.0
9
*  14/07/2004 : V1.3
10
*  01/01/2004 : V1.2
11
*******************************************************************************
12
 THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
13
 CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
14
 AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
15
 OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
16
 OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
17
 CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18
*******************************************************************************/
19
#define EXT
20
 
21
#include "71x_map.h"
22
 
23
#ifdef DEBUG
24
 
25
extern u32 T0TIMI_Addr;
26
 
27
/*******************************************************************************
28
* Function Name  : debug
29
* Description    : Initialize the pointers to peripherals
30
* Input          : none
31
* Output         : none
32
* Return         : none
33
*******************************************************************************/
34
void debug(void)
35
{
36
  #ifdef _ADC12
37
  ADC12 = (ADC12_TypeDef *)ADC12_BASE;
38
  #endif
39
 
40
  #ifdef _APB
41
  #ifdef _APB1
42
  APB1 = (APB_TypeDef *)APB1_BASE;
43
  #endif
44
  #ifdef _APB2
45
  APB2 = (APB_TypeDef *)APB2_BASE;
46
  #endif
47
  #endif
48
 
49
  #ifdef _BSPI
50
  #ifdef _BSPI0
51
  BSPI0 = (BSPI_TypeDef *)BSPI0_BASE;
52
  #endif
53
  #ifdef _BSPI1
54
  BSPI1 = (BSPI_TypeDef *)BSPI1_BASE;
55
  #endif
56
  #endif
57
 
58
  #ifdef _CAN
59
  CAN = (CAN_TypeDef *)CAN_BASE;
60
  #endif
61
 
62
  #ifdef _EIC
63
  EIC = (EIC_TypeDef *)EIC_BASE;
64
  #endif
65
 
66
  #ifdef _EMI
67
  EMI = (EMI_TypeDef *)EMI_BASE;
68
  #endif
69
 
70
  #ifdef _FLASH
71
  FLASHR = (FLASHR_TypeDef *)FLASHR_BASE;
72
  FLASHPR = (FLASHPR_TypeDef *)FLASHPR_BASE;
73
  #endif
74
 
75
  #ifdef _GPIO
76
  #ifdef _GPIO0
77
  GPIO0 = (GPIO_TypeDef *)GPIO0_BASE;
78
  #endif
79
  #ifdef _GPIO1
80
  GPIO1 = (GPIO_TypeDef *)GPIO1_BASE;
81
  #endif
82
  #ifdef _GPIO2
83
  GPIO2 = (GPIO_TypeDef *)GPIO2_BASE;
84
  #endif
85
  #endif
86
 
87
  #ifdef _I2C
88
  #ifdef _I2C0
89
  I2C0 = (I2C_TypeDef *)I2C0_BASE;
90
  #endif
91
  #ifdef _I2C1
92
  I2C1 = (I2C_TypeDef *)I2C1_BASE;
93
  #endif
94
  #endif
95
 
96
  #ifdef _PCU
97
  PCU = (PCU_TypeDef *)PCU_BASE;
98
  #endif
99
 
100
  #ifdef _RCCU
101
  RCCU = (RCCU_TypeDef *)RCCU_BASE;
102
  #endif
103
 
104
  #ifdef _RTC
105
  RTC = (RTC_TypeDef *)RTC_BASE;
106
  #endif
107
 
108
  #ifdef _TIM
109
  #ifdef _TIM0
110
  TIM0 = (TIM_TypeDef *)TIM0_BASE;
111
  #endif
112
  #ifdef _TIM1
113
  TIM1 = (TIM_TypeDef *)TIM1_BASE;
114
  #endif
115
  #ifdef _TIM2
116
  TIM2 = (TIM_TypeDef *)TIM2_BASE;
117
  #endif
118
  #ifdef _TIM3
119
  TIM3 = (TIM_TypeDef *)TIM3_BASE;
120
  #endif
121
  #endif
122
 
123
  #ifdef _UART
124
  #ifdef _UART0
125
  UART0 = (UART_TypeDef *)UART0_BASE;
126
  #endif
127
  #ifdef _UART1
128
  UART1 = (UART_TypeDef *)UART1_BASE;
129
  #endif
130
  #ifdef _UART2
131
  UART2 = (UART_TypeDef *)UART2_BASE;
132
  #endif
133
  #ifdef _UART3
134
  UART3 = (UART_TypeDef *)UART3_BASE;
135
  #endif
136
  #endif
137
 
138
  #ifdef _USB
139
  USB = (USB_TypeDef *)USB_BASE;
140
  #endif
141
 
142
  #ifdef _WDG
143
  WDG = (WDG_TypeDef *)WDG_BASE;
144
  #endif
145
 
146
  #ifdef _XTI
147
  XTI = (XTI_TypeDef *)XTI_BASE;
148
  #endif
149
 
150
  #ifdef _IRQVectors
151
  IRQVectors = (IRQVectors_TypeDef *)&T0TIMI_Addr;
152
  #endif
153
}
154
 
155
#endif  /* DEBUG */
156
 
157
/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.