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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_STR71x_IAR/] [Library/] [include/] [rccu.h] - Blame information for rev 577

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/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
* File Name          : rccu.h
* Author             : MCD Application Team
* Date First Issued  : 28/07/2003
* Description        : This file contains all the functions prototypes for the
*                      RCCU software library.
********************************************************************************
* History:
*  30/11/2004 : V2.0
*  14/07/2004 : V1.3
*  01/01/2004 : V1.2
*******************************************************************************
 THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
 CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
 AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
 OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
 OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
 CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
 
#ifndef __RCCU_H
#define __RCCU_H
 
#include "71x_map.h"
 
typedef enum {
               RCCU_DEFAULT=0x00,
               RCCU_RCLK_2 =0x01,
               RCCU_RCLK_4 =0x02,
               RCCU_RCLK_8 =0x03
             } RCCU_Clock_Div;
 
typedef enum {
               RCCU_PLL1_Output,
               RCCU_CLOCK2_16,
               RCCU_CLOCK2,
               RCCU_RTC_CLOCK
             } RCCU_RCLK_Clocks;
 
 
                     typedef enum {
               RCCU_PLL1_Mul_12=0x01,
               RCCU_PLL1_Mul_16=0x03,
               RCCU_PLL1_Mul_20=0x00,
               RCCU_PLL1_Mul_24=0x02
             } RCCU_PLL1_Mul;
 
typedef enum {
               RCCU_PLL2_Mul_12=0x01,
               RCCU_PLL2_Mul_16=0x03,
               RCCU_PLL2_Mul_20=0x00,
               RCCU_PLL2_Mul_28=0x02
             } RCCU_PLL2_Mul;
 
typedef enum {
               RCCU_Div_1=0x00,
               RCCU_Div_2=0x01,
               RCCU_Div_3=0x02,
               RCCU_Div_4=0x03,
               RCCU_Div_5=0x04,
               RCCU_Div_6=0x05,
               RCCU_Div_7=0x06
             } RCCU_PLL_Div;
 
typedef enum {
               RCCU_PLL2_Output = 0x01,
               RCCU_USBCK       = 0x00
             } RCCU_USB_Clocks;
 
typedef enum {
               RCCU_CLK2,
               RCCU_RCLK,
               RCCU_MCLK,
               RCCU_PCLK,
               RCCU_FCLK
             } RCCU_Clocks;
 
typedef enum {
               RCCU_PLL1_LOCK_IT = 0x0080,
               RCCU_CKAF_IT      = 0x0100,
               RCCU_CK2_16_IT    = 0x0200,
               RCCU_STOP_IT      = 0x0400
             } RCCU_Interrupts;
 
typedef enum {
               RCCU_PLL1_LOCK   = 0x0002,
               RCCU_CKAF_ST     = 0x0004,
               RCCU_PLL1_LOCK_I = 0x0800,
               RCCU_CKAF_I      = 0x1000,
               RCCU_CK2_16_I    = 0x2000,
               RCCU_STOP_I      = 0x4000
             } RCCU_Flags;
 
typedef enum {
               RCCU_ExternalReset = 0x00000000,
               RCCU_SoftwareReset = 0x00000020,
               RCCU_WDGReset      = 0x00000040,
               RCCU_RTCAlarmReset = 0x00000080,
               RCCU_LVDReset      = 0x00000200,
               RCCU_WKPReset      = 0x00000400
              }RCCU_ResetSources;
 
 
#define RCCU_Div2_Mask  0x00008000
#define RCCU_Div2_Index 0x0F
#define RCCU_FACT_Mask  0x0003
 
#define RCCU_FACT1_Mask  0x0003
 
#define RCCU_FACT2_Mask  0x0300
#define RCCU_FACT2_Index 0x08
 
#define RCCU_MX_Mask   0x00000030
#define RCCU_MX_Index  0x04
 
#define RCCU_DX_Mask   0x00000007
 
#define RCCU_FREEN_Mask    0x00000080
 
#define RCCU_CSU_CKSEL_Mask 0x00000001
 
#define RCCU_CK2_16_Mask    0x00000008
 
#define RCCU_CKAF_SEL_Mask  0x00000004
 
#define RCCU_LOCK_Mask     0x00000002
 
#define RCCU_USBEN_Mask   0x0100
#define RCCU_USBEN_Index  0x08
#define RCCU_ResetSources_Mask 0x000006E0
 
// RTC Oscillator Frequency value = 32 768 Hz
#define RCCU_RTC_Osc  32768
 
 
/*******************************************************************************
* Function Name  : RCCU_Div2Config
* Description    : Enables/Disables the clock division by two
* Input          : NewState : ENABLE or DISABLE
* Return         : None
*******************************************************************************/
inline void RCCU_Div2Config ( FunctionalState NewState )
{
  if (NewState == ENABLE) RCCU->CFR |= RCCU_Div2_Mask;
    else RCCU->CFR &= ~RCCU_Div2_Mask;
}
 
/*******************************************************************************
* Function Name  : RCCU_Div2Status
* Description    : Gets the Div2 Flag status
* Input          : None
* Input          : FlagStatus
* Return         : None
*******************************************************************************/
inline FlagStatus RCCU_Div2Status ( void )
{
  return (RCCU->CFR & RCCU_Div2_Mask) == 0 ? RESET : SET;
}
 
/*******************************************************************************
* Function Name  : RCCU_MCLKConfig
* Description    : Selects the division factor for RCLK to obtain the
*                  MCLK clock for the CPU
* Input          : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, RCCU_RCLK_4, RCCU_RCLK_8
* Return         : None
*******************************************************************************/
inline void RCCU_MCLKConfig ( RCCU_Clock_Div New_Clock )
{
  PCU->MDIVR = ( PCU->MDIVR & ~RCCU_FACT_Mask ) | New_Clock;
}
 
/*******************************************************************************
* Function Name  : RCCU_FCLKConfig
* Description    : Selects the division factor for RCLK to obtain the
*                  FCLK clock for the APB1 fast peripherals (PCLK1).
* Input          : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2,
*                               RCCU_RCLK_4, RCCU_RCLK_8
* Return         : None
*******************************************************************************/
inline void RCCU_FCLKConfig ( RCCU_Clock_Div New_Clock )
{
  PCU->PDIVR = ( PCU->PDIVR & ~RCCU_FACT1_Mask ) | New_Clock;
}
 
/*******************************************************************************
* Function Name  : RCCU_PCLKConfig
* Description    : Selects the division factor for RCLK to obtain the
*                  PCLK clock for the APB2 peripherals (PCLK2).
* Input          : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2,
*                              RCCU_RCLK_4, RCCU_RCLK_8
* Return         : None
*******************************************************************************/
inline void RCCU_PCLKConfig ( RCCU_Clock_Div New_Clock )
{
  PCU->PDIVR =(PCU->PDIVR & ~RCCU_FACT2_Mask)|(New_Clock << RCCU_FACT2_Index);
}
 
/*******************************************************************************
* Function Name  : RCCU_PLL1Config
* Description    : Configures the PLL1 div & mul factors.
* Input          : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28
*                : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3,
*                            RCCU_Div_4, RCCU_Div_5, RCCU_Div_6, RCCU_Div_7
* Return         : None
*******************************************************************************/
void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div );
 
/*******************************************************************************
* Function Name  : RCCU_PLL2Config
* Description    : Configures the PLL2 div & mul factors.
* Input          : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28
*                : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4,
*                            RCCU_Div_5, RCCU_Div_6, RCCU_Div_7
* Return         : None
*******************************************************************************/
void RCCU_PLL2Config ( RCCU_PLL2_Mul New_Mul, RCCU_PLL_Div New_Div );
 
/*******************************************************************************
* Function Name  : RCCU_RCLKSourceConfig
* Description    : Selects the RCLK source clock
* Input          : New_Clock : RCCU_PLL1_OutPut, RCCU_CLOCK2_16, RCCU_CLOCK2
* Return         : None
*******************************************************************************/
void RCCU_RCLKSourceConfig ( RCCU_RCLK_Clocks New_Clock );
 
/*******************************************************************************
* Function Name  : RCCU_RCLKClockSource
* Description    : Returns the current RCLK source clock
* Input          : None
* Return         : RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2
*******************************************************************************/
RCCU_RCLK_Clocks RCCU_RCLKClockSource ( void );
 
/*******************************************************************************
* Function Name  : RCCU_USBCLKConfig
* Description    : Selects the USB source clock
* Input          : New_Clock : RCCU_PLL2_Output, RCCU_USBCK
* Return         : None
*******************************************************************************/
inline void RCCU_USBCLKConfig ( RCCU_USB_Clocks New_Clock )
{
  PCU->PLL2CR = (PCU->PLL2CR & ~RCCU_USBEN_Mask)|(New_Clock << RCCU_USBEN_Index);
}
 
/*******************************************************************************
* Function Name  : RCCU_USBClockSource
* Description    : Gets the USB source clock
* Input          : None
* Return         : RCCU_USB_Clocks
*******************************************************************************/
RCCU_USB_Clocks RCCU_USBClockSource ( void );
 
/*******************************************************************************
* Function Name  : RCCU_FrequencyValue
* Description    : Calculates & Returns any internal RCCU clock freuqency
*                  passed in parametres
* Input          : RCCU_Clocks : RCCU_CLK2, RCCU_RCLK, RCCU_MCLK,
*                  RCCU_PCLK, RCCU_FCLK
* Return         : u32
*******************************************************************************/
u32 RCCU_FrequencyValue ( RCCU_Clocks Internal_Clk );
 
/*******************************************************************************
* Function Name  : RCCU_ITConfig
* Description    : Configures the RCCU interrupts
* Input          : RCCU interrupts : RCCU_CK2_16_IT, RCCU_CKAF_IT,
*                  RCCU_PLL1_LOCK_IT
* Return         : None
*******************************************************************************/
inline void RCCU_ITConfig ( RCCU_Interrupts RCCU_IT, FunctionalState NewState)
{
  if (NewState == ENABLE) RCCU->CCR |= RCCU_IT; else RCCU->CCR &= ~RCCU_IT;
}
 
/*******************************************************************************
* Function Name  : RCCU_FlagStatus
* Description    : Checks the RCCU clock flag register status
* Input          : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK
* Return         : FlagStatus : SET or RESET
*******************************************************************************/
inline FlagStatus RCCU_FlagStatus ( RCCU_Flags RCCU_flag )
{
  return (RCCU->CFR & RCCU_flag) == 0 ? RESET : SET;
}
 
/*******************************************************************************
* Function Name  : RCCU_FlagClear
* Description    : Clears a specified flag in the RCCU registers
* Input          : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK
* Return         : None
*******************************************************************************/
inline void RCCU_FlagClear ( RCCU_Interrupts RCCU_IT )
{
  RCCU->CFR |= RCCU_IT;
}
 
/*******************************************************************************
* Function Name  : RCCU_ResetSources
* Description    : Return the source of the system reset
* Input          : None
* Return         : The reset source
*******************************************************************************/
inline RCCU_ResetSources RCCU_ResetSource ()
{
 
  switch(RCCU->CFR & RCCU_ResetSources_Mask)
  {
    case 0x00000020: return RCCU_SoftwareReset;
    case 0x00000040: return RCCU_WDGReset;
    case 0x00000080: return RCCU_RTCAlarmReset;
    case 0x00000200: return RCCU_LVDReset;
    case 0x00000400: return RCCU_WKPReset;
    default : return RCCU_ExternalReset;
  }
}
 
#endif  // __RCCU_H
 
/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/

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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_STR71x_IAR/] [Library/] [include/] [rccu.h] - Blame information for rev 577

Line No.	Rev	Author	Line
1	577	jeremybenn	`/****************** (C) COPYRIGHT 2003 STMicroelectronics ******************`
2			`* File Name : rccu.h`
3			`* Author : MCD Application Team`
4			`* Date First Issued : 28/07/2003`
5			`* Description : This file contains all the functions prototypes for the`
6			`* RCCU software library.`
7			`********************************************************************************`
8			`* History:`
9			`* 30/11/2004 : V2.0`
10			`* 14/07/2004 : V1.3`
11			`* 01/01/2004 : V1.2`
12			`*******************************************************************************`
13			`THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH`
14			`CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.`
15			`AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT`
16			`OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT`
17			`OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION`
18			`CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.`
19			`*******************************************************************************/`
20
21			`#ifndef __RCCU_H`
22			`#define __RCCU_H`
23
24			`#include "71x_map.h"`
25
26			`typedef enum {`
27			`RCCU_DEFAULT=0x00,`
28			`RCCU_RCLK_2 =0x01,`
29			`RCCU_RCLK_4 =0x02,`
30			`RCCU_RCLK_8 =0x03`
31			`} RCCU_Clock_Div;`
32
33			`typedef enum {`
34			`RCCU_PLL1_Output,`
35			`RCCU_CLOCK2_16,`
36			`RCCU_CLOCK2,`
37			`RCCU_RTC_CLOCK`
38			`} RCCU_RCLK_Clocks;`
39
40
41			`typedef enum {`
42			`RCCU_PLL1_Mul_12=0x01,`
43			`RCCU_PLL1_Mul_16=0x03,`
44			`RCCU_PLL1_Mul_20=0x00,`
45			`RCCU_PLL1_Mul_24=0x02`
46			`} RCCU_PLL1_Mul;`
47
48			`typedef enum {`
49			`RCCU_PLL2_Mul_12=0x01,`
50			`RCCU_PLL2_Mul_16=0x03,`
51			`RCCU_PLL2_Mul_20=0x00,`
52			`RCCU_PLL2_Mul_28=0x02`
53			`} RCCU_PLL2_Mul;`
54
55			`typedef enum {`
56			`RCCU_Div_1=0x00,`
57			`RCCU_Div_2=0x01,`
58			`RCCU_Div_3=0x02,`
59			`RCCU_Div_4=0x03,`
60			`RCCU_Div_5=0x04,`
61			`RCCU_Div_6=0x05,`
62			`RCCU_Div_7=0x06`
63			`} RCCU_PLL_Div;`
64
65			`typedef enum {`
66			`RCCU_PLL2_Output = 0x01,`
67			`RCCU_USBCK = 0x00`
68			`} RCCU_USB_Clocks;`
69
70			`typedef enum {`
71			`RCCU_CLK2,`
72			`RCCU_RCLK,`
73			`RCCU_MCLK,`
74			`RCCU_PCLK,`
75			`RCCU_FCLK`
76			`} RCCU_Clocks;`
77
78			`typedef enum {`
79			`RCCU_PLL1_LOCK_IT = 0x0080,`
80			`RCCU_CKAF_IT = 0x0100,`
81			`RCCU_CK2_16_IT = 0x0200,`
82			`RCCU_STOP_IT = 0x0400`
83			`} RCCU_Interrupts;`
84
85			`typedef enum {`
86			`RCCU_PLL1_LOCK = 0x0002,`
87			`RCCU_CKAF_ST = 0x0004,`
88			`RCCU_PLL1_LOCK_I = 0x0800,`
89			`RCCU_CKAF_I = 0x1000,`
90			`RCCU_CK2_16_I = 0x2000,`
91			`RCCU_STOP_I = 0x4000`
92			`} RCCU_Flags;`
93
94			`typedef enum {`
95			`RCCU_ExternalReset = 0x00000000,`
96			`RCCU_SoftwareReset = 0x00000020,`
97			`RCCU_WDGReset = 0x00000040,`
98			`RCCU_RTCAlarmReset = 0x00000080,`
99			`RCCU_LVDReset = 0x00000200,`
100			`RCCU_WKPReset = 0x00000400`
101			`}RCCU_ResetSources;`
102
103
104			`#define RCCU_Div2_Mask 0x00008000`
105			`#define RCCU_Div2_Index 0x0F`
106			`#define RCCU_FACT_Mask 0x0003`
107
108			`#define RCCU_FACT1_Mask 0x0003`
109
110			`#define RCCU_FACT2_Mask 0x0300`
111			`#define RCCU_FACT2_Index 0x08`
112
113			`#define RCCU_MX_Mask 0x00000030`
114			`#define RCCU_MX_Index 0x04`
115
116			`#define RCCU_DX_Mask 0x00000007`
117
118			`#define RCCU_FREEN_Mask 0x00000080`
119
120			`#define RCCU_CSU_CKSEL_Mask 0x00000001`
121
122			`#define RCCU_CK2_16_Mask 0x00000008`
123
124			`#define RCCU_CKAF_SEL_Mask 0x00000004`
125
126			`#define RCCU_LOCK_Mask 0x00000002`
127
128			`#define RCCU_USBEN_Mask 0x0100`
129			`#define RCCU_USBEN_Index 0x08`
130			`#define RCCU_ResetSources_Mask 0x000006E0`
131
132			`// RTC Oscillator Frequency value = 32 768 Hz`
133			`#define RCCU_RTC_Osc 32768`
134
135
136			`/*******************************************************************************`
137			`* Function Name : RCCU_Div2Config`
138			`* Description : Enables/Disables the clock division by two`
139			`* Input : NewState : ENABLE or DISABLE`
140			`* Return : None`
141			`*******************************************************************************/`
142			`inline void RCCU_Div2Config ( FunctionalState NewState )`
143			`{`
144			`if (NewState == ENABLE) RCCU->CFR \|= RCCU_Div2_Mask;`
145			`else RCCU->CFR &= ~RCCU_Div2_Mask;`
146			`}`
147
148			`/*******************************************************************************`
149			`* Function Name : RCCU_Div2Status`
150			`* Description : Gets the Div2 Flag status`
151			`* Input : None`
152			`* Input : FlagStatus`
153			`* Return : None`
154			`*******************************************************************************/`
155			`inline FlagStatus RCCU_Div2Status ( void )`
156			`{`
157			`return (RCCU->CFR & RCCU_Div2_Mask) == 0 ? RESET : SET;`
158			`}`
159
160			`/*******************************************************************************`
161			`* Function Name : RCCU_MCLKConfig`
162			`* Description : Selects the division factor for RCLK to obtain the`
163			`* MCLK clock for the CPU`
164			`* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, RCCU_RCLK_4, RCCU_RCLK_8`
165			`* Return : None`
166			`*******************************************************************************/`
167			`inline void RCCU_MCLKConfig ( RCCU_Clock_Div New_Clock )`
168			`{`
169			`PCU->MDIVR = ( PCU->MDIVR & ~RCCU_FACT_Mask ) \| New_Clock;`
170			`}`
171
172			`/*******************************************************************************`
173			`* Function Name : RCCU_FCLKConfig`
174			`* Description : Selects the division factor for RCLK to obtain the`
175			`* FCLK clock for the APB1 fast peripherals (PCLK1).`
176			`* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2,`
177			`* RCCU_RCLK_4, RCCU_RCLK_8`
178			`* Return : None`
179			`*******************************************************************************/`
180			`inline void RCCU_FCLKConfig ( RCCU_Clock_Div New_Clock )`
181			`{`
182			`PCU->PDIVR = ( PCU->PDIVR & ~RCCU_FACT1_Mask ) \| New_Clock;`
183			`}`
184
185			`/*******************************************************************************`
186			`* Function Name : RCCU_PCLKConfig`
187			`* Description : Selects the division factor for RCLK to obtain the`
188			`* PCLK clock for the APB2 peripherals (PCLK2).`
189			`* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2,`
190			`* RCCU_RCLK_4, RCCU_RCLK_8`
191			`* Return : None`
192			`*******************************************************************************/`
193			`inline void RCCU_PCLKConfig ( RCCU_Clock_Div New_Clock )`
194			`{`
195			`PCU->PDIVR =(PCU->PDIVR & ~RCCU_FACT2_Mask)\|(New_Clock << RCCU_FACT2_Index);`
196			`}`
197
198			`/*******************************************************************************`
199			`* Function Name : RCCU_PLL1Config`
200			`* Description : Configures the PLL1 div & mul factors.`
201			`* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28`
202			`* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3,`
203			`* RCCU_Div_4, RCCU_Div_5, RCCU_Div_6, RCCU_Div_7`
204			`* Return : None`
205			`*******************************************************************************/`
206			`void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div );`
207
208			`/*******************************************************************************`
209			`* Function Name : RCCU_PLL2Config`
210			`* Description : Configures the PLL2 div & mul factors.`
211			`* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28`
212			`* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4,`
213			`* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7`
214			`* Return : None`
215			`*******************************************************************************/`
216			`void RCCU_PLL2Config ( RCCU_PLL2_Mul New_Mul, RCCU_PLL_Div New_Div );`
217
218			`/*******************************************************************************`
219			`* Function Name : RCCU_RCLKSourceConfig`
220			`* Description : Selects the RCLK source clock`
221			`* Input : New_Clock : RCCU_PLL1_OutPut, RCCU_CLOCK2_16, RCCU_CLOCK2`
222			`* Return : None`
223			`*******************************************************************************/`
224			`void RCCU_RCLKSourceConfig ( RCCU_RCLK_Clocks New_Clock );`
225
226			`/*******************************************************************************`
227			`* Function Name : RCCU_RCLKClockSource`
228			`* Description : Returns the current RCLK source clock`
229			`* Input : None`
230			`* Return : RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2`
231			`*******************************************************************************/`
232			`RCCU_RCLK_Clocks RCCU_RCLKClockSource ( void );`
233
234			`/*******************************************************************************`
235			`* Function Name : RCCU_USBCLKConfig`
236			`* Description : Selects the USB source clock`
237			`* Input : New_Clock : RCCU_PLL2_Output, RCCU_USBCK`
238			`* Return : None`
239			`*******************************************************************************/`
240			`inline void RCCU_USBCLKConfig ( RCCU_USB_Clocks New_Clock )`
241			`{`
242			`PCU->PLL2CR = (PCU->PLL2CR & ~RCCU_USBEN_Mask)\|(New_Clock << RCCU_USBEN_Index);`
243			`}`
244
245			`/*******************************************************************************`
246			`* Function Name : RCCU_USBClockSource`
247			`* Description : Gets the USB source clock`
248			`* Input : None`
249			`* Return : RCCU_USB_Clocks`
250			`*******************************************************************************/`
251			`RCCU_USB_Clocks RCCU_USBClockSource ( void );`
252
253			`/*******************************************************************************`
254			`* Function Name : RCCU_FrequencyValue`
255			`* Description : Calculates & Returns any internal RCCU clock freuqency`
256			`* passed in parametres`
257			`* Input : RCCU_Clocks : RCCU_CLK2, RCCU_RCLK, RCCU_MCLK,`
258			`* RCCU_PCLK, RCCU_FCLK`
259			`* Return : u32`
260			`*******************************************************************************/`
261			`u32 RCCU_FrequencyValue ( RCCU_Clocks Internal_Clk );`
262
263			`/*******************************************************************************`
264			`* Function Name : RCCU_ITConfig`
265			`* Description : Configures the RCCU interrupts`
266			`* Input : RCCU interrupts : RCCU_CK2_16_IT, RCCU_CKAF_IT,`
267			`* RCCU_PLL1_LOCK_IT`
268			`* Return : None`
269			`*******************************************************************************/`
270			`inline void RCCU_ITConfig ( RCCU_Interrupts RCCU_IT, FunctionalState NewState)`
271			`{`
272			`if (NewState == ENABLE) RCCU->CCR \|= RCCU_IT; else RCCU->CCR &= ~RCCU_IT;`
273			`}`
274
275			`/*******************************************************************************`
276			`* Function Name : RCCU_FlagStatus`
277			`* Description : Checks the RCCU clock flag register status`
278			`* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK`
279			`* Return : FlagStatus : SET or RESET`
280			`*******************************************************************************/`
281			`inline FlagStatus RCCU_FlagStatus ( RCCU_Flags RCCU_flag )`
282			`{`
283			`return (RCCU->CFR & RCCU_flag) == 0 ? RESET : SET;`
284			`}`
285
286			`/*******************************************************************************`
287			`* Function Name : RCCU_FlagClear`
288			`* Description : Clears a specified flag in the RCCU registers`
289			`* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK`
290			`* Return : None`
291			`*******************************************************************************/`
292			`inline void RCCU_FlagClear ( RCCU_Interrupts RCCU_IT )`
293			`{`
294			`RCCU->CFR \|= RCCU_IT;`
295			`}`
296
297			`/*******************************************************************************`
298			`* Function Name : RCCU_ResetSources`
299			`* Description : Return the source of the system reset`
300			`* Input : None`
301			`* Return : The reset source`
302			`*******************************************************************************/`
303			`inline RCCU_ResetSources RCCU_ResetSource ()`
304			`{`
305
306			`switch(RCCU->CFR & RCCU_ResetSources_Mask)`
307			`{`
308			`case 0x00000020: return RCCU_SoftwareReset;`
309			`case 0x00000040: return RCCU_WDGReset;`
310			`case 0x00000080: return RCCU_RTCAlarmReset;`
311			`case 0x00000200: return RCCU_LVDReset;`
312			`case 0x00000400: return RCCU_WKPReset;`
313			`default : return RCCU_ExternalReset;`
314			`}`
315			`}`
316
317			`#endif // __RCCU_H`
318
319			`/***************** (C) COPYRIGHT 2003 STMicroelectronics *END OF FILE**/`