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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_STR75x_GCC/] [SystemFiles/] [crt0_STR75x_FreeRTOS.s] - Blame information for rev 584

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Line No. Rev Author Line
1 577 jeremybenn
/*
2
This is the default Startup for STR75x devices for the GNU toolchain
3
 
4
It has been designed by ST Microelectronics and modified by Raisonance
5
and FreeRTOS.org.
6
 
7
You can use it, modify it, distribute it freely but without any waranty.
8
 
9
*/
10
.extern main
11
 
12
 
13
 
14
/*; Depending on Your Application, Disable or Enable the following Defines*/
15
  /*; --------------------------------------------------------------------------
16
  ;                      SMI Bank0 configuration
17
; ----------------------------------------------------------------------------*/
18
.set SMI_Bank0_EN, 0 /*; enable access the SMI Bank0 if 1*/
19
 
20
/*; ----------------------------------------------------------------------------
21
  ;                      Memory remapping
22
; ----------------------------------------------------------------------------*/
23
.set Remap_SRAM, 0   /* remap SRAM at address 0x00 if 1 */
24
 
25
/*  ; ----------------------------------------------------------------------------
26
  ;                      EIC initialization
27
  ; ----------------------------------------------------------------------------*/
28
.set EIC_INIT, 1     /*; Configure and Initialize EIC if 1*/
29
 
30
 
31
;/* the following are useful for initializing the .data section */
32
.extern _sidata ;/* start address for the initialization values of the .data section. defined in linker script */
33
.extern _sdata ;/* start address for the .data section. defined in linker script */
34
.extern _edata ;/* end address for the .data section. defined in linker script */
35
 
36
;/* the following are useful for initializing the .bss section */
37
.extern _sbss ;/* start address for the .bss section. defined in linker script */
38
.extern _ebss ;/* end address for the .bss section. defined in linker script */
39
 
40
;/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
41
.set  Mode_USR, 0x10            ;/* User Mode */
42
.set  Mode_FIQ, 0x11            ;/* FIQ Mode */
43
.set  Mode_IRQ, 0x12            ;/* IRQ Mode */
44
.set  Mode_SVC, 0x13            ;/* Supervisor Mode */
45
.set  Mode_ABT, 0x17            ;/* Abort Mode */
46
.set  Mode_UNDEF, 0x1B          ;/* Undefined Mode */
47
.set  Mode_SYS, 0x1F            ;/* System Mode */
48
 
49
.equ  I_Bit, 0x80               ;/* when I bit is set, IRQ is disabled */
50
.equ  F_Bit, 0x40               ;/* when F bit is set, FIQ is disabled */
51
 
52
/*; --- System memory locations */
53
 
54
;/* init value for the stack pointer. defined in linker script */
55
.extern _estack
56
 
57
;/* Stack Sizes. The default values are in the linker script, but they can be overriden. */
58
.extern _UND_Stack_Init
59
.extern _SVC_Stack_Init
60
.extern _ABT_Stack_Init
61
.extern _FIQ_Stack_Init
62
.extern _IRQ_Stack_Init
63
.extern _USR_Stack_Init
64
 
65
.extern _UND_Stack_Size
66
.extern _SVC_Stack_Size
67
.extern _ABT_Stack_Size
68
.extern _FIQ_Stack_Size
69
.extern _IRQ_Stack_Size
70
.extern _USR_Stack_Size
71
.extern vTaskSwitchContext
72
.extern ulCriticalNesting
73
 
74
SVC_Stack           =     _SVC_Stack_Init /*_estack*/           /*; 32 byte SVC stack at*/
75
                                              /*; top of memory */
76
 
77
IRQ_Stack           =     _IRQ_Stack_Init /*SVC_Stack - 32*/     /*; followed by IRQ stack */
78
USR_Stack           =     _USR_Stack_Init /*IRQ_Stack-256*/    /*; followed by USR stack */
79
FIQ_Stack           =     _FIQ_Stack_Init /*USR_Stack-256*/    /*; followed by FIQ stack*/
80
ABT_Stack           =     _ABT_Stack_Init /*FIQ_Stack-64*/     /*; followed by ABT stack */
81
UNDEF_Stack         =     _UND_Stack_Init /*ABT_Stack-0*/     /*; followed by UNDEF stack */
82
 
83
/*; --- System memory locations*/
84
 
85
/*; MRCC Register*/
86
MRCC_PCLKEN_Addr    =    0x60000030  /*; Peripheral Clock Enable register base address*/
87
 
88
/*; CFG Register*/
89
CFG_GLCONF_Addr     =    0x60000010  /*; Global Configuration register base address*/
90
SRAM_mask           =    0x0002      /*; to remap RAM at 0x0*/
91
 
92
/*; GPIO Register*/
93
GPIOREMAP0R_Addr    =    0xFFFFE420
94
SMI_EN_Mask         =    0x00000001
95
 
96
/*; SMI Register*/
97
SMI_CR1_Addr        =    0x90000000
98
 
99
/*; --- Stack Addres for each ARM mode*/
100
/*; add FIQ_Stack, ABT_Stack, UNDEF_Stack here if you need them*/
101
 
102
 
103
/*; --- EIC Registers offsets*/
104
EIC_base_addr       =    0xFFFFF800         /*; EIC base address*/
105
ICR_off_addr        =    0x00               /*; Interrupt Control register offset*/
106
CICR_off_addr       =    0x04               /*; Current Interrupt Channel Register*/
107
CIPR_off_addr       =    0x08               /*; Current Interrupt Priority Register offset*/
108
IVR_off_addr        =    0x18               /*; Interrupt Vector Register offset*/
109
FIR_off_addr        =    0x1C               /*; Fast Interrupt Register offset*/
110
IER_off_addr        =    0x20               /*; Interrupt Enable Register offset*/
111
IPR_off_addr        =    0x40               /*; Interrupt Pending Bit Register offset*/
112
SIR0_off_addr       =    0x60               /*; Source Interrupt Register 0*/
113
 
114
/***************************************************************************************/
115
 
116
 
117
.globl _start
118
.globl _startup
119
 
120
.text
121
_startup:
122
_start:
123
        LDR     PC, Reset_Addr
124
        LDR     PC, Undefined_Addr
125
        LDR     PC, SWI_Addr
126
        LDR     PC, Prefetch_Addr
127
        LDR     PC, Abort_Addr
128
        NOP                          /*; Reserved vector*/
129
        LDR     PC, IRQ_Addr
130
        LDR     PC, FIQ_Addr
131
 
132
 
133
 
134
 
135
 
136
Reset_Addr      : .long     Reset_Handler
137
Undefined_Addr  : .long     UndefinedHandler
138
SWI_Addr        : .long     SWIHandler
139
Prefetch_Addr   : .long     PrefetchAbortHandler
140
Abort_Addr      : .long     DataAbortHandler
141
                  .long 0      /*; Reserved vector*/
142
IRQ_Addr        : .long     IRQHandler
143
FIQ_Addr        : .long     FIQHandler
144
 
145
.text
146
/*;*******************************************************************************
147
;              Peripherals IRQ handlers address table
148
;********************************************************************************/
149
 
150
/* execution goes there when an interrupt occurs and there is no associated ISR */
151
.globl __wrongvector
152
__wrongvector:
153
        ldr     PC, __wrongvector_Addr
154
__wrongvector_Addr:
155
        .long 0
156
 
157
WAKUP_Addr         :.long       WAKUPIRQHandler
158
TIM2_OC2_Addr      :.long       TIM2_OC2IRQHandler
159
TIM2_OC1_Addr      :.long       TIM2_OC1IRQHandler
160
TIM2_IC12_Addr     :.long       TIM2_IC12IRQHandler
161
TIM2_UP_Addr       :.long       TIM2_UPIRQHandler
162
TIM1_OC2_Addr      :.long       TIM1_OC2IRQHandler
163
TIM1_OC1_Addr      :.long       TIM1_OC1IRQHandler
164
TIM1_IC12_Addr     :.long       TIM1_IC12IRQHandler
165
TIM1_UP_Addr       :.long       TIM1_UPIRQHandler
166
TIM0_OC2_Addr      :.long       TIM0_OC2IRQHandler
167
TIM0_OC1_Addr      :.long       TIM0_OC1IRQHandler
168
TIM0_IC12_Addr     :.long       TIM0_IC12IRQHandler
169
TIM0_UP_Addr       :.long       TIM0_UPIRQHandler
170
PWM_OC123_Addr     :.long       PWM_OC123IRQHandler
171
PWM_EM_Addr        :.long       PWM_EMIRQHandler
172
PWM_UP_Addr        :.long       PWM_UPIRQHandler
173
I2C_Addr           :.long       I2CIRQHandler
174
SSP1_Addr          :.long       SSP1IRQHandler
175
SSP0_Addr          :.long       SSP0IRQHandler
176
UART2_Addr         :.long       UART2IRQHandler
177
UART1_Addr         :.long       UART1IRQHandler
178
UART0_Addr         :.long       vSerialISR
179
CAN_Addr           :.long       CANIRQHandler
180
USB_LP_Addr        :.long       USB_LPIRQHandler
181
USB_HP_Addr        :.long       USB_HPIRQHandler
182
ADC_Addr           :.long       ADCIRQHandler
183
DMA_Addr           :.long       DMAIRQHandler
184
EXTIT_Addr         :.long       EXTITIRQHandler
185
MRCC_Addr          :.long       MRCCIRQHandler
186
FLASHSMI_Addr      :.long       FLASHSMIIRQHandler
187
RTC_Addr           :.long       RTCIRQHandler
188
TB_Addr            :.long       vPortTickISR
189
 
190
/*;*******************************************************************************
191
;                         Exception Handlers
192
;********************************************************************************/
193
 
194
 
195
/*;*******************************************************************************
196
;* FreeRTOS.org macros for saving and restoring a task context
197
;*******************************************************************************/
198
 
199
        .macro portSAVE_CONTEXT MACRO
200
 
201
        /* ; Push R0 as we are going to use the register. */
202
        STMDB   SP!, {R0}
203
 
204
        /* ; Set R0 to point to the task stack pointer. */
205
        STMDB   SP, {SP}^
206
        NOP
207
        SUB             SP, SP, #4
208
        LDMIA   SP!, {R0}
209
 
210
        /* ; Push the return address onto the stack.    */
211
        STMDB   R0!, {LR}
212
 
213
        /* ; Now we have saved LR we can use it instead of R0.  */
214
        MOV             LR, R0
215
 
216
        /* ; Pop R0 so we can save it onto the system mode stack. */
217
        LDMIA   SP!, {R0}
218
 
219
        /* ; Push all the system mode registers onto the task stack. */
220
        STMDB   LR, {R0-LR}^
221
        NOP
222
        SUB             LR, LR, #60
223
 
224
        /* ; Push the SPSR onto the task stack.  */
225
        MRS             R0, SPSR
226
        STMDB   LR!, {R0}
227
 
228
        LDR             R0, =ulCriticalNesting
229
        LDR             R0, [R0]
230
        STMDB   LR!, {R0}
231
 
232
        /* ; Store the new top of stack for the task.   */
233
        LDR             R1, =pxCurrentTCB
234
        LDR             R0, [R1]
235
        STR             LR, [R0]
236
 
237
        .endm
238
 
239
 
240
        .macro portRESTORE_CONTEXT MACRO
241
 
242
        /* ; Set the LR to the task stack.      */
243
        LDR             R1, =pxCurrentTCB
244
        LDR             R0, [R1]
245
        LDR             LR, [R0]
246
 
247
        /* ; The critical nesting depth is the first item on the stack.         
248
        ; Load it into the ulCriticalNesting variable.  */
249
        LDR             R0, =ulCriticalNesting
250
        LDMFD   LR!, {R1}
251
        STR             R1, [R0]
252
 
253
        /* ; Get the SPSR from the stack.       */
254
        LDMFD   LR!, {R0}
255
        MSR             SPSR_cxsf, R0
256
 
257
        /* ; Restore all system mode registers for the task. */
258
        LDMFD   LR, {R0-R14}^
259
        NOP
260
 
261
        /* ; Restore the return address. */
262
        LDR             LR, [LR, #+60]
263
 
264
        /* ; And return - correcting the offset in the LR to obtain the         
265
        ; correct address.      */
266
        SUBS    PC, LR, #4
267
 
268
        .endm
269
 
270
 
271
 
272
/*;*******************************************************************************
273
;* Macro Name     : SaveContext
274
;* Description    : This macro used to save the context before entering
275
;                   an exception handler.
276
;* Input          : The range of registers to store.
277
;* Output         : none
278
;********************************************************************************/
279
 
280
       .macro SaveContext $r0,$r12
281
        STMFD  sp!,{r0-r12,lr} /*; Save The workspace plus the current return*/
282
                               /*; address lr_ mode into the stack.*/
283
        MRS    r1,spsr         /*; Save the spsr_mode into r1.*/
284
        STMFD  sp!,{r1}        /*; Save spsr.*/
285
        .endm
286
 
287
/*;*******************************************************************************
288
;* Macro Name     : RestoreContext
289
;* Description    : This macro used to restore the context to return from
290
;                   an exception handler and continue the program execution.
291
;* Input          : The range of registers to restore.
292
;* Output         : none
293
;********************************************************************************/
294
 
295
        .macro RestoreContext $r0,$r12
296
        LDMFD   sp!,{r1}        /*; Restore the saved spsr_mode into r1.*/
297
        MSR     spsr_cxsf,r1    /*; Restore spsr_mode.*/
298
        LDMFD   sp!,{r0-r12,pc}^/*; Return to the instruction following...*/
299
                                /*; ...the exception interrupt.*/
300
        .endm
301
 
302
 
303
 
304
/*;*******************************************************************************
305
;* Function Name  : UndefinedHandler
306
;* Description    : This function called when undefined instruction
307
;                   exception is entered.
308
;* Input          : none
309
;* Output         : none
310
;*********************************************************************************/
311
 
312
UndefinedHandler:
313
        SaveContext r0,r12    /*; Save the workspace plus the current*/
314
                              /*; return address lr_ und and spsr_und.*/
315
        BL      Undefined_Handler/*; Branch to Undefined_Handler*/
316
        RestoreContext r0,r12 /*; Return to the instruction following...*/
317
                              /*; ...the undefined instruction.*/
318
 
319
/*;*******************************************************************************
320
;* Function Name  : SWIHandler
321
;* Description    : This function called when SWI instruction executed.
322
;* Input          : none
323
;* Output         : none
324
;********************************************************************************/
325
 
326
SWIHandler:
327
                ADD     LR, LR, #4
328
        portSAVE_CONTEXT
329
        LDR R0, =vTaskSwitchContext
330
        MOV LR, PC
331
        BX R0
332
        portRESTORE_CONTEXT
333
 
334
 
335
/*;*******************************************************************************
336
;* Function Name  : IRQHandler
337
;* Description    : This function called when IRQ exception is entered.
338
;* Input          : none
339
;* Output         : none
340
;********************************************************************************/
341
 
342
 
343
IRQHandler:
344
 
345
        portSAVE_CONTEXT                                        /*; Save the context of the current task. */
346
 
347
        LDR    r0, =EIC_base_addr
348
        LDR    r1, =IVR_off_addr
349
        LDR    lr, =ReturnAddress                       /*; Load the return address. */
350
        ADD    pc,r0,r1                                         /*; Branch to the IRQ handler. */
351
ReturnAddress:
352
        LDR    r0, =EIC_base_addr
353
        LDR    r2, [r0, #CICR_off_addr]         /*; Get the IRQ channel number. */
354
        MOV    r3,#1
355
        MOV    r3,r3,LSL r2
356
        STR    r3,[r0, #IPR_off_addr]           /*; Clear the corresponding IPR bit. */
357
 
358
        portRESTORE_CONTEXT                                     /*; Restore the context of the selected task. */
359
 
360
/*;*******************************************************************************
361
;* Function Name  : PrefetchAbortHandler
362
;* Description    : This function called when Prefetch Abort
363
;                   exception is entered.
364
;* Input          : none
365
;* Output         : none
366
;*********************************************************************************/
367
 
368
PrefetchAbortHandler:
369
                NOP
370
                B PrefetchAbortHandler
371
 
372
/*;*******************************************************************************
373
;* Function Name  : DataAbortHandler
374
;* Description    : This function is called when Data Abort
375
;                   exception is entered.
376
;* Input          : none
377
;* Output         : none
378
;********************************************************************************/
379
 
380
DataAbortHandler:
381
                NOP
382
                NOP
383
                B DataAbortHandler
384
                              /*; ...has generated the data abort exception.*/
385
 
386
/*;*******************************************************************************
387
;* Function Name  : FIQHandler
388
;* Description    : This function is called when FIQ
389
;*                  exception is entered.
390
;* Input          : none
391
;* Output         : none
392
;********************************************************************************/
393
 
394
FIQHandler:
395
        SUB    lr,lr,#4       /*; Update the link register.*/
396
        SaveContext r0,r7     /*; Save the workspace plus the current*/
397
                              /*; return address lr_ fiq and spsr_fiq.*/
398
        BL      FIQ_Handler   /*; Branch to FIQ_Handler.*/
399
        RestoreContext r0,r7  /*; Restore the context and return to the...*/
400
                              /*; ...program execution.*/
401
 
402
/*;*******************************************************************************
403
;* Macro Name     : IRQ_to_SYS
404
;* Description    : This macro used to switch form IRQ mode to SYS mode
405
;* Input          : none.
406
;* Output         : none
407
;*******************************************************************************/
408
       .macro IRQ_to_SYS
409
 
410
        MSR    cpsr_c,#0x1F
411
        STMFD  sp!,{lr}
412
       .endm
413
/*;*******************************************************************************
414
;* Macro Name     : SYS_to_IRQ
415
;* Description    : This macro used to switch from SYS mode to IRQ mode
416
;                   then to return to IRQHnadler routine.
417
;* Input          : none.
418
;* Output         : none.
419
;*******************************************************************************/
420
      .macro SYS_to_IRQ
421
       LDMFD  sp!,{lr}      /*; Restore the link register. */
422
        MSR    cpsr_c,#0xD2  /*; Switch to IRQ mode.*/
423
        MOV    pc,lr         /*; Return to IRQHandler routine to clear the*/
424
                             /*; pending bit.*/
425
       .endm
426
 
427
/*;*******************************************************************************
428
;* Function Name  : WAKUPIRQHandler
429
;* Description    : This function used to switch to SYS mode before entering
430
;*                  the WAKUP_IRQHandler function located in 75x_it.c.
431
;*                  Then to return to IRQ mode after the
432
;*                  WAKUP_IRQHandler function termination.
433
;* Input          : none
434
;* Output         : none
435
;*******************************************************************************/
436
WAKUPIRQHandler:
437
        IRQ_to_SYS
438
        BL     WAKUP_IRQHandler
439
        SYS_to_IRQ
440
 
441
/*;*******************************************************************************
442
;* Function Name  : TIM2_OC2IRQHandler
443
;* Description    : This function used to switch to SYS mode before entering
444
;*                  the TIM3_OC2_IRQHandler function located in 75x_it.c.
445
;*                  Then to return to IRQ mode after the
446
;*                  TIM2_OC2_IRQHandler function termination.
447
;* Input          : none
448
;* Output         : none
449
;*******************************************************************************/
450
TIM2_OC2IRQHandler:
451
        IRQ_to_SYS
452
        BL     TIM2_OC2_IRQHandler
453
        SYS_to_IRQ
454
 
455
/*;*******************************************************************************
456
;* Function Name  : TIM2_OC1IRQHandler
457
;* Description    : This function used to switch to SYS mode before entering
458
;*                  the TIM2_OC1_IRQHandler function located in 75x_it.c.
459
;*                  Then to return to IRQ mode after the
460
;*                  TIM2_OC1_IRQHandler function termination.
461
;* Input          : none
462
;* Output         : none
463
;*******************************************************************************/
464
TIM2_OC1IRQHandler:
465
        IRQ_to_SYS
466
        BL     TIM2_OC1_IRQHandler
467
        SYS_to_IRQ
468
 
469
/*;*******************************************************************************
470
;* Function Name  : TIM2_IC12IRQHandler
471
;* Description    : This function used to switch to SYS mode before entering
472
;*                  the TIM2_IC12_IRQHandler function located in 75x_it.c.
473
;*                  Then to return to IRQ mode after the
474
;*                  TIM2_IC12_IRQHandler function termination.
475
;* Input          : none
476
;* Output         : none
477
;*******************************************************************************/
478
TIM2_IC12IRQHandler:
479
        IRQ_to_SYS
480
        BL     TIM2_IC12_IRQHandler
481
        SYS_to_IRQ
482
 
483
/*;*******************************************************************************
484
;* Function Name  : TIM2_UPIRQHandler
485
;* Description    : This function used to switch to SYS mode before entering
486
;*                  the TIM2_UP_IRQHandler function located in 75x_it.c.
487
;*                  Then to return to IRQ mode after the
488
;*                  TIM3_UP_IRQHandler function termination.
489
;* Input          : none
490
;* Output         : none
491
;*******************************************************************************/
492
TIM2_UPIRQHandler:
493
        IRQ_to_SYS
494
        BL     TIM2_UP_IRQHandler
495
        SYS_to_IRQ
496
 
497
/*;*******************************************************************************
498
;* Function Name  : TIM1_OC2IRQHandler
499
;* Description    : This function used to switch to SYS mode before entering
500
;*                  the TIM1_OC2_IRQHandler function located in 75x_it.c.
501
;*                  Then to return to IRQ mode after the
502
;*                  TIM1_OC2_IRQHandler function termination.
503
;* Input          : none
504
;* Output         : none
505
;*******************************************************************************/
506
TIM1_OC2IRQHandler:
507
        IRQ_to_SYS
508
        BL     TIM1_OC2_IRQHandler
509
        SYS_to_IRQ
510
 
511
/*;*******************************************************************************
512
;* Function Name  : TIM1_OC1IRQHandler
513
;* Description    : This function used to switch to SYS mode before entering
514
;*                  the TIM1_OC1_IRQHandler function located in 75x_it.c.
515
;*                  Then to return to IRQ mode after the
516
;*                  TIM1_OC1_IRQHandler function termination.
517
;* Input          : none
518
;* Output         : none
519
;*******************************************************************************/
520
TIM1_OC1IRQHandler:
521
        IRQ_to_SYS
522
        BL     TIM1_OC1_IRQHandler
523
        SYS_to_IRQ
524
 
525
/*;*******************************************************************************
526
;* Function Name  : TIM1_IC12IRQHandler
527
;* Description    : This function used to switch to SYS mode before entering
528
;*                  the TIM1_IC12_IRQHandler function located in 75x_it.c.
529
;*                  Then to return to IRQ mode after the
530
;*                  TIM1_IC12_IRQHandler function termination.
531
;* Input          : none
532
;* Output         : none
533
;*******************************************************************************/
534
TIM1_IC12IRQHandler:
535
        IRQ_to_SYS
536
        BL     TIM1_IC12_IRQHandler
537
        SYS_to_IRQ
538
 
539
/*;*******************************************************************************
540
;* Function Name  : TIM1_UPIRQHandler
541
;* Description    : This function used to switch to SYS mode before entering
542
;*                  the TIM1_UP_IRQHandler function located in 75x_it.c.
543
;*                  Then to return to IRQ mode after the
544
;*                  TIM1_UP_IRQHandler function termination.
545
;* Input          : none
546
;* Output         : none
547
;*******************************************************************************/
548
TIM1_UPIRQHandler:
549
        IRQ_to_SYS
550
        BL     TIM1_UP_IRQHandler
551
        SYS_to_IRQ
552
 
553
/*;*******************************************************************************
554
;* Function Name  : TIM0_OC2IRQHandler
555
;* Description    : This function used to switch to SYS mode before entering
556
;*                  the TIM0_OC2_IRQHandler function located in 75x_it.c.
557
;*                  Then to return to IRQ mode after the
558
;*                  TIM0_OC2_IRQHandler function termination.
559
;* Input          : none
560
;* Output         : none
561
;*******************************************************************************/
562
TIM0_OC2IRQHandler:
563
        IRQ_to_SYS
564
        BL     TIM0_OC2_IRQHandler
565
        SYS_to_IRQ
566
 
567
/*;*******************************************************************************
568
;* Function Name  : TIM0_OC1IRQHandler
569
;* Description    : This function used to switch to SYS mode before entering
570
;*                  the TIM0_OC1_IRQHandler function located in 75x_it.c.
571
;*                  Then to return to IRQ mode after the
572
;*                  TIM0_OC1_IRQHandler function termination.
573
;* Input          : none
574
;* Output         : none
575
;*******************************************************************************/
576
TIM0_OC1IRQHandler:
577
        IRQ_to_SYS
578
        BL     TIM0_OC1_IRQHandler
579
        SYS_to_IRQ
580
 
581
/*;*******************************************************************************
582
;* Function Name  : TIM0_IC12IRQHandler
583
;* Description    : This function used to switch to SYS mode before entering
584
;*                  the TIM0_IC12_IRQHandler function located in 75x_it.c.
585
;*                  Then to return to IRQ mode after the
586
;*                  TIM0_IC12_IRQHandler function termination.
587
;* Input          : none
588
;* Output         : none
589
;********************************************************************************/
590
TIM0_IC12IRQHandler:
591
        IRQ_to_SYS
592
        BL     TIM0_IC12_IRQHandler
593
        SYS_to_IRQ
594
 
595
/*;*******************************************************************************
596
;* Function Name  : TIM0_UPIRQHandler
597
;* Description    : This function used to switch to SYS mode before entering
598
;*                  the TIM0_UP_IRQHandler function located in 75x_it.c.
599
;*                  Then to return to IRQ mode after the
600
;*                  TIM0_UP_IRQHandler function termination.
601
;* Input          : none
602
;* Output         : none
603
;********************************************************************************/
604
TIM0_UPIRQHandler:
605
        IRQ_to_SYS
606
        BL     TIM0_UP_IRQHandler
607
        SYS_to_IRQ
608
 
609
/*;*******************************************************************************
610
;* Function Name  : PWM_OC123IRQHandler
611
;* Description    : This function used to switch to SYS mode before entering
612
;*                  the PWM_OC123_IRQHandler function located in 75x_it.c.
613
;*                  Then to return to IRQ mode after the
614
;*                    PWM_OC123_IRQHandler function termination.
615
;* Input          : none
616
;* Output         : none
617
;********************************************************************************/
618
PWM_OC123IRQHandler:
619
        IRQ_to_SYS
620
        BL     PWM_OC123_IRQHandler
621
        SYS_to_IRQ
622
 
623
/*;*******************************************************************************
624
;* Function Name  : PWM_EMIRQHandler
625
;* Description    : This function used to switch to SYS mode before entering
626
;*                  the PWM_EM_IRQHandler function located in 75x_it.c.
627
;*                  Then to return to IRQ mode after the
628
;*                  PWM_EM_IRQHandler function termination.
629
;* Input          : none
630
;* Output         : none
631
;*******************************************************************************/
632
PWM_EMIRQHandler:
633
        IRQ_to_SYS
634
        BL     PWM_EM_IRQHandler
635
        SYS_to_IRQ
636
 
637
/*;*******************************************************************************
638
;* Function Name  : PWM_UPIRQHandler
639
;* Description    : This function used to switch to SYS mode before entering
640
;*                  the PWM_UP_IRQHandler function located in 75x_it.c.
641
;*                  Then to return to IRQ mode after the
642
;*                  PWM_UP_IRQHandler function termination.
643
;* Input          : none
644
;* Output         : none
645
;*******************************************************************************/
646
PWM_UPIRQHandler:
647
        IRQ_to_SYS
648
        BL     PWM_UP_IRQHandler
649
        SYS_to_IRQ
650
 
651
/*;*******************************************************************************
652
;* Function Name  : I2CIRQHandler
653
;* Description    : This function used to switch to SYS mode before entering
654
;*                  the I2C_IRQHandler function located in 75x_it.c.
655
;*                  Then to return to IRQ mode after the
656
;*                  I2C_IRQHandler function termination.
657
;* Input          : none
658
;* Output         : none
659
;*******************************************************************************/
660
I2CIRQHandler:
661
        IRQ_to_SYS
662
        BL     I2C_IRQHandler
663
        SYS_to_IRQ
664
 
665
/*;*******************************************************************************
666
;* Function Name  : SSP1IRQHandler
667
;* Description    : This function used to switch to SYS mode before entering
668
;*                  the SSP1_IRQHandler function located in 75x_it.c.
669
;*                  Then to return to IRQ mode after the
670
;*                  SSP1_IRQHandler function termination.
671
;* Input          : none
672
;* Output         : none
673
;*******************************************************************************/
674
SSP1IRQHandler:
675
        IRQ_to_SYS
676
        BL     SSP1_IRQHandler
677
        SYS_to_IRQ
678
 
679
/*;*******************************************************************************
680
;* Function Name  : SSP0IRQHandler
681
;* Description    : This function used to switch to SYS mode before entering
682
;*                  the SSP0_IRQHandler function located in 75x_it.c.
683
;*                  Then to return to IRQ mode after the
684
;*                  SSP0_IRQHandler function termination.
685
;* Input          : none
686
;* Output         : none
687
;*******************************************************************************/
688
SSP0IRQHandler:
689
        IRQ_to_SYS
690
        BL     SSP0_IRQHandler
691
        SYS_to_IRQ
692
 
693
/*;*******************************************************************************
694
;* Function Name  : UART2IRQHandler
695
;* Description    : This function used to switch to SYS mode before entering
696
;*                  the UART2_IRQHandler function located in 75x_it.c.
697
;*                  Then to return to IRQ mode after the
698
;*                  UART2_IRQHandler function termination.
699
;* Input          : none
700
;* Output         : none
701
;*******************************************************************************/
702
UART2IRQHandler:
703
        IRQ_to_SYS
704
        BL     UART2_IRQHandler
705
        SYS_to_IRQ
706
 
707
/*;*******************************************************************************
708
;* Function Name  : UART1IRQHandler
709
;* Description    : This function used to switch to SYS mode before entering
710
;*                  the UART1_IRQHandler function located in 75x_it.c.
711
;*                  Then to return to IRQ mode after the
712
;*                  UART1_IRQHandler function termination.
713
;* Input          : none
714
;* Output         : none
715
;*******************************************************************************/
716
UART1IRQHandler:
717
        IRQ_to_SYS
718
        BL     UART1_IRQHandler
719
        SYS_to_IRQ
720
 
721
/*;*******************************************************************************
722
;* Function Name  : UART0IRQHandler
723
;* Description    : This function used to switch to SYS mode before entering
724
;*                  the UART0_IRQHandler function located in 75x_it.c.
725
;*                  Then to return to IRQ mode after the
726
;*                  UART0_IRQHandler function termination.
727
;* Input          : none
728
;* Output         : none
729
;********************************************************************************/
730
UART0IRQHandler:
731
        IRQ_to_SYS
732
        BL     UART0_IRQHandler
733
        SYS_to_IRQ
734
 
735
/*;*******************************************************************************
736
;* Function Name  : CANIRQHandler
737
;* Description    : This function used to switch to SYS mode before entering
738
;*                  the CAN_IRQHandler function located in 75x_it.c.
739
;*                  Then to return to IRQ mode after the
740
;*                  CAN_IRQHandler function termination.
741
;* Input          : none
742
;* Output         : none
743
;********************************************************************************/
744
CANIRQHandler:
745
        IRQ_to_SYS
746
        BL     CAN_IRQHandler
747
        SYS_to_IRQ
748
 
749
/*;*******************************************************************************
750
;* Function Name  : USB_LPIRQHandler
751
;* Description    : This function used to switch to SYS mode before entering
752
;*                  the USB_LP_IRQHandler function located in 75x_it.c.
753
;*                  Then to return to IRQ mode after the
754
;*                  USB_LP_IRQHandler function termination.
755
;* Input          : none
756
;* Output         : none
757
;********************************************************************************/
758
USB_LPIRQHandler:
759
        IRQ_to_SYS
760
        BL     USB_LP_IRQHandler
761
        SYS_to_IRQ
762
 
763
/*;*******************************************************************************
764
;* Function Name  : USB_HPIRQHandler
765
;* Description    : This function used to switch to SYS mode before entering
766
;*                  the USB_HP_IRQHandler function located in 75x_it.c.
767
;*                  Then to return to IRQ mode after the
768
;*                  USB_HP_IRQHandler function termination.
769
;* Input          : none
770
;* Output         : none
771
;********************************************************************************/
772
USB_HPIRQHandler:
773
        IRQ_to_SYS
774
        BL     USB_HP_IRQHandler
775
        SYS_to_IRQ
776
 
777
/*;*******************************************************************************
778
;* Function Name  : ADCIRQHandler
779
;* Description    : This function used to switch to SYS mode before entering
780
;*                  the ADC_IRQHandler function located in 75x_it.c.
781
;*                  Then to return to IRQ mode after the
782
;*                  ADC_IRQHandler function termination.
783
;* Input          : none
784
;* Output         : none
785
;********************************************************************************/
786
ADCIRQHandler:
787
        IRQ_to_SYS
788
        BL     ADC_IRQHandler
789
        SYS_to_IRQ
790
 
791
/*;*******************************************************************************
792
;* Function Name  : DMAIRQHandler
793
;* Description    : This function used to switch to SYS mode before entering
794
;*                  the DMA_IRQHandler function located in 75x_it.c.
795
;*                  Then to return to IRQ mode after the
796
;*                  DMA_IRQHandler function termination.
797
;* Input          : none
798
;* Output         : none
799
;********************************************************************************/
800
DMAIRQHandler:
801
        IRQ_to_SYS
802
        BL     DMA_IRQHandler
803
        SYS_to_IRQ
804
 
805
/*;*******************************************************************************
806
;* Function Name  : EXTITIRQHandler
807
;* Description    : This function used to switch to SYS mode before entering
808
;*                  the EXTIT_IRQHandler function located in 75x_it.c.
809
;*                  Then to return to IRQ mode after the
810
;*                  EXTIT_IRQHandler function termination.
811
;* Input          : none
812
;* Output         : none
813
;********************************************************************************/
814
EXTITIRQHandler:
815
        IRQ_to_SYS
816
        BL     EXTIT_IRQHandler
817
        SYS_to_IRQ
818
 
819
/*;*******************************************************************************
820
;* Function Name  : MRCCIRQHandler
821
;* Description    : This function used to switch to SYS mode before entering
822
;*                  the MRCC_IRQHandler function located in 75x_it.c.
823
;*                  Then to return to IRQ mode after the
824
;*                  MRCC_IRQHandler function termination.
825
;* Input          : none
826
;* Output         : none
827
;********************************************************************************/
828
MRCCIRQHandler:
829
        IRQ_to_SYS
830
        BL     MRCC_IRQHandler
831
        SYS_to_IRQ
832
 
833
/*;*******************************************************************************
834
;* Function Name  : FLASHSMIIRQHandler
835
;* Description    : This function used to switch to SYS mode before entering
836
;*                  the FLASHSMI_IRQHandler function located in 75x_it.c.
837
;*                  Then to return to IRQ mode after the
838
;*                  FLASHSMI_IRQHandler function termination.
839
;* Input          : none
840
;* Output         : none
841
;********************************************************************************/
842
FLASHSMIIRQHandler:
843
        IRQ_to_SYS
844
        BL     FLASHSMI_IRQHandler
845
        SYS_to_IRQ
846
 
847
/*;*******************************************************************************
848
;* Function Name  : RTCIRQHandler
849
;* Description    : This function used to switch to SYS mode before entering
850
;*                  the RTC_IRQHandler function located in 75x_it.c.
851
;*                  Then to return to IRQ mode after the
852
;*                  RTC_IRQHandler function termination.
853
;* Input          : none
854
;* Output         : none
855
;********************************************************************************/
856
RTCIRQHandler:
857
        IRQ_to_SYS
858
        BL     RTC_IRQHandler
859
        SYS_to_IRQ
860
 
861
/*;*******************************************************************************
862
;* Function Name  : TBIRQHandler
863
;* Description    : This function used to switch to SYS mode before entering
864
;*                  the TB_IRQHandler function located in 75x_it.c.
865
;*                  Then to return to IRQ mode after the
866
;*                  TB_IRQHandler function termination.
867
;* Input          : none
868
;* Output         : none
869
;********************************************************************************/
870
TBIRQHandler:
871
        IRQ_to_SYS
872
        BL     TB_IRQHandler
873
        SYS_to_IRQ
874
/*;**********************************************************************************/
875
 
876
Reset_Handler:
877
        LDR     pc, =NextInst
878
 
879
NextInst:
880
/*; Reset all Peripheral Clocks*/
881
/*; This is usefull only when using debugger to Reset\Run the application*/
882
 
883
     .if SMI_Bank0_EN
884
        LDR     r0, =0x01000000          /*; Disable peripherals clock (except GPIO)*/
885
     .else
886
        LDR     r0, =0x00000000          /*; Disable peripherals clock*/
887
     .endif
888
        LDR     r1, =MRCC_PCLKEN_Addr
889
        STR     r0, [r1]
890
 
891
     .if SMI_Bank0_EN
892
        LDR     r0, =0x1875623F          /*; Peripherals kept under reset (except GPIO)*/
893
     .else
894
        LDR     r0, =0x1975623F          /*; Peripherals kept under reset*/
895
     .endif
896
 
897
        STR     r0, [r1,#4]
898
        MOV     r0, #0
899
        NOP                              /*; Wait*/
900
        NOP
901
        NOP
902
        NOP
903
        STR     r0, [r1,#4]              /*; Disable peripherals reset*/
904
 
905
/*; Initialize stack pointer registers
906
  ; Enter each mode in turn and set up the stack pointer*/
907
 
908
 
909
 
910
        MSR     CPSR_c, #Mode_FIQ|I_Bit|F_Bit /*; No interrupts*/
911
        ldr     sp, =FIQ_Stack
912
 
913
        MSR     CPSR_c, #Mode_IRQ|I_Bit|F_Bit /*; No interrupts*/
914
        ldr     sp, =IRQ_Stack
915
 
916
        MSR     CPSR_c, #Mode_ABT|I_Bit|F_Bit /*; No interrupts*/
917
        ldr     sp, =ABT_Stack
918
 
919
        MSR     CPSR_c, #Mode_UNDEF|I_Bit|F_Bit /*; No interrupts*/
920
        ldr     sp,  =UNDEF_Stack
921
 
922
        MSR     CPSR_c, #Mode_SVC|I_Bit|F_Bit /*; No interrupts*/
923
        ldr     sp, =_estack
924
 
925
/*; ------------------------------------------------------------------------------
926
; Description  :  Enable SMI Bank0: enable GPIOs clock in MRCC_PCLKEN register, 
927
;                 enable SMI alternate function in GPIO_REMAP register and enable 
928
;                 Bank0 in SMI_CR1 register.
929
; ------------------------------------------------------------------------------*/
930
  .if SMI_Bank0_EN
931
        MOV     r0, #0x01000000
932
        LDR     r1, =MRCC_PCLKEN_Addr
933
        STR     r0, [r1]                 /*; Enable GPIOs clock*/
934
 
935
        LDR     r1, =GPIOREMAP0R_Addr
936
        MOV     r0, #SMI_EN_Mask
937
        LDR     r2, [r1]
938
        ORR     r2, r2, r0
939
        STR     r2, [r1]                 /*; Enable SMI alternate function  */
940
 
941
        LDR     r0, =0x251               /*; SMI Bank0 enabled, Prescaler = 2, Deselect Time = 5*/
942
        LDR     r1, =SMI_CR1_Addr
943
        STR     r0, [r1]                 /*; Configure CR1 register */
944
        LDR     r0, =0x00
945
        STR     r0, [r1,#4]              /*; Reset CR2 register */
946
  .endif
947
 
948
/*; ----------------------------------------------------------------------------
949
; Description  :  Remapping SRAM at address 0x00 after the application has 
950
;                 started executing. 
951
; ----------------------------------------------------------------------------*/
952
 .if  Remap_SRAM
953
        MOV     r0, #SRAM_mask
954
        LDR     r1, =CFG_GLCONF_Addr
955
        LDR     r2, [r1]                  /*; Read GLCONF Register*/
956
        BIC     r2, r2, #0x03             /*; Reset the SW_BOOT bits*/
957
        ORR     r2, r2, r0                /*; Change the SW_BOOT bits*/
958
        STR     r2, [r1]                  /*; Write GLCONF Register*/
959
  .endif
960
 
961
/*;-------------------------------------------------------------------------------
962
;Description  : Initialize the EIC as following :
963
;              - IRQ disabled
964
;              - FIQ disabled
965
;              - IVR contains the load PC opcode
966
;              - All channels are disabled
967
;              - All channels priority equal to 0
968
;              - All SIR registers contains offset to the related IRQ table entry
969
;-------------------------------------------------------------------------------*/
970
  .if EIC_INIT
971
        LDR     r3, =EIC_base_addr
972
        LDR     r4, =0x00000000
973
        STR     r4, [r3, #ICR_off_addr]   /*; Disable FIQ and IRQ*/
974
        STR     r4, [r3, #IER_off_addr]   /*; Disable all interrupts channels*/
975
 
976
        LDR     r4, =0xFFFFFFFF
977
        STR     r4, [r3, #IPR_off_addr]   /*; Clear all IRQ pending bits*/
978
 
979
        LDR     r4, =0x18
980
        STR     r4, [r3, #FIR_off_addr]   /*; Disable FIQ channels and clear FIQ pending bits*/
981
 
982
        LDR     r4, =0x00000000
983
        STR     r4, [r3, #CIPR_off_addr]  /*; Reset the current priority register*/
984
 
985
        LDR     r4, =0xE59F0000           /*; Write the LDR pc,pc,#offset..*/
986
        STR     r4, [r3, #IVR_off_addr]   /*; ..instruction code in IVR[31:16]*/
987
 
988
 
989
        LDR     r2,= 32                   /*; 32 Channel to initialize*/
990
        LDR     r0, =WAKUP_Addr           /*; Read the address of the IRQs address table*/
991
        LDR     r1, =0x00000FFF
992
        AND     r0,r0,r1
993
        LDR     r5,=SIR0_off_addr         /*; Read SIR0 address*/
994
        SUB     r4,r0,#8                  /*; subtract 8 for prefetch*/
995
        LDR     r1, =0xF7E8               /*; add the offset to the 0x00 address..*/
996
                                          /*; ..(IVR address + 7E8 = 0x00)*/
997
                                          /*; 0xF7E8 used to complete the LDR pc,offset opcode*/
998
        ADD     r1,r4,r1                  /*; compute the jump offset*/
999
EIC_INI:
1000
        MOV     r4, r1, LSL #16           /*; Left shift the result*/
1001
        STR     r4, [r3, r5]              /*; Store the result in SIRx register*/
1002
        ADD     r1, r1, #4                /*; Next IRQ address*/
1003
        ADD     r5, r5, #4                /*; Next SIR*/
1004
        SUBS    r2, r2, #1                /*; Decrement the number of SIR registers to initialize*/
1005
        BNE     EIC_INI                   /*; If more then continue*/
1006
 
1007
 .endif
1008
 
1009
 
1010
 
1011
 
1012
 
1013
  /* ;copy the initial values for .data section from FLASH to RAM */
1014
        ldr     R1, =_sidata
1015
        ldr     R2, =_sdata
1016
        ldr     R3, =_edata
1017
_reset_inidata_loop:
1018
        cmp     R2, R3
1019
        ldrlO   R0, [R1], #4
1020
        strlO   R0, [R2], #4
1021
        blO     _reset_inidata_loop
1022
 
1023
        ;/* Clear the .bss section */
1024
        mov   r0,#0                                              ;/* get a zero */
1025
        ldr   r1,=_sbss                         ;/* point to bss start */
1026
        ldr   r2,=_ebss                         ;/* point to bss end */
1027
_reset_inibss_loop:
1028
        cmp   r1,r2                                             ;/* check if some data remains to clear */
1029
        strlo r0,[r1],#4                                ;/* clear 4 bytes */
1030
        blo   _reset_inibss_loop        ;/* loop until done */
1031
 
1032
/************************************************************************************************/
1033
 
1034
/*; --- Now enter the C code */
1035
        B       main   /*; Note : use B not BL, because an application will*/
1036
                         /*; never return this way*/
1037
 
1038
 
1039
 
1040
 
1041
 
1042
 
1043
 
1044
 
1045
 
1046
 
1047
 
1048
 
1049
 
1050
 
1051
 
1052
 
1053
 
1054
 
1055
 
1056
 
1057
 
1058
 
1059
 

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