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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM7_STR75x_IAR/] [STLibrary/] [inc/] [75x_mrcc.h] - Blame information for rev 867

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1 577 jeremybenn
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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* File Name          : 75x_mrcc.h
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* Author             : MCD Application Team
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* Date First Issued  : 03/10/2006
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* Description        : This file contains all the functions prototypes for the
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*                      MRCC software library.
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********************************************************************************
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* History:
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* 07/17/2006 : V1.0
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* 03/10/2006 : V0.1
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __75x_MRCC_H
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#define __75x_MRCC_H
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/* Includes ------------------------------------------------------------------*/
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#include "75x_map.h"
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/* Exported types ------------------------------------------------------------*/
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/* MRCC Buck-up registers */
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typedef enum
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{
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  MRCC_BKP0,
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  MRCC_BKP1
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}MRCC_BKPReg;
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typedef enum
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{
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  FREEOSC,
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  OSC4MPLL,
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  OSC4M,
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  CKRTC,
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  Disabled,
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  OSC4M_Div128,
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  LPOSC,
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  OSC32K,
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  Internal,
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  External,
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  ON,
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  OFF
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}CLKSourceTypeDef;
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typedef struct
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{
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  CLKSourceTypeDef CKSYS_Source;  /* FREEOSC, OSC4MPLL, OSC4M, CKRTC */
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  CLKSourceTypeDef CKRTC_Source;  /* Disabled, OSC4M_Div128, OSC32K, LPOSC */
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  CLKSourceTypeDef CKUSB_Source;  /* Disabled, Internal, External */
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  CLKSourceTypeDef PLL_Status;    /* ON, OFF */
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  CLKSourceTypeDef OSC4M_Status;  /* ON, OFF */
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  CLKSourceTypeDef LPOSC_Status;  /* ON, OFF */
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  CLKSourceTypeDef OSC32K_Status; /* ON, OFF */
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  u32 CKSYS_Frequency;
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  u32 HCLK_Frequency;
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  u32 CKTIM_Frequency;
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  u32 PCLK_Frequency;
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}MRCC_ClocksTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/* Oscillator divider by 2 */
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#define MRCC_XTDIV2_Disable    0xFFFF7FFF
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#define MRCC_XTDIV2_Enable     0x00008000
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/* System clock source */
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#define MRCC_CKSYS_FREEOSC     0x01
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#define MRCC_CKSYS_OSC4M       0x02
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#define MRCC_CKSYS_OSC4MPLL    0x03
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#define MRCC_CKSYS_RTC         0x04
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/* PLL multiplication factors */
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#define MRCC_PLL_Disabled    0xFEFFFFFF
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#define MRCC_PLL_NoChange    0x00000001
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#define MRCC_PLL_Mul_12      0x18000000
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#define MRCC_PLL_Mul_14      0x10000000
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#define MRCC_PLL_Mul_15      0x08000000
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#define MRCC_PLL_Mul_16      0x00000000
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/* AHB clock source */
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#define MRCC_CKSYS_Div1    0x00000000
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#define MRCC_CKSYS_Div2    0x00000008
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#define MRCC_CKSYS_Div4    0x00000010
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#define MRCC_CKSYS_Div8    0x00000018
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/* TIM clock source */
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#define MRCC_HCLK_Div1    0x00000000
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#define MRCC_HCLK_Div2    0x00000001
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#define MRCC_HCLK_Div4    0x00000002
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#define MRCC_HCLK_Div8    0x00000003
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/* APB clock source */
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#define MRCC_CKTIM_Div1    0xFFFFFFFB
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#define MRCC_CKTIM_Div2    0x00000004
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/* RTC clock sources */
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#define MRCC_CKRTC_OSC4M_Div128    0x01000000
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#define MRCC_CKRTC_OSC32K          0x02000000
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#define MRCC_CKRTC_LPOSC           0x03000000
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/* USB clock sources */
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#define MRCC_CKUSB_Internal    0xFFBFFFFF
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#define MRCC_CKUSB_External    0x00400000
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/* MRCC Interrupts */
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#define MRCC_IT_LOCK    0x40000000
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#define MRCC_IT_NCKD    0x00080000
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/* Peripheral Clock */
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#define MRCC_Peripheral_ALL      0x1975623F
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#define MRCC_Peripheral_EXTIT    0x10000000
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#define MRCC_Peripheral_RTC      0x08000000
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#define MRCC_Peripheral_GPIO     0x01000000
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#define MRCC_Peripheral_UART2    0x00400000
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#define MRCC_Peripheral_UART1    0x00200000
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#define MRCC_Peripheral_UART0    0x00100000
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#define MRCC_Peripheral_I2C      0x00040000
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#define MRCC_Peripheral_CAN      0x00010000
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#define MRCC_Peripheral_SSP1     0x00004000
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#define MRCC_Peripheral_SSP0     0x00002000
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#define MRCC_Peripheral_USB      0x00000200
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#define MRCC_Peripheral_PWM      0x00000020
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#define MRCC_Peripheral_TIM2     0x00000010
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#define MRCC_Peripheral_TIM1     0x00000008
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#define MRCC_Peripheral_TIM0     0x00000004
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#define MRCC_Peripheral_TB       0x00000002
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#define MRCC_Peripheral_ADC      0x00000001
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/* Clock sources to measure theire frequency */
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#define MRCC_ClockSource_CKSYS    0x01
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#define MRCC_ClockSource_HCLK     0x02
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#define MRCC_ClockSource_PCLK     0x03
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#define MRCC_ClockSource_CKTIM    0x04
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/* Low Power Debug Mode */
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#define MRCC_LPDM_Disable    0xFFFFFFF7
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#define MRCC_LPDM_Enable     0x00000008
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/* WFI Mode parameters */
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#define MRCC_WFIParam_FLASHPowerDown    0x00000000
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#define MRCC_WFIParam_FLASHOn           0x00000010
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#define MRCC_WFIParam_FLASHOff          0x00004000
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/* STOP Mode parameters */
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#define MRCC_STOPParam_Default     0x00000000
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#define MRCC_STOPParam_OSC4MOff    0x00008000
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#define MRCC_STOPParam_FLASHOff    0x00004000
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#define MRCC_STOPParam_MVREGOff    0x00002000
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/* I/O Pins voltage range */
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#define MRCC_IOVoltageRange_5V     0xFFFEFFFF
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#define MRCC_IOVoltageRange_3V3    0x00010000
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/* Clock sources to output on MCO pin */
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#define MRCC_MCO_HCLK          0x00000000
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#define MRCC_MCO_PCLK          0x00000040
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#define MRCC_MCO_OSC4M         0x00000080
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#define MRCC_MCO_CKPLL2        0x000000C0
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#define MRCC_MCOPrescaler_1    0xFFFFFFDF
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#define MRCC_MCOPrescaler_2    0x00000020
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/* 4MHz main oscillator configuration */
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#define MRCC_OSC4M_Default    0xFFFCFFFF
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#define MRCC_OSC4M_Disable    0x00020000
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#define MRCC_OSC4M_Bypass     0x00010000
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/* OSC32K oscillator configuration */
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#define MRCC_OSC32K_Disable          0xDFFFFFFF
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#define MRCC_OSC32K_Enable           0x20000000
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#define MRCC_OSC32KBypass_Disable    0xBFFFFFFF
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#define MRCC_OSC32KBypass_Enable     0x40000000
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/* LPOSC oscillator configuration */
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#define MRCC_LPOSC_Disable    0xEFFFFFFF
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#define MRCC_LPOSC_Enable     0x10000000
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/* RTC measurement configuration */
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#define MRCC_RTCM_Disable    0xFBFFFFFF
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#define MRCC_RTCM_Enable     0x04000000
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/* MRCC Flags */
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#define MRCC_FLAG_LOCK         0x3F
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#define MRCC_FLAG_LOCKIF       0x3D
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#define MRCC_FLAG_CKSEL        0x37
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#define MRCC_FLAG_CKOSCSEL     0x35
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#define MRCC_FLAG_NCKD         0x32
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#define MRCC_FLAG_SWR          0x5D
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#define MRCC_FLAG_WDGR         0x5C
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#define MRCC_FLAG_EXTR         0x5B
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#define MRCC_FLAG_WKP          0x5A
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#define MRCC_FLAG_STDB         0x59
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#define MRCC_FLAG_BCOUNT       0x58
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#define MRCC_FLAG_OSC32KRDY    0x7F
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#define MRCC_FLAG_CKRTCOK      0x7B
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#define MRCC_FLAG_LPDONE       0x67
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#define MRCC_FLAG_LP           0x60
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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void MRCC_DeInit(void);
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void MRCC_XTDIV2Config(u32 MRCC_XTDIV2);
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ErrorStatus MRCC_CKSYSConfig(u32 MRCC_CKSYS, u32 MRCC_PLL);
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void MRCC_HCLKConfig(u32 MRCC_HCLK);
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void MRCC_CKTIMConfig(u32 MRCC_CKTIM);
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void MRCC_PCLKConfig(u32 MRCC_PCLK);
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ErrorStatus MRCC_CKRTCConfig(u32 MRCC_CKRTC);
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ErrorStatus MRCC_CKUSBConfig(u32 MRCC_CKUSB);
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void MRCC_ITConfig(u32 MRCC_IT, FunctionalState NewState);
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void MRCC_PeripheralClockConfig(u32 MRCC_Peripheral, FunctionalState NewState);
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void MRCC_PeripheralSWResetConfig(u32 MRCC_Peripheral, FunctionalState NewState);
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void MRCC_GetClocksStatus(MRCC_ClocksTypeDef*  MRCC_ClocksStatus);
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void MRCC_LPMC_DBGConfig(u32 MRCC_LPDM);
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void MRCC_EnterWFIMode(u32 MRCC_WFIParam);
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void MRCC_EnterSTOPMode(u32 MRCC_STOPParam);
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void MRCC_EnterSTANDBYMode(void);
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void MRCC_GenerateSWReset(void);
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void MRCC_WriteBackupRegister(MRCC_BKPReg MRCC_BKP, u32 Data);
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u32 MRCC_ReadBackupRegister(MRCC_BKPReg MRCC_BKP);
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void MRCC_IOVoltageRangeConfig(u32 MRCC_IOVoltageRange);
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void MRCC_MCOConfig(u32 MRCC_MCO, u32 MCO_MCOPrescaler);
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ErrorStatus MRCC_OSC4MConfig(u32 MRCC_OSC4M);
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ErrorStatus MRCC_OSC32KConfig(u32 MRCC_OSC32K, u32 MRCC_OSC32KBypass);
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ErrorStatus MRCC_LPOSCConfig(u32 MRCC_LPOSC);
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void MRCC_RTCMConfig(u32 MRCC_RTCM);
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void MRCC_SetBuilderCounter(u8 BuilderCounter);
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u16 MRCC_GetCKSYSCounter(void);
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FlagStatus MRCC_GetFlagStatus(u8 MRCC_FLAG);
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void MRCC_ClearFlag(u8 MRCC_FLAG);
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ITStatus MRCC_GetITStatus(u32 MRCC_IT);
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void MRCC_ClearITPendingBit(u32 MRCC_IT);
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ErrorStatus MRCC_WaitForOSC4MStartUp(void);
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#endif /* __75x_MRCC_H */
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/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

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