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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM9_STR91X_IAR/] [91x_vect_IAR.s] - Blame information for rev 613

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1 577 jeremybenn
;******************** (C) COPYRIGHT 2005 STMicroelectronics ********************
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;* File Name          : 91x_vect.s
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;* Author             : MCD Application Team
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;* Date First Issued  : 10/25/2005 :  Beta Version V0.1
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;* Description        : This File used to initialize the exception and IRQ
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;*                      vectors, and to enter/return to/from exceptions
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;*                      handlers.
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;*******************************************************************************
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; History:
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; 10/25/2005 :  Beta Version V0.1
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;*******************************************************************************
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; THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
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; CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
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; A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
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; OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
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; OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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; CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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;******************************************************************************/
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#include "FreeRTOSConfig.h"
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#include "ISR_Support.h"
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    MODULE      ?RESET
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        COMMON  INTVEC:CODE(2)
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        CODE32
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    EXPORT LINK
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VectorAddress                   EQU    0xFFFFF030  ; VIC Vector address register address.
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VectorAddressDaisy              EQU    0xFC000030  ; Daisy VIC Vector address register
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                                          ; address.
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LINK                                    EQU    0x0
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I_Bit                                   EQU    0x80 ; when I bit is set, IRQ is disabled
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F_Bit                                   EQU    0x40 ; when F bit is set, FIQ is disabled
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;*******************************************************************************
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;                                  MACRO
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;*******************************************************************************
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;*******************************************************************************
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;            Import  the __program_start address from 91x_init.s
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;*******************************************************************************
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        IMPORT  __program_start
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;*******************************************************************************
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;                      Import exception handlers
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;*******************************************************************************
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                IMPORT  vPortYieldProcessor             ; FreeRTOS SWI handler
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;*******************************************************************************
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;            Export Peripherals IRQ handlers table address
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;*******************************************************************************
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;*******************************************************************************
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;                        Exception vectors
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;*******************************************************************************
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        LDR     PC, Reset_Addr
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        LDR     PC, Undefined_Addr
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        LDR     PC, SWI_Addr
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        LDR     PC, Prefetch_Addr
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        LDR     PC, Abort_Addr
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        NOP                             ; Reserved vector
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        LDR     PC, IRQ_Addr
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        LDR     PC, FIQ_Addr
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;*******************************************************************************
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;               Exception handlers address table
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;*******************************************************************************
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Reset_Addr      DCD     __program_start
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Undefined_Addr  DCD     UndefinedHandler
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SWI_Addr        DCD     vPortYieldProcessor
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Prefetch_Addr   DCD     PrefetchAbortHandler
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Abort_Addr      DCD     DataAbortHandler
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                DCD     0               ; Reserved vector
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IRQ_Addr        DCD     IRQHandler
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FIQ_Addr        DCD     FIQHandler
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;*******************************************************************************
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;                         Exception Handlers
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;*******************************************************************************
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; - NOTE -
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; The IRQ and SWI handlers are the only managed exception.
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UndefinedHandler
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                b       UndefinedHandler
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PrefetchAbortHandler
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                b       PrefetchAbortHandler
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DataAbortHandler
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                b       DataAbortHandler
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FIQHandler
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                b       FIQHandler
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DefaultISR
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                b       DefaultISR
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;*******************************************************************************
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;* Function Name  : IRQHandler
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;* Description    : This function called when IRQ exception is entered.
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;* Input          : none
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;* Output         : none
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;*******************************************************************************
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IRQHandler
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        portSAVE_CONTEXT                                        ; Save the context of the current task.
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        LDR    r0, = VectorAddress
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        LDR    r0, [r0]                                         ; Read the routine address
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        LDR    r1, = VectorAddressDaisy
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        LDR    r1, [r1]
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        MOV        lr, pc
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        bx         r0
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        LDR    r0, = VectorAddress                      ; Write to the VectorAddress to clear the
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        STR    r0, [r0]                                         ; respective interrupt in the internal interrupt
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        LDR    r1, = VectorAddressDaisy         ; Write to the VectorAddressDaisy to clear the
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        STR    r1,[r1]                                          ; respective interrupt in the internal interrupt
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        portRESTORE_CONTEXT                                     ; Restore the context of the selected task.
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        LTORG
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        END
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;******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****

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