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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ARM9_STR91X_IAR/] [Library/] [include/] [91x_uart.h] - Blame information for rev 583

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1 577 jeremybenn
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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* File Name          : 91x_uart.h
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* Author             : MCD Application Team
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* Date First Issued  : 05/18/2006 : Version 1.0
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* Description        : This file contains all the functions prototypes for the
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*                      UART software library.
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********************************************************************************
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* History:
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* 05/24/2006 : Version 1.1
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* 05/18/2006 : Version 1.0
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __91x_UART_H
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#define __91x_UART_H
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/* Includes ------------------------------------------------------------------*/
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#include <91x_map.h>
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/* Exported types ------------------------------------------------------------*/
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/* UART FIFO Level enumeration */
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typedef enum
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{
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  UART_FIFOLevel_1_8 = 0x0000,  /* FIFO size 16 bytes, FIFO level 2 bytes */
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  UART_FIFOLevel_1_4 = 0x0001,  /* FIFO size 16 bytes, FIFO level 4 bytes */
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  UART_FIFOLevel_1_2 = 0x0002,  /* FIFO size 16 bytes, FIFO level 8 bytes */
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  UART_FIFOLevel_3_4 = 0x0003,  /* FIFO size 16 bytes, FIFO level 12 bytes */
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  UART_FIFOLevel_7_8 = 0x0004   /* FIFO size 16 bytes, FIFO level 14 bytes */
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}UART_FIFOLevel;
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/* UART Init Structure definition */
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typedef struct
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{
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  u16 UART_WordLength;
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  u16 UART_StopBits;
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  u16 UART_Parity;
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  u32 UART_BaudRate;
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  u16 UART_HardwareFlowControl;
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  u16 UART_Mode;
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  u16 UART_FIFO;
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  UART_FIFOLevel UART_TxFIFOLevel;
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  UART_FIFOLevel UART_RxFIFOLevel;
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}UART_InitTypeDef;
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/* UART RTS enumeration */
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typedef enum
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{
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  LowLevel = 0,
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  HighLevel
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}UART_LevelTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/* UART Data Length */
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#define UART_WordLength_5D            0x0000  /* 5 bits Data */
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#define UART_WordLength_6D            0x0020  /* 6 bits Data */
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#define UART_WordLength_7D            0x0040  /* 7 bits Data */
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#define UART_WordLength_8D            0x0060  /* 8 bits Data */
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/* UART Stop Bits */
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#define UART_StopBits_1         0xFFF7  /* Disable two stop bit is transmitted
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                                                 at the end of frame */
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#define UART_StopBits_2         0x0008  /* Enable Two stop bits are transmitted
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                                                 at the end of frame */
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/* UART Parity */
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#define UART_Parity_No                0x0000  /* Parity Disable */
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#define UART_Parity_Even              0x0006  /* Even Parity */
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#define UART_Parity_Odd               0x0002  /* Odd Parity */
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#define UART_Parity_OddStick          0x0082  /* 1 is transmitted as bit parity */
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#define UART_Parity_EvenStick         0x0086  /* 0 is transmitted as bit parity */
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/* UART Hardware Flow Control */
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#define UART_HardwareFlowControl_None      0x0000  /* HFC Disable */
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#define UART_HardwareFlowControl_RTS       0x4000  /* RTS Enable */
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#define UART_HardwareFlowControl_CTS       0x8000  /* CTS Enable */
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#define UART_HardwareFlowControl_RTS_CTS   0xC000  /* CTS and RTS Enable */
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/* UART Mode */
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#define UART_Mode_Rx                  0x0200  /* UART Rx Enabled */
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#define UART_Mode_Tx                  0x0100  /* UART Tx Enbled */
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#define UART_Mode_Tx_Rx               0x0300  /* UART Tx and Rx Enabled */
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/* UART FIFO */
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#define UART_FIFO_Disable           0xFFEF  /* FIFOs Disable */
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#define UART_FIFO_Enable            0x0010  /* FIFOs Enable */
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/* UART Interrupt definition */
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#define UART_IT_OverrunError          0x0400  /* Overrun Error interrupt mask */
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#define UART_IT_BreakError            0x0200  /* Break Error interrupt mask */
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#define UART_IT_ParityError           0x0100  /* Parity Error interrupt mask */
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#define UART_IT_FrameError            0x0080  /* Frame Error interrupt mask */
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#define UART_IT_ReceiveTimeOut        0x0040  /* Receive Time Out interrupt mask */
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#define UART_IT_Transmit              0x0020  /* Transmit interrupt mask */
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#define UART_IT_Receive               0x0010  /* Receive interrupt mask */
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#define UART_IT_DSR                   0x0008  /* DSR interrupt mask */
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#define UART_IT_DCD                   0x0004  /* DCD interrupt mask */
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#define UART_IT_CTS                   0x0002  /* CTS interrupt mask */
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#define UART_IT_RI                    0x0001  /* RI interrupt mask */
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/* UART DMA On Error */
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#define UART_DMAOnError_Enable        0xFFFB  /* DMA receive request enabled
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                                                 when the UART error interrupt
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                                                 is asserted. */
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#define UART_DMAOnError_Disable       0x0004  /* DMA receive request disabled
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                                                 when the UART error interrupt
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                                                 is asserted. */
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/* UART DMA Request */
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#define UART_DMAReq_Tx                0x02      /* Transmit DMA Enable */
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#define UART_DMAReq_Rx                0x01      /* Receive DMA Enable */
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/* UART FLAG */
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#define UART_FLAG_OverrunError        0x23    /* Overrun error flag */
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#define UART_FLAG_Break               0x22    /* break error flag */
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#define UART_FLAG_ParityError         0x21    /* parity error flag */
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#define UART_FLAG_FrameError          0x20    /* frame error flag */
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#define UART_FLAG_RI                  0x48    /* RI flag */
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#define UART_FLAG_TxFIFOEmpty         0x47    /* Transmit FIFO Empty flag */
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#define UART_FLAG_RxFIFOFull          0x46    /* Receive FIFO Full flag */
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#define UART_FLAG_TxFIFOFull          0x45    /* Transmit FIFO Full flag */
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#define UART_FLAG_RxFIFOEmpty         0x44    /* Receive FIFO Empty flag */
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#define UART_FLAG_Busy                0x43    /* UART Busy flag */
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#define UART_FLAG_DCD                 0x42    /* DCD flag */
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#define UART_FLAG_DSR                 0x41    /* DSR flag */
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#define UART_FLAG_CTS                 0x40    /* CTS flag */
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#define UART_RawIT_OverrunError       0x6A    /* Overrun Error Raw IT flag */
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#define UART_RawIT_BreakError         0x69    /* Break Error Raw IT flag */
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#define UART_RawIT_ParityError        0x68    /* Parity Error Raw IT flag */
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#define UART_RawIT_FrameError         0x67    /* Frame Error Raw IT flag */
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#define UART_RawIT_ReceiveTimeOut     0x66    /* ReceiveTimeOut Raw IT flag */
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#define UART_RawIT_Transmit           0x65    /* Transmit Raw IT flag */
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#define UART_RawIT_Receive            0x64    /* Receive Raw IT flag */
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#define UART_RawIT_DSR                0x63    /* DSR Raw IT flag */
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#define UART_RawIT_DCD                0x62    /* DCD Raw IT flag */
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#define UART_RawIT_CTS                0x61    /* CTS Raw IT flag */
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#define UART_RawIT_RI                 0x60    /* RI Raw IT flag */
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/*IrDAx select*/
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#define IrDA0 0x01                             /*IrDA0 select*/
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#define IrDA1 0x02                             /*IrDA0 select*/
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#define IrDA2 0x03                             /*IrDA0 select*/
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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void UART_DeInit(UART_TypeDef* UARTx);
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void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct);
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void UART_StructInit(UART_InitTypeDef* UART_InitStruct);
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void UART_Cmd(UART_TypeDef* UARTx, FunctionalState NewState);
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void UART_ITConfig(UART_TypeDef* UARTx, u16 UART_IT, FunctionalState NewState);
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void UART_DMAConfig(UART_TypeDef* UARTx, u16 UART_DMAOnError);
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void UART_DMACmd(UART_TypeDef* UARTx, u8 UART_DMAReq, FunctionalState NewState);
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void UART_LoopBackConfig(UART_TypeDef* UARTx, FunctionalState NewState);
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FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, u16 UART_FLAG);
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void UART_ClearFlag(UART_TypeDef* UARTx);
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void UART_ClearITPendingBit(UART_TypeDef* UARTx, u16 UART_IT);
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void UART_IrDALowPowerConfig(u8 IrDAx, FunctionalState NewState);
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void UART_IrDACmd(u8 IrDAx, FunctionalState NewState);
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void UART_IrDASetCounter(u8 IrDAx, u32 IrDA_Counter);
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void UART_SendData(UART_TypeDef* UARTx, u8 Data);
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u8 UART_ReceiveData(UART_TypeDef* UARTx);
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void UART_SendBreak(UART_TypeDef* UARTx);
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void UART_DTRConfig(UART_LevelTypeDef LevelState);
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void UART_RTSConfig(UART_LevelTypeDef LevelState);
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ITStatus UART_GetITStatus(UART_TypeDef* UARTx, u16 UART_IT);
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#endif /* __91x_UART_H */
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/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

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