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jeremybenn |
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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* File Name : 91x_scu.c
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* Author : MCD Application Team
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* Date First Issued : 05/18/2006 : Version 1.0
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* Description : This file provides the SCU library software functions
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********************************************************************************
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* History:
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* 05/24/2006 : Version 1.1
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* 05/18/2006 : Version 1.0
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
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* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
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* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
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* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
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* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "91x_scu.h"
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/* Include of other module interface headers ---------------------------------*/
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/* Local includes ------------------------------------------------------------*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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#define SCU_PLLEN 0x80000
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Interface functions -------------------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/*******************************************************************************
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* Function Name : SCU_MCLKSourceConfig
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* Description : Configures the MCLK source clock
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* Input : MCLK_Source = SCU_MCLK_OSC, SCU_MCLK_PLL or SCU_MCLK_RTC
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* Output : None
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* Return : ErrorStatus: SUCCESS or ERROR
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* Note : this function returns ERROR if trying to select the PLL as
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* clock source while the PLL is disabled or not locked.
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*******************************************************************************/
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ErrorStatus SCU_MCLKSourceConfig(u32 MCLK_Source)
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{
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u32 CLKCNTR_Value;
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CLKCNTR_Value = SCU->CLKCNTR; /*get CLKCNTR register value*/
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CLKCNTR_Value &=~0x3; /*clear field MCLKSEL*/
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if (MCLK_Source == SCU_MCLK_PLL) /*PLL selected as clock source*/
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{
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/*check if PLL enabled & locked*/
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if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK)))
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return ERROR;
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}
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else CLKCNTR_Value |=MCLK_Source; /*OSC or RTC selected as clock source*/
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SCU->CLKCNTR = CLKCNTR_Value; /*Update CLKCNTR register value*/
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return SUCCESS;
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}
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/*******************************************************************************
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* Function Name : SCU_PLLFactorsConfig
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* Description : Sets the PLL factors
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* Input : PLLN, PLLM and PLLP
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* Output : None
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* Return : ErrorStatus: ERROR or SUCCESS
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* Notes : -The PLL factors must respect the PLL specification requirements
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* -The function returns ERROR if trying to change PLL
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* factors while PLL is selected as Main Clock source (MCLK)
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* -This function disables the PLL, to enable the PLL use
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* function" SCU_PLLCmd(ENABLE)" after setting the PLL factors
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******************************************************************************/
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ErrorStatus SCU_PLLFactorsConfig(u8 PLLN, u8 PLLM, u8 PLLP)
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{
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if (SCU_PLLCmd(DISABLE)==SUCCESS) /*Disable PLL*/
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{
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SCU->PLLCONF =0; /*clear PLLCONF register*/
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SCU->PLLCONF |=(PLLN<<8); /*update PLLN field*/
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SCU->PLLCONF |=PLLM; /*update PLLM field*/
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SCU->PLLCONF |=PLLP<<16; /*update PLLP field*/
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return SUCCESS;
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}
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return ERROR;
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}
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/*******************************************************************************
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* Function Name : SCU_PLLCmd
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* Description : Enable or Disable the PLL
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* Input : NewState = ENABLE or DISABLE
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* Output : None
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* Return : ErrorStatus: SUCCESS or ERROR
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* Note : -The function returns ERROR if:
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* *trying to disable the PLL while it is selected as the MCLK
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* *trying to enable the PLL while it is already enabled and
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* locked
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*******************************************************************************/
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ErrorStatus SCU_PLLCmd(FunctionalState NewState)
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{
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vu32 i;
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if (NewState==ENABLE)
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{
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if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK)))
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{
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SCU->SYSSTATUS|=SCU_FLAG_LOCK; /*clear LOCK bit*/
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SCU->PLLCONF |=SCU_PLLEN; /*PLL Enable*/
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while(!SCU->SYSSTATUS&SCU_FLAG_LOCK); /*Wait PLL to lock*/
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return SUCCESS;
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}
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else return ERROR;
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}
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else /*NewState = DISABLE*/
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{
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if(SCU->CLKCNTR&0x3) /*check if PLL not sys CLK*/
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{
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for(i=10;i>0;i--); /*delay before PLL disabling*/
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SCU->PLLCONF &=~SCU_PLLEN; /*PLL Disable*/
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return SUCCESS;
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}
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else return ERROR;
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}
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}
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/*******************************************************************************
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* Function Name : SCU_RCLKDivisorConfig
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* Description : Sets the RCLK divisor value
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* Input : RCLK_Divisor
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_RCLKDivisorConfig(u32 RCLK_Divisor)
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{
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SCU->CLKCNTR &=SCU_RCLK_Div1; /*clear RCLKDIV[2:0] field*/
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if (RCLK_Divisor!=SCU_RCLK_Div1)
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SCU->CLKCNTR |= RCLK_Divisor; /*update field with RCLK divisor*/
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}
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/*******************************************************************************
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* Function Name : SCU_HCLKDivisorConfig
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* Description : Sets the HCLK divisor value
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* Input : HCLK_Divisor
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_HCLKDivisorConfig(u32 HCLK_Divisor)
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{
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SCU->CLKCNTR &=SCU_HCLK_Div1; /*clear AHBDIV[1:0] field*/
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if (HCLK_Divisor!=SCU_HCLK_Div1)
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SCU->CLKCNTR |= HCLK_Divisor; /*update field with HCLK divisor*/
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}
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/*******************************************************************************
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* Function Name : SCU_PCLKDivisorConfig
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* Description : Sets the PCLK divisor value
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* Input : PCLK_Divisor
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_PCLKDivisorConfig(u32 PCLK_Divisor)
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{
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SCU->CLKCNTR &=SCU_PCLK_Div1; /*clear APBDIV[1:0] field*/
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if (PCLK_Divisor!=SCU_PCLK_Div1)
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SCU->CLKCNTR |= PCLK_Divisor; /*update field with PCLK Divisor*/
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}
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/*******************************************************************************
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* Function Name : SCU_APBPeriphClockConfig
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* Description : Enable the clock for an APB peripheral
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* Input : -APBPerip : APB peripherals(__RTC, __ADC ,...)
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* -NewState : ENABLE or DISABLE
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_APBPeriphClockConfig(u32 APBPeriph, FunctionalState NewState)
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{
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if (NewState==ENABLE) /*Enable clock for APB peripheral*/
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SCU->PCGR1 |=APBPeriph;
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else
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SCU->PCGR1 &=~APBPeriph; /*Disable clock for APB peripheral*/
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}
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/*******************************************************************************
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* Function Name : SCU_AHBPeriphClockConfig
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* Description : Enable the clock for an AHB peripheral
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* Input : -AHBPerip: AHB peripherals(__USB, __DMA,...)
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* -NewState : ENABLE or DISABLE
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_AHBPeriphClockConfig(u32 AHBPeriph, FunctionalState NewState)
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{
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if (NewState==ENABLE) /*Enable clock for AHB peripheral*/
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SCU->PCGRO |=AHBPeriph;
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else
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SCU->PCGRO &=~AHBPeriph; /*Disable clock for AHB peripheral*/
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}
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/*******************************************************************************
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* Function Name : SCU_APBPeriphReset
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* Description : Assert or deassert Reset on APB peripheral
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* Input : -APBPeriph: APB peripherals(__RTC, __ADC,...)
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-NewState : ENABLE or DISABLE
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_APBPeriphReset(u32 APBPeriph, FunctionalState NewState)
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{
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if (NewState==DISABLE) /*APB peripheral not held in Reset*/
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SCU->PRR1 |=APBPeriph;
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else
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SCU->PRR1 &=~APBPeriph; /*APB peripheral held in Reset*/
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}
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/*******************************************************************************
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* Function Name : SCU_AHBPeriphReset
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* Description : Assert or deassert Reset on AHB peripheral
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* Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
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-NewState : ENABLE or DISABLE
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_AHBPeriphReset(u32 AHBPeriph, FunctionalState NewState)
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{
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if (NewState==DISABLE)
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SCU->PRR0 |=AHBPeriph; /*AHB peripheral not held in Reset*/
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else
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SCU->PRR0 &=~AHBPeriph; /*AHB peripheral held in Reset*/
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}
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/*******************************************************************************
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* Function Name : SCU_APBPeriphIdleConfig
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* Description : Enable or Disable Periph Clock during Idle mode
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* Input : -APBPeriph: APB peripherals(__RTC, __ADC,...)
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-NewState : ENABLE or DISABLE
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_APBPeriphIdleConfig(u32 APBPeriph, FunctionalState NewState)
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{
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if (NewState==ENABLE)
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SCU->MGR1 |=APBPeriph; /*APB peripheral clock enabled during Idle mode*/
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else
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SCU->MGR1 &=~APBPeriph; /*APB peripheral clock disabled during Idle mode*/
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}
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/*******************************************************************************
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* Function Name : SCU_AHBPeriphIdleConfig
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* Description : Enable or Disable Periph Clock during Idle mode
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* Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
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-NewState : ENABLE or DISABLE
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_AHBPeriphIdleConfig(u32 AHBPeriph, FunctionalState NewState)
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{
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if (NewState==ENABLE)
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SCU->MGR0 |=AHBPeriph; /*AHB peripheral clock enabled during Idle mode*/
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else
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SCU->MGR0 &=~AHBPeriph; /*AHB peripheral clock disabled during Idle mode*/
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}
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/*******************************************************************************
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* Function Name : SCU_APBPeriphDebugConfig
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* Description : Enable or Disable Periph Clock during ARM debug state
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* Input : -APBPeriph: APB peripherals(__RTC, __ADC,...)
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-NewState : ENABLE or DISABLE
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_APBPeriphDebugConfig(u32 APBPeriph, FunctionalState NewState)
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{
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if (NewState==ENABLE)
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SCU->PECGR1 |=APBPeriph; /*APB peripheral clock enabled during ARM debug state*/
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else
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SCU->PECGR1 &=~APBPeriph; /*APB peripheral clock disabled during ARM debug state*/
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}
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/*******************************************************************************
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* Function Name : SCU_AHBPeriphDebugConfig
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* Description : Enable or Disable Periph Clock during ARM debug state
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* Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
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-NewState : ENABLE or DISABLE
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_AHBPeriphDebugConfig(u32 AHBPeriph, FunctionalState NewState)
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{
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if (NewState==ENABLE)
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SCU->PECGR0 |=AHBPeriph; /*AHB peripheral clock enabled during ARM debug state*/
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else
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SCU->PECGR0 &=~AHBPeriph; /*AHB peripheral clock disabled during ARM debug state*/
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}
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/*******************************************************************************
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* Function Name : SCU_BRCLKDivisorConfig
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* Description : Sets the BRCLK divisor value
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* Input : BRCLK_Divisor
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_BRCLKDivisorConfig(u32 BRCLK_Divisor)
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{
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SCU->CLKCNTR &=SCU_BRCLK_Div1; /*Clear BRSEL bit*/
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if (BRCLK_Divisor!=SCU_BRCLK_Div1)
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SCU->CLKCNTR |= SCU_BRCLK_Div2; /*set bit BRSEL*/
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}
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/*******************************************************************************
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* Function Name : SCU_TIMCLKSourceConfig
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* Description : Sets the TIMx clock source
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* Input : - TIMx : SCU_TIM01 or SCU_TIM23
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* - TIMCLK_Source = SCU_TIMCLK_EXT or SCU_TIMCLK_INT
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* Output : None
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* Return : None
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*******************************************************************************/
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void SCU_TIMCLKSourceConfig(u8 TIMx, u32 TIMCLK_Source)
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| 313 |
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{
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| 314 |
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if (TIMx== SCU_TIM01) /*TIM01 clock source configuration*/
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{
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SCU->CLKCNTR &=0xFFFFDFFF;
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if (TIMCLK_Source == SCU_TIMCLK_EXT)
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SCU->CLKCNTR |=0x2000;
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}
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else
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{
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SCU->CLKCNTR &=0xFFFFBFFF; /*TIM23 clock source configuration*/
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if (TIMCLK_Source == SCU_TIMCLK_EXT)
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SCU->CLKCNTR |=0x4000;
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}
|
| 326 |
|
|
}
|
| 327 |
|
|
|
| 328 |
|
|
/*******************************************************************************
|
| 329 |
|
|
* Function Name : SCU_TIMPresConfig
|
| 330 |
|
|
* Description : Sets the TIMx Prescaler Value
|
| 331 |
|
|
* Input : - TIMx : SCU_TIM01 or SCU_TIM23
|
| 332 |
|
|
* - Prescaler (16 bit value)
|
| 333 |
|
|
* Output : None
|
| 334 |
|
|
* Return : None
|
| 335 |
|
|
*******************************************************************************/
|
| 336 |
|
|
void SCU_TIMPresConfig(u8 TIMx, u16 Prescaler)
|
| 337 |
|
|
{
|
| 338 |
|
|
if (TIMx==SCU_TIM01) /*TIM01 Prescaler configuration*/
|
| 339 |
|
|
SCU->SCR1 = Prescaler&0xFFFF;
|
| 340 |
|
|
else
|
| 341 |
|
|
SCU->SCR2 = Prescaler&0xFFFF; /*TIM23 Prescaler configuration*/
|
| 342 |
|
|
}
|
| 343 |
|
|
|
| 344 |
|
|
/*******************************************************************************
|
| 345 |
|
|
* Function Name : SCU_USBCLKConfig
|
| 346 |
|
|
* Description : Configures the clock source for the 48MHz USBCLK
|
| 347 |
|
|
* Input : USBCLK_Source: SCU_USBCLK_MCLK,SCU_USBCLK_MCLK2 or SCU_USBCLK_EXT
|
| 348 |
|
|
* Output : None
|
| 349 |
|
|
* Return : None
|
| 350 |
|
|
*******************************************************************************/
|
| 351 |
|
|
void SCU_USBCLKConfig(u32 USBCLK_Source)
|
| 352 |
|
|
{
|
| 353 |
|
|
SCU->CLKCNTR &=SCU_USBCLK_MCLK; /*clear USBSEL[1:0] field*/
|
| 354 |
|
|
if (USBCLK_Source!=SCU_USBCLK_MCLK)
|
| 355 |
|
|
SCU->CLKCNTR |= USBCLK_Source; /*update field with USBCLK_Source*/
|
| 356 |
|
|
}
|
| 357 |
|
|
|
| 358 |
|
|
/*******************************************************************************
|
| 359 |
|
|
* Function Name : SCU_PHYCLKConfig
|
| 360 |
|
|
* Description : Enable or Disable PHY clock output
|
| 361 |
|
|
* Input : NewState : ENABLE or DISABLE
|
| 362 |
|
|
* Output : None
|
| 363 |
|
|
* Return : None
|
| 364 |
|
|
*******************************************************************************/
|
| 365 |
|
|
void SCU_PHYCLKConfig(FunctionalState NewState)
|
| 366 |
|
|
{
|
| 367 |
|
|
if (NewState==ENABLE)
|
| 368 |
|
|
SCU->CLKCNTR |= 0x1000; /*enable MIIPHY clock*/
|
| 369 |
|
|
else
|
| 370 |
|
|
SCU->CLKCNTR &=~0x1000; /*disable MIIPHY clock*/
|
| 371 |
|
|
}
|
| 372 |
|
|
|
| 373 |
|
|
/*******************************************************************************
|
| 374 |
|
|
* Function Name : SCU_FMICLKDivisorConfig
|
| 375 |
|
|
* Description : Set the FMI clock divisor
|
| 376 |
|
|
* Input : FMICLK_Divisor: SCU_FMICLK_Div1 or SCU_FMICLK_DIV2
|
| 377 |
|
|
* Output : None
|
| 378 |
|
|
* Return : None
|
| 379 |
|
|
*******************************************************************************/
|
| 380 |
|
|
void SCU_FMICLKDivisorConfig(u32 FMICLK_Divisor)
|
| 381 |
|
|
{
|
| 382 |
|
|
SCU->CLKCNTR &=SCU_FMICLK_Div1; /*FMICLK = RCLK*/
|
| 383 |
|
|
if (FMICLK_Divisor!=SCU_FMICLK_Div1)
|
| 384 |
|
|
SCU->CLKCNTR |=SCU_FMICLK_Div2; /*FMICLK = RCLK/2 */
|
| 385 |
|
|
}
|
| 386 |
|
|
|
| 387 |
|
|
/*******************************************************************************
|
| 388 |
|
|
* Function Name : SCU_EMIBCLKDivisorConfig
|
| 389 |
|
|
* Description : Set the EMI Bus clock divisor: EMIBCLK = HCLK or HCLK/2
|
| 390 |
|
|
* Input : SCU_EMICLK: SCU_EMIBCLK_Div1 , SCU_EMIBCLK_Div2
|
| 391 |
|
|
* Output : None
|
| 392 |
|
|
* Return : None
|
| 393 |
|
|
*******************************************************************************/
|
| 394 |
|
|
void SCU_EMIBCLKDivisorConfig(u32 SCU_EMIBCLK)
|
| 395 |
|
|
{
|
| 396 |
|
|
SCU->CLKCNTR &=SCU_EMIBCLK_Div1; /*EMIBCLK = HCLK */
|
| 397 |
|
|
if (SCU_EMIBCLK!=SCU_EMIBCLK_Div1)
|
| 398 |
|
|
SCU->CLKCNTR |= SCU_EMIBCLK_Div2; /*EMIBCLK = HCLK/2 */
|
| 399 |
|
|
}
|
| 400 |
|
|
|
| 401 |
|
|
/*******************************************************************************
|
| 402 |
|
|
* Function Name : SCU_EMIModeConfig
|
| 403 |
|
|
* Description : Configure the EMI as Multiplexed or Demultiplexed
|
| 404 |
|
|
* Input : SCU_EMIMODE : SCU_EMI_MUX or SCU_EMI_DEMUX
|
| 405 |
|
|
* Output : None
|
| 406 |
|
|
* Return : None
|
| 407 |
|
|
*******************************************************************************/
|
| 408 |
|
|
void SCU_EMIModeConfig(u32 SCU_EMIMODE)
|
| 409 |
|
|
{
|
| 410 |
|
|
SCU->SCR0 &=SCU_EMI_MUX; /*EMI mode = Multiplexed*/
|
| 411 |
|
|
if (SCU_EMIMODE!=SCU_EMI_MUX)
|
| 412 |
|
|
SCU->SCR0 |= SCU_EMI_DEMUX; /*EMI mode = Demultiplexed*/
|
| 413 |
|
|
}
|
| 414 |
|
|
|
| 415 |
|
|
/*******************************************************************************
|
| 416 |
|
|
* Function Name : SCU_EMIALEConfig
|
| 417 |
|
|
* Description : Configure the ALE signal (length & polarity)
|
| 418 |
|
|
* Input : -SCU_EMIALE_LEN : SCU_EMIALE_LEN1 or SCU_EMIALE_LEN2
|
| 419 |
|
|
* -SCU_EMIALE_POL : SCU_EMIALE_POLLow or SCU_EMI_POLHigh
|
| 420 |
|
|
* Output : None
|
| 421 |
|
|
* Return : None
|
| 422 |
|
|
*******************************************************************************/
|
| 423 |
|
|
void SCU_EMIALEConfig(u32 SCU_EMIALE_LEN, u32 SCU_EMIALE_POL)
|
| 424 |
|
|
{
|
| 425 |
|
|
/*Configure EMI ALE Length*/
|
| 426 |
|
|
SCU->SCR0 &=SCU_EMIALE_LEN1;
|
| 427 |
|
|
if (SCU_EMIALE_LEN!=SCU_EMIALE_LEN1)
|
| 428 |
|
|
SCU->SCR0 |= SCU_EMIALE_LEN2;
|
| 429 |
|
|
|
| 430 |
|
|
/*Configure EMI ALE POL*/
|
| 431 |
|
|
SCU->SCR0 &=SCU_EMIALE_POLLow;
|
| 432 |
|
|
if (SCU_EMIALE_POL!=SCU_EMIALE_POLLow)
|
| 433 |
|
|
SCU->SCR0 |= SCU_EMIALE_POLHigh;
|
| 434 |
|
|
}
|
| 435 |
|
|
|
| 436 |
|
|
/*******************************************************************************
|
| 437 |
|
|
* Function Name : SCU_ITConfig
|
| 438 |
|
|
* Description : ENBALE or DISABLE an SCU interrupt
|
| 439 |
|
|
* Input : -SCU_IT: interrupt mask
|
| 440 |
|
|
* -NewState: ENABLE or DISABLE
|
| 441 |
|
|
* Output : None
|
| 442 |
|
|
* Return : None
|
| 443 |
|
|
*******************************************************************************/
|
| 444 |
|
|
void SCU_ITConfig(u32 SCU_IT, FunctionalState NewState)
|
| 445 |
|
|
{
|
| 446 |
|
|
if (NewState==ENABLE)
|
| 447 |
|
|
SCU->ITCMSK&=~SCU_IT; /*IT enable */
|
| 448 |
|
|
else
|
| 449 |
|
|
SCU->ITCMSK|=SCU_IT; /*IT disable( mask)*/
|
| 450 |
|
|
}
|
| 451 |
|
|
|
| 452 |
|
|
/*******************************************************************************
|
| 453 |
|
|
* Function Name : SCU_GetFlagStatus
|
| 454 |
|
|
* Description : Returns flag status
|
| 455 |
|
|
* Input : SCU_Flag
|
| 456 |
|
|
* Output : NONE
|
| 457 |
|
|
* Return : SET or RESET
|
| 458 |
|
|
*******************************************************************************/
|
| 459 |
|
|
FlagStatus SCU_GetFlagStatus(u32 SCU_Flag)
|
| 460 |
|
|
{
|
| 461 |
|
|
if (SCU->SYSSTATUS&SCU_Flag)
|
| 462 |
|
|
return SET;
|
| 463 |
|
|
else return RESET;
|
| 464 |
|
|
}
|
| 465 |
|
|
|
| 466 |
|
|
/*******************************************************************************
|
| 467 |
|
|
* Function Name : SCU_ClearFlag
|
| 468 |
|
|
* Description : Clears a SYSTATUS Flag
|
| 469 |
|
|
* Input : SCU_Flag
|
| 470 |
|
|
* Output : None
|
| 471 |
|
|
* Return : None
|
| 472 |
|
|
*******************************************************************************/
|
| 473 |
|
|
void SCU_ClearFlag(u32 SCU_Flag)
|
| 474 |
|
|
{
|
| 475 |
|
|
SCU->SYSSTATUS = SCU_Flag;
|
| 476 |
|
|
}
|
| 477 |
|
|
/*******************************************************************************
|
| 478 |
|
|
* Function Name : SCU_GetPLLfreqValue
|
| 479 |
|
|
* Description : Gets the current PLL frequency
|
| 480 |
|
|
* Input : None
|
| 481 |
|
|
* Output : None
|
| 482 |
|
|
* Return : PLL frequency (KHz)
|
| 483 |
|
|
*******************************************************************************/
|
| 484 |
|
|
u32 SCU_GetPLLFreqValue(void)
|
| 485 |
|
|
{
|
| 486 |
|
|
u8 PLL_M;
|
| 487 |
|
|
u8 PLL_N;
|
| 488 |
|
|
u8 PLL_P;
|
| 489 |
|
|
|
| 490 |
|
|
PLL_M = SCU->PLLCONF&0xFF;
|
| 491 |
|
|
PLL_N = (SCU->PLLCONF&0xFF00)>>8;
|
| 492 |
|
|
PLL_P = (SCU->PLLCONF&0x70000)>>16;
|
| 493 |
|
|
|
| 494 |
|
|
if ((PLL_M>0)&&(PLL_N>0))
|
| 495 |
|
|
return (u32)(((_Main_Crystal*2)*PLL_N)/(PLL_M<<PLL_P));
|
| 496 |
|
|
|
| 497 |
|
|
else return 0;
|
| 498 |
|
|
}
|
| 499 |
|
|
/*******************************************************************************
|
| 500 |
|
|
* Function Name : SCU_GetMCLKFreqValue
|
| 501 |
|
|
* Description : Gets the current MCLK frequency
|
| 502 |
|
|
* Input : None
|
| 503 |
|
|
* Output : None
|
| 504 |
|
|
* Return : MCLK frequency (KHz)
|
| 505 |
|
|
*******************************************************************************/
|
| 506 |
|
|
u32 SCU_GetMCLKFreqValue(void)
|
| 507 |
|
|
{
|
| 508 |
|
|
if ((SCU->CLKCNTR&0x3) == 0x2) return (u32)(_Main_Crystal);
|
| 509 |
|
|
if ((SCU->CLKCNTR&0x3) == 0x1) return (u32)(32);
|
| 510 |
|
|
else return (SCU_GetPLLFreqValue());
|
| 511 |
|
|
}
|
| 512 |
|
|
|
| 513 |
|
|
/*******************************************************************************
|
| 514 |
|
|
* Function Name : SCU_GetRCLKFreqValue
|
| 515 |
|
|
* Description : Gets the current RCLK frequency
|
| 516 |
|
|
* Input : None
|
| 517 |
|
|
* Output : None
|
| 518 |
|
|
* Return : RCLK frequency (KHz)
|
| 519 |
|
|
*******************************************************************************/
|
| 520 |
|
|
u32 SCU_GetRCLKFreqValue(void)
|
| 521 |
|
|
{
|
| 522 |
|
|
u8 RCLK_Div;
|
| 523 |
|
|
RCLK_Div = (SCU->CLKCNTR&0x1C)>>2;
|
| 524 |
|
|
if (RCLK_Div==0x5) RCLK_Div=10;
|
| 525 |
|
|
return (u32)(SCU_GetMCLKFreqValue() >>RCLK_Div);
|
| 526 |
|
|
}
|
| 527 |
|
|
|
| 528 |
|
|
/*******************************************************************************
|
| 529 |
|
|
* Function Name : SCU_GetHCLKFreqValue
|
| 530 |
|
|
* Description : Gets the current PCLK frequency
|
| 531 |
|
|
* Input : None
|
| 532 |
|
|
* Output : None
|
| 533 |
|
|
* Return : HCLK frequency (KHz)
|
| 534 |
|
|
*******************************************************************************/
|
| 535 |
|
|
u32 SCU_GetHCLKFreqValue(void)
|
| 536 |
|
|
{
|
| 537 |
|
|
u8 HCLK_Div;
|
| 538 |
|
|
HCLK_Div = (SCU->CLKCNTR&0x60)>>5;
|
| 539 |
|
|
return (u32)(SCU_GetRCLKFreqValue() >>HCLK_Div);
|
| 540 |
|
|
}
|
| 541 |
|
|
|
| 542 |
|
|
/*******************************************************************************
|
| 543 |
|
|
* Function Name : SCU_GetPCLKFreqValue
|
| 544 |
|
|
* Description : Gets the current HCLK frequency
|
| 545 |
|
|
* Input : None
|
| 546 |
|
|
* Output : None
|
| 547 |
|
|
* Return : PCLK frequency (KHz)
|
| 548 |
|
|
*******************************************************************************/
|
| 549 |
|
|
u32 SCU_GetPCLKFreqValue(void)
|
| 550 |
|
|
{
|
| 551 |
|
|
u8 PCLK_Div;
|
| 552 |
|
|
PCLK_Div = (SCU->CLKCNTR&0x180)>>7;
|
| 553 |
|
|
return (u32)(SCU_GetRCLKFreqValue() >>PCLK_Div);
|
| 554 |
|
|
}
|
| 555 |
|
|
|
| 556 |
|
|
/*******************************************************************************
|
| 557 |
|
|
* Function Name : SCU_WakeUpLineConfig
|
| 558 |
|
|
* Description : Configures an External interrupt as WakeUp line
|
| 559 |
|
|
* Input : EXTint : 0 -> 31
|
| 560 |
|
|
* Output : None
|
| 561 |
|
|
* Return : None
|
| 562 |
|
|
*******************************************************************************/
|
| 563 |
|
|
void SCU_WakeUpLineConfig(u8 EXTint)
|
| 564 |
|
|
{
|
| 565 |
|
|
if (EXTint < 8)
|
| 566 |
|
|
{
|
| 567 |
|
|
SCU->WKUPSEL&=~0x7;
|
| 568 |
|
|
SCU->WKUPSEL|=EXTint;
|
| 569 |
|
|
}
|
| 570 |
|
|
else if (EXTint<16)
|
| 571 |
|
|
{
|
| 572 |
|
|
SCU->WKUPSEL&=~0x38;
|
| 573 |
|
|
SCU->WKUPSEL|=(EXTint-8)<<3;
|
| 574 |
|
|
}
|
| 575 |
|
|
else if (EXTint<24)
|
| 576 |
|
|
{
|
| 577 |
|
|
SCU->WKUPSEL&=~0x1C0;
|
| 578 |
|
|
SCU->WKUPSEL|=(EXTint-16)<<6;
|
| 579 |
|
|
}
|
| 580 |
|
|
else
|
| 581 |
|
|
{
|
| 582 |
|
|
SCU->WKUPSEL&=~0xE00;
|
| 583 |
|
|
SCU->WKUPSEL|=(EXTint-24)<<9;
|
| 584 |
|
|
}
|
| 585 |
|
|
}
|
| 586 |
|
|
|
| 587 |
|
|
/*******************************************************************************
|
| 588 |
|
|
* Function Name : SCU_SpecIntRunModeConfig
|
| 589 |
|
|
* Description : Enables or Disables the Special Run mode
|
| 590 |
|
|
* Input : newstate = ENABLE or DISABLE
|
| 591 |
|
|
* Output : None
|
| 592 |
|
|
* Return : None
|
| 593 |
|
|
*******************************************************************************/
|
| 594 |
|
|
void SCU_SpecIntRunModeConfig(FunctionalState NewState)
|
| 595 |
|
|
{
|
| 596 |
|
|
if (NewState == ENABLE)
|
| 597 |
|
|
SCU->PWRMNG |=0x8;
|
| 598 |
|
|
else
|
| 599 |
|
|
SCU->PWRMNG &=~0x8;
|
| 600 |
|
|
}
|
| 601 |
|
|
/*******************************************************************************
|
| 602 |
|
|
* Function Name : SCU_EnterIdleMode
|
| 603 |
|
|
* Description : Enters in Idle mode
|
| 604 |
|
|
* Input : None
|
| 605 |
|
|
* Output : None
|
| 606 |
|
|
* Return : None
|
| 607 |
|
|
*******************************************************************************/
|
| 608 |
|
|
void SCU_EnterIdleMode(void)
|
| 609 |
|
|
{
|
| 610 |
|
|
SCU->PWRMNG |=0x1;
|
| 611 |
|
|
}
|
| 612 |
|
|
/*******************************************************************************
|
| 613 |
|
|
* Function Name : SCU_EnterSleepMode
|
| 614 |
|
|
* Description : Enters in Sleep mode
|
| 615 |
|
|
* Input : None
|
| 616 |
|
|
* Output : None
|
| 617 |
|
|
* Return : None
|
| 618 |
|
|
*******************************************************************************/
|
| 619 |
|
|
void SCU_EnterSleepMode(void)
|
| 620 |
|
|
{
|
| 621 |
|
|
SCU->PWRMNG |=0x2;
|
| 622 |
|
|
}
|
| 623 |
|
|
|
| 624 |
|
|
/*******************************************************************************
|
| 625 |
|
|
* Function Name : SCU_UARTIrDAConfig
|
| 626 |
|
|
* Description : Enable or Disable the Irda mode for UARTx
|
| 627 |
|
|
* Input : - UARTx :x=0,1 or 2
|
| 628 |
|
|
* - UART_IrDA_Mode : SCU_UARTMode_IrDA or SCU_UARTMode_UART
|
| 629 |
|
|
* Output : None
|
| 630 |
|
|
* Return : None
|
| 631 |
|
|
*******************************************************************************/
|
| 632 |
|
|
void SCU_UARTIrDASelect(UART_TypeDef * UARTx, u8 UART_IrDA_Mode)
|
| 633 |
|
|
{
|
| 634 |
|
|
if (UART_IrDA_Mode == SCU_UARTMode_IrDA)
|
| 635 |
|
|
{
|
| 636 |
|
|
if (UARTx== UART0) SCU->SCR0 |=0x400;
|
| 637 |
|
|
else if (UARTx==UART1) SCU->SCR0 |=0x800;
|
| 638 |
|
|
else SCU->SCR0 |=0x1000;
|
| 639 |
|
|
}
|
| 640 |
|
|
else
|
| 641 |
|
|
{
|
| 642 |
|
|
if (UARTx== UART0) SCU->SCR0 &=~0x400;
|
| 643 |
|
|
else if (UARTx==UART1) SCU->SCR0 &=~0x800;
|
| 644 |
|
|
else SCU->SCR0 &=~0x1000;
|
| 645 |
|
|
}
|
| 646 |
|
|
}
|
| 647 |
|
|
/*******************************************************************************
|
| 648 |
|
|
* Function Name : SCU_PFQBCCmd
|
| 649 |
|
|
* Description : Enable or Disable PFQBC
|
| 650 |
|
|
* Input : NewState : ENABLE or DISABLE
|
| 651 |
|
|
* Output : None
|
| 652 |
|
|
* Return : None
|
| 653 |
|
|
*******************************************************************************/
|
| 654 |
|
|
void SCU_PFQBCCmd(FunctionalState NewState)
|
| 655 |
|
|
{
|
| 656 |
|
|
if (NewState==ENABLE)
|
| 657 |
|
|
SCU->SCR0 |=0x1;
|
| 658 |
|
|
else SCU->SCR0 &=~0x1;
|
| 659 |
|
|
}
|
| 660 |
|
|
|
| 661 |
|
|
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|