1 |
577 |
jeremybenn |
/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
|
2 |
|
|
* File Name : 91x_uart.c
|
3 |
|
|
* Author : MCD Application Team
|
4 |
|
|
* Date First Issued : 05/18/2006 : Version 1.0
|
5 |
|
|
* Description : This file provides all the UART software functions.
|
6 |
|
|
********************************************************************************
|
7 |
|
|
* History:
|
8 |
|
|
* 05/24/2006 : Version 1.1
|
9 |
|
|
* 05/18/2006 : Version 1.0
|
10 |
|
|
********************************************************************************
|
11 |
|
|
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
12 |
|
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
13 |
|
|
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
14 |
|
|
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
15 |
|
|
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
16 |
|
|
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
17 |
|
|
*******************************************************************************/
|
18 |
|
|
|
19 |
|
|
/* Includes ------------------------------------------------------------------*/
|
20 |
|
|
#include "91x_uart.h"
|
21 |
|
|
#include "91x_scu.h"
|
22 |
|
|
|
23 |
|
|
/* Private typedef -----------------------------------------------------------*/
|
24 |
|
|
/* Private define ------------------------------------------------------------*/
|
25 |
|
|
/* UART IrDA Mask */
|
26 |
|
|
#define UART_IrDA_Disable_Mask 0xFFFD /* IrDA Disable Mask */
|
27 |
|
|
#define UART_IrDA_Enable_Mask 0x0002 /* IrDA Enable Mask */
|
28 |
|
|
#define IrDA_LowPower_Enable_Mask 0x0004 /*IrDA lower power mode enable*/
|
29 |
|
|
#define IrDA_LowPower_Disable_Mask 0xFFFB /*IrDA lower power mode enable*/
|
30 |
|
|
|
31 |
|
|
/* UART Mask */
|
32 |
|
|
#define UART_Enable_Mask 0x0001 /* UART Enable Mask */
|
33 |
|
|
#define UART_Disable_Mask 0xFFFE /* UART Disable Mask */
|
34 |
|
|
|
35 |
|
|
/* UART LoopBack */
|
36 |
|
|
#define UART_LoopBack_Disable_Mask 0xFF7F /* LoopBack Disable Mask */
|
37 |
|
|
#define UART_LoopBack_Enable_Mask 0x0080 /* LoopBack Enable Mask */
|
38 |
|
|
|
39 |
|
|
#define UART_WordLength_Mask 0xFF9F /* UART Word Length Mask */
|
40 |
|
|
#define UART_Parity_Mask 0xFF79 /* UART Parity Mask */
|
41 |
|
|
#define UART_HardwareFlowControl_Mask 0x3FFF /* UART Hardware Flow Control Mask */
|
42 |
|
|
#define UART_TxRxFIFOLevel_Mask 0xFFC0 /* UART Tx Rx FIFO Level Mask */
|
43 |
|
|
#define UART_BreakChar_Mask 0x0001 /* UART Break Character send Mask*/
|
44 |
|
|
#define UART_FLAG_Mask 0x1F /* UART Flag Mask */
|
45 |
|
|
#define UART_Mode_Mask 0xFCFF /* UART Mode Mask */
|
46 |
|
|
#define UART_RTS_LowLevel_Mask 0x0800 /* RTS signal is low */
|
47 |
|
|
#define UART_RTS_HighLevel_Mask 0xF7FF /* RTS signal is High */
|
48 |
|
|
#define UART_DTR_LowLevel_Mask 0x0400 /* DTR signal is low */
|
49 |
|
|
#define UART_DTR_HighLevel_Mask 0xFBFF /* DTR signal is High */
|
50 |
|
|
#define UART_ClearFlag_Mask 0xAA /* Clear Flag Mask */
|
51 |
|
|
|
52 |
|
|
/* Private macro -------------------------------------------------------------*/
|
53 |
|
|
/* Private variables ---------------------------------------------------------*/
|
54 |
|
|
/* Private function prototypes -----------------------------------------------*/
|
55 |
|
|
/* Private functions ---------------------------------------------------------*/
|
56 |
|
|
|
57 |
|
|
/*******************************************************************************
|
58 |
|
|
* Function Name : UART_DeInit
|
59 |
|
|
* Description : Deinitializes the UARTx peripheral registers
|
60 |
|
|
* to their default reset values.
|
61 |
|
|
* Input : UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
62 |
|
|
* Output : None
|
63 |
|
|
* Return : None
|
64 |
|
|
*******************************************************************************/
|
65 |
|
|
void UART_DeInit(UART_TypeDef* UARTx)
|
66 |
|
|
{
|
67 |
|
|
/* Reset the UARTx registers values */
|
68 |
|
|
if(UARTx == UART0)
|
69 |
|
|
{
|
70 |
|
|
SCU_APBPeriphReset(__UART0,ENABLE);
|
71 |
|
|
SCU_APBPeriphReset(__UART0,DISABLE);
|
72 |
|
|
}
|
73 |
|
|
else if(UARTx == UART1)
|
74 |
|
|
{
|
75 |
|
|
SCU_APBPeriphReset(__UART1,ENABLE);
|
76 |
|
|
SCU_APBPeriphReset(__UART1,DISABLE);
|
77 |
|
|
}
|
78 |
|
|
else if(UARTx == UART2)
|
79 |
|
|
{
|
80 |
|
|
SCU_APBPeriphReset(__UART2,ENABLE);
|
81 |
|
|
SCU_APBPeriphReset(__UART2,DISABLE);
|
82 |
|
|
}
|
83 |
|
|
}
|
84 |
|
|
|
85 |
|
|
/*******************************************************************************
|
86 |
|
|
* Function Name : UART_Init
|
87 |
|
|
* Description : Initializes the UARTx peripheral according to the specified
|
88 |
|
|
* parameters in the UART_InitStruct .
|
89 |
|
|
* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
|
90 |
|
|
* - UART_InitStruct: pointer to a UART_InitTypeDef structure
|
91 |
|
|
* that contains the configuration information for the
|
92 |
|
|
* specified UART peripheral.
|
93 |
|
|
* Output : None
|
94 |
|
|
* Return : None
|
95 |
|
|
*******************************************************************************/
|
96 |
|
|
void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct)
|
97 |
|
|
{
|
98 |
|
|
|
99 |
|
|
u64 UART_MainClock = 0;
|
100 |
|
|
u32 IntegerDivider = 0;
|
101 |
|
|
u32 FractionalDivider = 0;
|
102 |
|
|
|
103 |
|
|
/* Clear the LCR[6:5] bits */
|
104 |
|
|
UARTx->LCR &= UART_WordLength_Mask;
|
105 |
|
|
/* Set the LCR[6:5] bits according to UART_WordLength value */
|
106 |
|
|
UARTx->LCR |= UART_InitStruct->UART_WordLength;
|
107 |
|
|
|
108 |
|
|
/* Choose Stop Bits */
|
109 |
|
|
if(UART_InitStruct->UART_StopBits == UART_StopBits_2)
|
110 |
|
|
{
|
111 |
|
|
/* 2 Stop Bit */
|
112 |
|
|
UARTx->LCR |= UART_StopBits_2;
|
113 |
|
|
}
|
114 |
|
|
else
|
115 |
|
|
{
|
116 |
|
|
/* One Stop Bits */
|
117 |
|
|
UARTx->LCR &= UART_StopBits_1;
|
118 |
|
|
}
|
119 |
|
|
|
120 |
|
|
/* Configure the Parity */
|
121 |
|
|
/* Clear the LCR[7]and LCR[2:1] bits */
|
122 |
|
|
UARTx->LCR &= UART_Parity_Mask;
|
123 |
|
|
/* Set the LCR[7]and LCR[2:1] bits according to UART_Parity value */
|
124 |
|
|
UARTx->LCR |= UART_InitStruct->UART_Parity;
|
125 |
|
|
|
126 |
|
|
/* Configure the BaudRate */
|
127 |
|
|
UART_MainClock = (SCU_GetMCLKFreqValue())*1000;
|
128 |
|
|
if((SCU->CLKCNTR & 0x200) != 0x200)
|
129 |
|
|
{
|
130 |
|
|
UART_MainClock = UART_MainClock/2;
|
131 |
|
|
}
|
132 |
|
|
/* Determine the integer part */
|
133 |
|
|
IntegerDivider = ((100) * (UART_MainClock) / (16 * (UART_InitStruct->UART_BaudRate)));
|
134 |
|
|
UARTx->IBRD = IntegerDivider / 100;
|
135 |
|
|
|
136 |
|
|
/* Determine the fractional part */
|
137 |
|
|
FractionalDivider = IntegerDivider - (100 * (UARTx->IBRD));
|
138 |
|
|
UARTx->FBRD = ((((FractionalDivider * 64) + 50) / 100));
|
139 |
|
|
|
140 |
|
|
/* Choose the Hardware Flow Control */
|
141 |
|
|
/* Clear the CR[15:14] bits */
|
142 |
|
|
UARTx->CR &= UART_HardwareFlowControl_Mask;
|
143 |
|
|
/* Set the CR[15:14] bits according to UART_HardwareFlowControl value */
|
144 |
|
|
UARTx->CR |= UART_InitStruct->UART_HardwareFlowControl;
|
145 |
|
|
|
146 |
|
|
/* Configure the UART mode */
|
147 |
|
|
/* Clear the CR[9:8] bits */
|
148 |
|
|
UARTx->CR &= UART_Mode_Mask;
|
149 |
|
|
/* Set the CR[9:8] bits according to UART_Mode value */
|
150 |
|
|
UARTx->CR |= UART_InitStruct->UART_Mode;
|
151 |
|
|
|
152 |
|
|
/* Enable or disable the FIFOs */
|
153 |
|
|
/* Set the FIFOs Levels */
|
154 |
|
|
if(UART_InitStruct->UART_FIFO == UART_FIFO_Enable)
|
155 |
|
|
{
|
156 |
|
|
/* Enable the FIFOs */
|
157 |
|
|
UARTx->LCR |= UART_FIFO_Enable;
|
158 |
|
|
|
159 |
|
|
/* Clear TXIFLSEL and RXIFLSEL bits */
|
160 |
|
|
UARTx->IFLS &= UART_TxRxFIFOLevel_Mask;
|
161 |
|
|
|
162 |
|
|
/* Set RXIFLSEL bits according to UART_RxFIFOLevel value */
|
163 |
|
|
UARTx->IFLS |= (UART_InitStruct->UART_RxFIFOLevel << 3);
|
164 |
|
|
|
165 |
|
|
/* Set TXIFLSEL bits according to UART_TxFIFOLevel value */
|
166 |
|
|
UARTx->IFLS |= UART_InitStruct->UART_TxFIFOLevel;
|
167 |
|
|
}
|
168 |
|
|
else
|
169 |
|
|
{
|
170 |
|
|
/* Disable the FIFOs */
|
171 |
|
|
UARTx->LCR &= UART_FIFO_Disable;
|
172 |
|
|
}
|
173 |
|
|
}
|
174 |
|
|
|
175 |
|
|
/*******************************************************************************
|
176 |
|
|
* Function Name : UART_StructInit
|
177 |
|
|
* Description : Fills each UART_InitStruct member with its reset value.
|
178 |
|
|
* Input : UART_InitStruct: pointer to a UART_InitTypeDef structure which
|
179 |
|
|
* will be initialized.
|
180 |
|
|
* Output : None
|
181 |
|
|
* Return : None
|
182 |
|
|
*******************************************************************************/
|
183 |
|
|
void UART_StructInit(UART_InitTypeDef* UART_InitStruct)
|
184 |
|
|
{
|
185 |
|
|
/* Reset the UART_InitStruct members */
|
186 |
|
|
UART_InitStruct->UART_WordLength = UART_WordLength_8D;
|
187 |
|
|
UART_InitStruct->UART_StopBits = UART_StopBits_1;
|
188 |
|
|
UART_InitStruct->UART_Parity = UART_Parity_Odd ;
|
189 |
|
|
UART_InitStruct->UART_BaudRate = 9600;
|
190 |
|
|
UART_InitStruct->UART_HardwareFlowControl = UART_HardwareFlowControl_None;
|
191 |
|
|
UART_InitStruct->UART_Mode = UART_Mode_Tx_Rx;
|
192 |
|
|
UART_InitStruct->UART_FIFO = UART_FIFO_Enable;
|
193 |
|
|
UART_InitStruct->UART_TxFIFOLevel = UART_FIFOLevel_1_2;
|
194 |
|
|
UART_InitStruct->UART_RxFIFOLevel = UART_FIFOLevel_1_2;
|
195 |
|
|
}
|
196 |
|
|
|
197 |
|
|
/*******************************************************************************
|
198 |
|
|
* Function Name : UART_Cmd
|
199 |
|
|
* Description : Enables or disables the specified UART peripheral.
|
200 |
|
|
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
|
201 |
|
|
* - NewState: new state of the UARTx peripheral.
|
202 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
203 |
|
|
* Output : None
|
204 |
|
|
* Return : None
|
205 |
|
|
*******************************************************************************/
|
206 |
|
|
void UART_Cmd(UART_TypeDef* UARTx, FunctionalState NewState)
|
207 |
|
|
{
|
208 |
|
|
if (NewState == ENABLE)
|
209 |
|
|
{
|
210 |
|
|
/* Enable the selected UART by setting the UARTEN bit in the CR register */
|
211 |
|
|
UARTx->CR |= UART_Enable_Mask;
|
212 |
|
|
}
|
213 |
|
|
else
|
214 |
|
|
{
|
215 |
|
|
/* Disable the selected UART by clearing the UARTEN bit in the CR register */
|
216 |
|
|
UARTx->CR &= UART_Disable_Mask;
|
217 |
|
|
}
|
218 |
|
|
}
|
219 |
|
|
|
220 |
|
|
/*******************************************************************************
|
221 |
|
|
* Function Name : UART_ITConfig
|
222 |
|
|
* Description : Enables or disables the specified UART interrupts.
|
223 |
|
|
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
|
224 |
|
|
* - UART_IT: specifies the UART interrupts sources to be
|
225 |
|
|
* enabled or disabled. This parameter can be any combination
|
226 |
|
|
* of the following values:
|
227 |
|
|
* - UART_IT_OverrunError: Overrun Error interrupt
|
228 |
|
|
* - UART_IT_BreakError: Break Error interrupt
|
229 |
|
|
* - UART_IT_ParityError: Parity Error interrupt
|
230 |
|
|
* - UART_IT_FrameError: Frame Error interrupt
|
231 |
|
|
* - UART_IT_ReceiveTimeOut: Receive Time Out interrupt
|
232 |
|
|
* - UART_IT_Transmit: Transmit interrupt
|
233 |
|
|
* - UART_IT_Receive: Receive interrupt
|
234 |
|
|
* - UART_IT_DSR: DSR interrupt
|
235 |
|
|
* - UART_IT_DCD: DCD interrupt
|
236 |
|
|
* - UART_IT_CTS: CTS interrupt
|
237 |
|
|
* - UART_IT_RI: RI interrupt
|
238 |
|
|
* - NewState: new state of the UARTx peripheral.
|
239 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
240 |
|
|
* Output : None
|
241 |
|
|
* Return : None
|
242 |
|
|
*******************************************************************************/
|
243 |
|
|
void UART_ITConfig(UART_TypeDef* UARTx, u16 UART_IT, FunctionalState NewState)
|
244 |
|
|
{
|
245 |
|
|
if(NewState == ENABLE)
|
246 |
|
|
{
|
247 |
|
|
/* Enables the selected interrupts */
|
248 |
|
|
UARTx->IMSC |= UART_IT;
|
249 |
|
|
}
|
250 |
|
|
else
|
251 |
|
|
{
|
252 |
|
|
/* Disables the selected interrupts */
|
253 |
|
|
UARTx->IMSC &= ~UART_IT;
|
254 |
|
|
}
|
255 |
|
|
}
|
256 |
|
|
|
257 |
|
|
/*******************************************************************************
|
258 |
|
|
* Function Name : UART_DMAConfig
|
259 |
|
|
* Description : Configures the UARTx’s DMA interface.
|
260 |
|
|
* Input : - UARTx: where x can be 1 or 2 to select the UART peripheral
|
261 |
|
|
* - UART_DMAOnError: specifies the DMA on error request.
|
262 |
|
|
* This parameter can be:
|
263 |
|
|
* - UART_DMAOnError_Enable: DMA receive request enabled
|
264 |
|
|
* when the UART error interrupt is asserted.
|
265 |
|
|
* - UART_DMAOnError_Disable: DMA receive request disabled
|
266 |
|
|
* when the UART error interrupt is asserted.
|
267 |
|
|
* Output : None
|
268 |
|
|
* Return : None
|
269 |
|
|
*******************************************************************************/
|
270 |
|
|
void UART_DMAConfig(UART_TypeDef* UARTx, u16 UART_DMAOnError)
|
271 |
|
|
{
|
272 |
|
|
if(UART_DMAOnError == UART_DMAOnError_Enable)
|
273 |
|
|
{
|
274 |
|
|
UARTx->DMACR &= UART_DMAOnError_Enable;
|
275 |
|
|
}
|
276 |
|
|
else
|
277 |
|
|
{
|
278 |
|
|
UARTx->DMACR |= UART_DMAOnError_Disable;
|
279 |
|
|
}
|
280 |
|
|
}
|
281 |
|
|
|
282 |
|
|
/*******************************************************************************
|
283 |
|
|
* Function Name : UART_DMACmd
|
284 |
|
|
* Description : Enables or disables the UARTx’s DMA interface.
|
285 |
|
|
* Input : - UARTx: where x can be 1 or 2 to select the UART peripheral
|
286 |
|
|
* - UART_DMAReq: enables or disables the request of DMA from UART.
|
287 |
|
|
* This parameter can be:
|
288 |
|
|
* - UART_DMAReq_Tx: Transmit DMA Enable
|
289 |
|
|
* - UART_DMAReq_Rx: Receive DMA Enable
|
290 |
|
|
* - NewState: new state of the UARTx peripheral.
|
291 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
292 |
|
|
* Output : None
|
293 |
|
|
* Return : None
|
294 |
|
|
*******************************************************************************/
|
295 |
|
|
void UART_DMACmd(UART_TypeDef* UARTx, u8 UART_DMAReq, FunctionalState NewState)
|
296 |
|
|
{
|
297 |
|
|
if(UART_DMAReq == UART_DMAReq_Tx)
|
298 |
|
|
{
|
299 |
|
|
if(NewState == ENABLE)
|
300 |
|
|
{
|
301 |
|
|
UARTx->DMACR |= UART_DMAReq_Tx;
|
302 |
|
|
}
|
303 |
|
|
else
|
304 |
|
|
{
|
305 |
|
|
UARTx->DMACR &= ~UART_DMAReq_Tx;
|
306 |
|
|
}
|
307 |
|
|
}
|
308 |
|
|
|
309 |
|
|
if(UART_DMAReq == UART_DMAReq_Rx)
|
310 |
|
|
{
|
311 |
|
|
if(NewState == ENABLE)
|
312 |
|
|
{
|
313 |
|
|
UARTx->DMACR |= UART_DMAReq_Rx;
|
314 |
|
|
}
|
315 |
|
|
else
|
316 |
|
|
{
|
317 |
|
|
UARTx->DMACR &= ~UART_DMAReq_Rx;
|
318 |
|
|
}
|
319 |
|
|
}
|
320 |
|
|
}
|
321 |
|
|
|
322 |
|
|
/*******************************************************************************
|
323 |
|
|
* Function Name : UART_LoopBackConfig
|
324 |
|
|
* Description : Enables or disables the LoopBack mode.
|
325 |
|
|
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
|
326 |
|
|
* - NewState: new state of the UARTx peripheral.
|
327 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
328 |
|
|
* Output : None
|
329 |
|
|
* Return : None
|
330 |
|
|
*******************************************************************************/
|
331 |
|
|
void UART_LoopBackConfig(UART_TypeDef* UARTx, FunctionalState NewState)
|
332 |
|
|
{
|
333 |
|
|
if (NewState == ENABLE)
|
334 |
|
|
{
|
335 |
|
|
/* Enable the LoopBack mode of the specified UART */
|
336 |
|
|
UARTx->CR |= UART_LoopBack_Enable_Mask;
|
337 |
|
|
}
|
338 |
|
|
else
|
339 |
|
|
{
|
340 |
|
|
/* Disable the LoopBack mode of the specified UART */
|
341 |
|
|
UARTx->CR &= UART_LoopBack_Disable_Mask;
|
342 |
|
|
}
|
343 |
|
|
}
|
344 |
|
|
|
345 |
|
|
/*******************************************************************************
|
346 |
|
|
* Function Name : UART_GetFlagStatus
|
347 |
|
|
* Description : Checks whether the specified UART flag is set or not.
|
348 |
|
|
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
|
349 |
|
|
* - UART_FLAG: specifies the flag to check.
|
350 |
|
|
* This parameter can be one of the following values:
|
351 |
|
|
* - UART_FLAG_OverrunError: Overrun error flag
|
352 |
|
|
* - UART_FLAG_Break: break error flag
|
353 |
|
|
* - UART_FLAG_ParityError: parity error flag
|
354 |
|
|
* - UART_FLAG_FrameError: frame error flag
|
355 |
|
|
* - UART_FLAG_RI: RI flag
|
356 |
|
|
* - UART_FLAG_TxFIFOEmpty: Transmit FIFO Empty flag
|
357 |
|
|
* - UART_FLAG_RxFIFOFull: Receive FIFO Full flag
|
358 |
|
|
* - UART_FLAG_TxFIFOFull: Transmit FIFO Full flag
|
359 |
|
|
* - UART_FLAG_RxFIFOEmpty: Receive FIFO Empty flag
|
360 |
|
|
* - UART_FLAG_Busy: UART Busy flag
|
361 |
|
|
* - UART_FLAG_CTS: CTS flag
|
362 |
|
|
* - UART_FLAG_DCD: DCD flag
|
363 |
|
|
* - UART_FLAG_DSR: DSR flag
|
364 |
|
|
* - UART_RawIT_OverrunError: Overrun Error interrupt flag
|
365 |
|
|
* - UART_RawIT_BreakError: Break Error interrupt flag
|
366 |
|
|
* - UART_RawIT_ParityError: Parity Error interrupt flag
|
367 |
|
|
* - UART_RawIT_FrameError: Frame Error interrupt flag
|
368 |
|
|
* - UART_RawIT_ReceiveTimeOut: ReceiveTimeOut interrupt flag
|
369 |
|
|
* - UART_RawIT_Transmit: Transmit interrupt flag
|
370 |
|
|
* - UART_RawIT_Receive: Receive interrupt flag
|
371 |
|
|
* - UART_RawIT_DSR: DSR interrupt flag
|
372 |
|
|
* - UART_RawIT_DCD: DCD interrupt flag
|
373 |
|
|
* - UART_RawIT_CTS: CTS interrupt flag
|
374 |
|
|
* - UART_RawIT_RI: RI interrupt flag
|
375 |
|
|
* Output : None
|
376 |
|
|
* Return : The new state of UART_FLAG (SET or RESET).
|
377 |
|
|
*******************************************************************************/
|
378 |
|
|
FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, u16 UART_FLAG)
|
379 |
|
|
{
|
380 |
|
|
|
381 |
|
|
u32 UARTReg = 0, FlagPos = 0;
|
382 |
|
|
u32 StatusReg = 0;
|
383 |
|
|
|
384 |
|
|
/* Get the UART register index */
|
385 |
|
|
UARTReg = UART_FLAG >> 5;
|
386 |
|
|
|
387 |
|
|
/* Get the flag position */
|
388 |
|
|
FlagPos = UART_FLAG & UART_FLAG_Mask;
|
389 |
|
|
|
390 |
|
|
if(UARTReg == 1) /* The flag to check is in RSR register */
|
391 |
|
|
{
|
392 |
|
|
StatusReg = UARTx->RSECR;
|
393 |
|
|
}
|
394 |
|
|
else if (UARTReg == 2) /* The flag to check is in FR register */
|
395 |
|
|
{
|
396 |
|
|
StatusReg = UARTx->FR;
|
397 |
|
|
}
|
398 |
|
|
else if(UARTReg == 3) /* The flag to check is in RIS register */
|
399 |
|
|
{
|
400 |
|
|
StatusReg = UARTx->RIS;
|
401 |
|
|
}
|
402 |
|
|
|
403 |
|
|
if((StatusReg & (1 << FlagPos))!= RESET)
|
404 |
|
|
{
|
405 |
|
|
return SET;
|
406 |
|
|
}
|
407 |
|
|
else
|
408 |
|
|
{
|
409 |
|
|
return RESET;
|
410 |
|
|
}
|
411 |
|
|
}
|
412 |
|
|
|
413 |
|
|
/*******************************************************************************
|
414 |
|
|
* Function Name : UART_ClearFlag
|
415 |
|
|
* Description : Clears the UARTx’s flags(Frame, Parity, Break, Overrun error).
|
416 |
|
|
* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
|
417 |
|
|
* Output : None
|
418 |
|
|
* Return : None
|
419 |
|
|
*******************************************************************************/
|
420 |
|
|
void UART_ClearFlag(UART_TypeDef* UARTx)
|
421 |
|
|
{
|
422 |
|
|
/* Clear the flag */
|
423 |
|
|
UARTx->RSECR = UART_ClearFlag_Mask;
|
424 |
|
|
}
|
425 |
|
|
|
426 |
|
|
/*******************************************************************************
|
427 |
|
|
* Function Name : UART_GetITStatus
|
428 |
|
|
* Description : Checks whether the specified UART interrupt has occured or not.
|
429 |
|
|
* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
|
430 |
|
|
* - UART_IT: specifies the interrupt pending bit to be checked.
|
431 |
|
|
* This parameter can be one of the following values:
|
432 |
|
|
* - UART_IT_OverrunError: Overrun Error interrupt
|
433 |
|
|
* - UART_IT_BreakError: Break Error interrupt
|
434 |
|
|
* - UART_IT_ParityError: Parity Error interrupt
|
435 |
|
|
* - UART_IT_FrameError: Frame Error interrupt
|
436 |
|
|
* - UART_IT_ReceiveTimeOut: Receive Time Out interrupt
|
437 |
|
|
* - UART_IT_Transmit: Transmit interrupt
|
438 |
|
|
* - UART_IT_Receive: Receive interrupt
|
439 |
|
|
* - UART_IT_DSR: DSR interrupt
|
440 |
|
|
* - UART_IT_DCD: DCD interrupt
|
441 |
|
|
* - UART_IT_CTS: CTS interrupt
|
442 |
|
|
* - UART_IT_RI: RI interrupt
|
443 |
|
|
* Output : None
|
444 |
|
|
* Return : The new state of UART_IT (SET or RESET).
|
445 |
|
|
*******************************************************************************/
|
446 |
|
|
ITStatus UART_GetITStatus(UART_TypeDef* UARTx, u16 UART_IT)
|
447 |
|
|
{
|
448 |
|
|
if((UARTx->MIS & UART_IT) != RESET)
|
449 |
|
|
{
|
450 |
|
|
return SET;
|
451 |
|
|
}
|
452 |
|
|
else
|
453 |
|
|
{
|
454 |
|
|
return RESET;
|
455 |
|
|
}
|
456 |
|
|
}
|
457 |
|
|
|
458 |
|
|
/*******************************************************************************
|
459 |
|
|
* Function Name : UART_ClearITPendingBit
|
460 |
|
|
* Description : Clears the UARTx’s interrupt pending bits.
|
461 |
|
|
* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
|
462 |
|
|
* - UART_IT: specifies the interrupt pending bit to clear.
|
463 |
|
|
* More than one interrupt can be cleared using the “|” operator.
|
464 |
|
|
* This parameter can be:
|
465 |
|
|
* - UART_IT_OverrunError: Overrun Error interrupt
|
466 |
|
|
* - UART_IT_BreakError: Break Error interrupt
|
467 |
|
|
* - UART_IT_ParityError: Parity Error interrupt
|
468 |
|
|
* - UART_IT_FrameError: Frame Error interrupt
|
469 |
|
|
* - UART_IT_ReceiveTimeOut: Receive Time Out interrupt
|
470 |
|
|
* - UART_IT_Transmit: Transmit interrupt
|
471 |
|
|
* - UART_IT_Receive: Receive interrupt
|
472 |
|
|
* - UART_IT_DSR: DSR interrupt
|
473 |
|
|
* - UART_IT_DCD: DCD interrupt
|
474 |
|
|
* - UART_IT_CTS: CTS interrupt
|
475 |
|
|
* - UART_IT_RI: RI interrupt
|
476 |
|
|
* Output : None
|
477 |
|
|
* Return : None
|
478 |
|
|
*******************************************************************************/
|
479 |
|
|
void UART_ClearITPendingBit(UART_TypeDef* UARTx, u16 UART_IT)
|
480 |
|
|
{
|
481 |
|
|
/* Clear the specified interrupt */
|
482 |
|
|
UARTx->ICR &= UART_IT;
|
483 |
|
|
}
|
484 |
|
|
|
485 |
|
|
/*******************************************************************************
|
486 |
|
|
* Function Name : UART_IrDALowPowerConfig
|
487 |
|
|
* Description : Sets the IrDA low power mode
|
488 |
|
|
* Input : - IrDAx: where x can be 0,1 or 2 to select the UART/IrDA peripheral.
|
489 |
|
|
* - NewState: new state of the UARTIrDA peripheral.
|
490 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
491 |
|
|
* Output : None
|
492 |
|
|
* Return : None
|
493 |
|
|
*******************************************************************************/
|
494 |
|
|
void UART_IrDALowPowerConfig(u8 IrDAx, FunctionalState NewState)
|
495 |
|
|
{
|
496 |
|
|
UART_TypeDef* UARTx;
|
497 |
|
|
|
498 |
|
|
switch(IrDAx)
|
499 |
|
|
{
|
500 |
|
|
case IrDA0: UARTx = UART0;
|
501 |
|
|
break;
|
502 |
|
|
case IrDA1: UARTx = UART1;
|
503 |
|
|
break;
|
504 |
|
|
case IrDA2: UARTx = UART2;
|
505 |
|
|
break;
|
506 |
|
|
}
|
507 |
|
|
|
508 |
|
|
if (NewState == ENABLE)
|
509 |
|
|
{
|
510 |
|
|
UARTx->CR |= IrDA_LowPower_Enable_Mask;
|
511 |
|
|
}
|
512 |
|
|
else
|
513 |
|
|
{
|
514 |
|
|
UARTx->CR &= IrDA_LowPower_Disable_Mask;
|
515 |
|
|
}
|
516 |
|
|
}
|
517 |
|
|
|
518 |
|
|
/*******************************************************************************
|
519 |
|
|
* Function Name : UART_IrDASetCounter
|
520 |
|
|
* Description : Sets the IrDA counter divisor value.
|
521 |
|
|
* Input : - UARTx: where x can be 0,1 or 2 to select the UART/IrDA peripheral.
|
522 |
|
|
* - IrDA_Counter: IrDA counter divisor new value n low power mode(Hz).
|
523 |
|
|
* Output : None
|
524 |
|
|
* Return : None
|
525 |
|
|
*******************************************************************************/
|
526 |
|
|
void UART_IrDASetCounter(u8 IrDAx, u32 IrDA_Counter)
|
527 |
|
|
{
|
528 |
|
|
UART_TypeDef* UARTx;
|
529 |
|
|
u32 APBClock;
|
530 |
|
|
switch(IrDAx)
|
531 |
|
|
{
|
532 |
|
|
case IrDA0: UARTx = UART0;
|
533 |
|
|
break;
|
534 |
|
|
case IrDA1: UARTx = UART1;
|
535 |
|
|
break;
|
536 |
|
|
case IrDA2: UARTx = UART2;
|
537 |
|
|
break;
|
538 |
|
|
}
|
539 |
|
|
/* Get the APB frequency */
|
540 |
|
|
APBClock = (SCU_GetPCLKFreqValue())*1000;
|
541 |
|
|
/* Determine the Counter Divisor part */
|
542 |
|
|
UARTx->ILPR = (((APBClock*10) / ( IrDA_Counter)) + 5 )/10;
|
543 |
|
|
}
|
544 |
|
|
|
545 |
|
|
/*******************************************************************************
|
546 |
|
|
* Function Name : UART_IrDACmd
|
547 |
|
|
* Description : Enables or disables the UARTx’s IrDA interface.
|
548 |
|
|
* Input : - IrDAx: where x can be 0,1 or 2 to select the UART/IrDA peripheral
|
549 |
|
|
* - NewState: new state of the UARTx peripheral.
|
550 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
551 |
|
|
* Output : None
|
552 |
|
|
* Return : None
|
553 |
|
|
*******************************************************************************/
|
554 |
|
|
void UART_IrDACmd(u8 IrDAx, FunctionalState NewState)
|
555 |
|
|
{
|
556 |
|
|
UART_TypeDef* UARTx;
|
557 |
|
|
|
558 |
|
|
switch(IrDAx)
|
559 |
|
|
{
|
560 |
|
|
case IrDA0: UARTx = UART0;
|
561 |
|
|
break;
|
562 |
|
|
case IrDA1: UARTx = UART1;
|
563 |
|
|
break;
|
564 |
|
|
case IrDA2: UARTx = UART2;
|
565 |
|
|
break;
|
566 |
|
|
}
|
567 |
|
|
if(NewState == ENABLE)
|
568 |
|
|
{
|
569 |
|
|
/* Enable the IrDA mode of the specified UART */
|
570 |
|
|
UARTx->CR |= UART_IrDA_Enable_Mask;
|
571 |
|
|
}
|
572 |
|
|
else
|
573 |
|
|
{
|
574 |
|
|
/* Disable the IrDA mode of the specified UART */
|
575 |
|
|
UARTx->CR &= UART_IrDA_Disable_Mask;
|
576 |
|
|
}
|
577 |
|
|
}
|
578 |
|
|
|
579 |
|
|
/*******************************************************************************
|
580 |
|
|
* Function Name : UART_SendData
|
581 |
|
|
* Description : Transmits signle Byte of data through the UARTx peripheral.
|
582 |
|
|
* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
583 |
|
|
* - Data: the byte to transmit
|
584 |
|
|
* Output : None
|
585 |
|
|
* Return : None
|
586 |
|
|
*******************************************************************************/
|
587 |
|
|
void UART_SendData(UART_TypeDef* UARTx, u8 Data)
|
588 |
|
|
{
|
589 |
|
|
/* Transmit one byte */
|
590 |
|
|
UARTx->DR = Data;
|
591 |
|
|
}
|
592 |
|
|
|
593 |
|
|
/*******************************************************************************
|
594 |
|
|
* Function Name : UART_ReceiveData
|
595 |
|
|
* Description : Returns the most recent received Byte by the UARTx peripheral.
|
596 |
|
|
* Input : UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
597 |
|
|
* Output : None
|
598 |
|
|
* Return : The received data
|
599 |
|
|
*******************************************************************************/
|
600 |
|
|
u8 UART_ReceiveData(UART_TypeDef* UARTx)
|
601 |
|
|
{
|
602 |
|
|
/* Receive one byte */
|
603 |
|
|
return ((u8)UARTx->DR);
|
604 |
|
|
}
|
605 |
|
|
|
606 |
|
|
/*******************************************************************************
|
607 |
|
|
* Function Name : UART_SendBreak
|
608 |
|
|
* Description : Transmits break characters.
|
609 |
|
|
* Input : UARTx: where x can be 0,1 or 2 to select the UART peripheral.
|
610 |
|
|
* Output : None
|
611 |
|
|
* Return : None
|
612 |
|
|
*******************************************************************************/
|
613 |
|
|
void UART_SendBreak(UART_TypeDef* UARTx)
|
614 |
|
|
{
|
615 |
|
|
/* Send break characters */
|
616 |
|
|
UARTx->LCR |= UART_BreakChar_Mask;
|
617 |
|
|
}
|
618 |
|
|
|
619 |
|
|
/*******************************************************************************
|
620 |
|
|
* Function Name : UART_RTSConfig
|
621 |
|
|
* Description : Sets or Resets the RTS signal
|
622 |
|
|
* Input : - LevelState: new state of the RTS signal for UART0 only.
|
623 |
|
|
* This parameter can be: LowLevel or HighLevel
|
624 |
|
|
* Output : None
|
625 |
|
|
* Return : None
|
626 |
|
|
*******************************************************************************/
|
627 |
|
|
void UART_RTSConfig(UART_LevelTypeDef LevelState)
|
628 |
|
|
{
|
629 |
|
|
if(LevelState == LowLevel)
|
630 |
|
|
{
|
631 |
|
|
UART0->CR |= UART_RTS_LowLevel_Mask;
|
632 |
|
|
}
|
633 |
|
|
else
|
634 |
|
|
{
|
635 |
|
|
UART0->CR &= UART_RTS_HighLevel_Mask;
|
636 |
|
|
}
|
637 |
|
|
}
|
638 |
|
|
|
639 |
|
|
/*******************************************************************************
|
640 |
|
|
* Function Name : UART_DTRConfig
|
641 |
|
|
* Description : Sets or Resets the DTR signal for UART0 only
|
642 |
|
|
* Input : - LevelState: new state of the DTR signal.
|
643 |
|
|
* This parameter can be: LowLevel or HighLevel
|
644 |
|
|
* Output : None
|
645 |
|
|
* Return : None
|
646 |
|
|
*******************************************************************************/
|
647 |
|
|
void UART_DTRConfig(UART_LevelTypeDef LevelState)
|
648 |
|
|
{
|
649 |
|
|
if(LevelState == LowLevel)
|
650 |
|
|
{
|
651 |
|
|
UART0->CR |= UART_DTR_LowLevel_Mask;
|
652 |
|
|
}
|
653 |
|
|
else
|
654 |
|
|
{
|
655 |
|
|
UART0->CR &= UART_DTR_HighLevel_Mask;
|
656 |
|
|
}
|
657 |
|
|
}
|
658 |
|
|
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|