OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [AVR32_UC3/] [DRIVERS/] [GPIO/] [gpio.h] - Blame information for rev 589

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 589 jeremybenn
/*This file has been prepared for Doxygen automatic documentation generation.*/
2
/*! \file *********************************************************************
3
 *
4
 * \brief GPIO header for AVR32 UC3.
5
 *
6
 * This file contains basic GPIO driver functions.
7
 *
8
 * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
9
 * - Supported devices:  All AVR32 devices with a GPIO module can be used.
10
 * - AppNote:
11
 *
12
 * \author               Atmel Corporation: http://www.atmel.com \n
13
 *                       Support and FAQ: http://support.atmel.no/
14
 *
15
 *****************************************************************************/
16
 
17
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
18
 *
19
 * Redistribution and use in source and binary forms, with or without
20
 * modification, are permitted provided that the following conditions are met:
21
 *
22
 * 1. Redistributions of source code must retain the above copyright notice,
23
 * this list of conditions and the following disclaimer.
24
 *
25
 * 2. Redistributions in binary form must reproduce the above copyright notice,
26
 * this list of conditions and the following disclaimer in the documentation
27
 * and/or other materials provided with the distribution.
28
 *
29
 * 3. The name of ATMEL may not be used to endorse or promote products derived
30
 * from this software without specific prior written permission.
31
 *
32
 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
33
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
34
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
35
 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
36
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
41
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
 */
43
 
44
 
45
#ifndef _GPIO_H_
46
#define _GPIO_H_
47
 
48
#include <avr32/io.h>
49
 
50
 
51
/*! \name Return Values of the GPIO API
52
 */
53
//! @{
54
#define GPIO_SUCCESS            0 //!< Function successfully completed.
55
#define GPIO_INVALID_ARGUMENT   1 //!< Input parameters are out of range.
56
//! @}
57
 
58
 
59
/*! \name Interrupt Trigger Modes
60
 */
61
//! @{
62
#define GPIO_PIN_CHANGE         0 //!< Interrupt triggered upon pin change.
63
#define GPIO_RISING_EDGE        1 //!< Interrupt triggered upon rising edge.
64
#define GPIO_FALLING_EDGE       2 //!< Interrupt triggered upon falling edge.
65
//! @}
66
 
67
 
68
//! A type definition of pins and modules connectivity.
69
typedef struct
70
{
71
  unsigned char pin;              //!< Module pin.
72
  unsigned char function;         //!< Module function.
73
} gpio_map_t[];
74
 
75
 
76
/*! \brief Enables specific module modes for a set of pins.
77
 *
78
 * \param gpiomap The pin map.
79
 * \param size The number of pins in \a gpiomap.
80
 *
81
 * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
82
 */
83
extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
84
 
85
/*! \brief Enables a specific module mode for a pin.
86
 *
87
 * \param pin The pin number.\n
88
 *            Refer to the product header file `uc3x.h' (where x is the part
89
 *            number; e.g. x = a0512) for module pins. E.g., to enable a PWM
90
 *            channel output, the pin number can be AVR32_PWM_PWM_3_PIN for PWM
91
 *            channel 3.
92
 * \param function The pin function.\n
93
 *                 Refer to the product header file `uc3x.h' (where x is the
94
 *                 part number; e.g. x = a0512) for module pin functions. E.g.,
95
 *                 to enable a PWM channel output, the pin function can be
96
 *                 AVR32_PWM_PWM_3_FUNCTION for PWM channel 3.
97
 *
98
 * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
99
 */
100
extern int gpio_enable_module_pin(unsigned int pin, unsigned int function);
101
 
102
/*! \brief Enables the GPIO mode of a set of pins.
103
 *
104
 * \param gpiomap The pin map.
105
 * \param size The number of pins in \a gpiomap.
106
 */
107
extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
108
 
109
/*! \brief Enables the GPIO mode of a pin.
110
 *
111
 * \param pin The pin number.\n
112
 *            Refer to the product header file `uc3x.h' (where x is the part
113
 *            number; e.g. x = a0512) for pin definitions. E.g., to enable the
114
 *            GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
115
 *            AVR32_PWM_PWM_3_PIN for PWM channel 3 can also be used to release
116
 *            module pins for GPIO.
117
 */
118
extern void gpio_enable_gpio_pin(unsigned int pin);
119
 
120
/*! \brief Enables the open-drain mode of a pin.
121
 *
122
 * \param pin The pin number.
123
 */
124
extern void gpio_enable_pin_open_drain(unsigned int pin);
125
 
126
/*! \brief Disables the open-drain mode of a pin.
127
 *
128
 * \param pin The pin number.
129
 */
130
extern void gpio_disable_pin_open_drain(unsigned int pin);
131
 
132
/*! \brief Enables the pull-up resistor of a pin.
133
 *
134
 * \param pin The pin number.
135
 */
136
extern void gpio_enable_pin_pull_up(unsigned int pin);
137
 
138
/*! \brief Disables the pull-up resistor of a pin.
139
 *
140
 * \param pin The pin number.
141
 */
142
extern void gpio_disable_pin_pull_up(unsigned int pin);
143
 
144
/*! \brief Returns the value of a pin.
145
 *
146
 * \param pin The pin number.
147
 *
148
 * \return The pin value.
149
 */
150
extern int gpio_get_pin_value(unsigned int pin);
151
 
152
/*! \brief Returns the output value set for a GPIO pin.
153
 *
154
 * \param pin The pin number.
155
 *
156
 * \return The pin output value.
157
 */
158
extern int gpio_get_gpio_pin_output_value(unsigned int pin);
159
 
160
/*! \brief Drives a GPIO pin to 1.
161
 *
162
 * \param pin The pin number.
163
 */
164
extern void gpio_set_gpio_pin(unsigned int pin);
165
 
166
/*! \brief Drives a GPIO pin to 0.
167
 *
168
 * \param pin The pin number.
169
 */
170
extern void gpio_clr_gpio_pin(unsigned int pin);
171
 
172
/*! \brief Toggles a GPIO pin.
173
 *
174
 * \param pin The pin number.
175
 */
176
extern void gpio_tgl_gpio_pin(unsigned int pin);
177
 
178
/*! \brief Enables the glitch filter of a pin.
179
 *
180
 * When the glitch filter is enabled, a glitch with duration of less than 1
181
 * clock cycle is automatically rejected, while a pulse with duration of 2 clock
182
 * cycles or more is accepted. For pulse durations between 1 clock cycle and 2
183
 * clock cycles, the pulse may or may not be taken into account, depending on
184
 * the precise timing of its occurrence. Thus for a pulse to be guaranteed
185
 * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably
186
 * filtered out, its duration must not exceed 1 clock cycle. The filter
187
 * introduces 2 clock cycles latency.
188
 *
189
 * \param pin The pin number.
190
 */
191
extern void gpio_enable_pin_glitch_filter(unsigned int pin);
192
 
193
/*! \brief Disables the glitch filter of a pin.
194
 *
195
 * \param pin The pin number.
196
 */
197
extern void gpio_disable_pin_glitch_filter(unsigned int pin);
198
 
199
/*! \brief Enables the interrupt of a pin with the specified settings.
200
 *
201
 * \param pin The pin number.
202
 * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
203
 *             \ref GPIO_FALLING_EDGE).
204
 *
205
 * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
206
 */
207
extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode);
208
 
209
/*! \brief Disables the interrupt of a pin.
210
 *
211
 * \param pin The pin number.
212
 */
213
extern void gpio_disable_pin_interrupt(unsigned int pin);
214
 
215
/*! \brief Gets the interrupt flag of a pin.
216
 *
217
 * \param pin The pin number.
218
 *
219
 * \return The pin interrupt flag.
220
 */
221
extern int gpio_get_pin_interrupt_flag(unsigned int pin);
222
 
223
/*! \brief Clears the interrupt flag of a pin.
224
 *
225
 * \param pin The pin number.
226
 */
227
extern void gpio_clear_pin_interrupt_flag(unsigned int pin);
228
 
229
 
230
#endif  // _GPIO_H_

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.