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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [AVR32_UC3/] [DRIVERS/] [GPIO/] [gpio.h] - Blame information for rev 620

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1 589 jeremybenn
/*This file has been prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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 *
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 * \brief GPIO header for AVR32 UC3.
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 *
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 * This file contains basic GPIO driver functions.
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 *
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 * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
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 * - Supported devices:  All AVR32 devices with a GPIO module can be used.
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 * - AppNote:
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 *
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 * \author               Atmel Corporation: http://www.atmel.com \n
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 *                       Support and FAQ: http://support.atmel.no/
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 *
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 *****************************************************************************/
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/* Copyright (c) 2007, Atmel Corporation All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions are met:
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 *
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 * 1. Redistributions of source code must retain the above copyright notice,
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 * this list of conditions and the following disclaimer.
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 *
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 * 2. Redistributions in binary form must reproduce the above copyright notice,
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 * this list of conditions and the following disclaimer in the documentation
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 * and/or other materials provided with the distribution.
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 *
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 * 3. The name of ATMEL may not be used to endorse or promote products derived
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 * from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
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 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
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 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#ifndef _GPIO_H_
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#define _GPIO_H_
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#include <avr32/io.h>
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/*! \name Return Values of the GPIO API
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 */
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//! @{
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#define GPIO_SUCCESS            0 //!< Function successfully completed.
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#define GPIO_INVALID_ARGUMENT   1 //!< Input parameters are out of range.
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//! @}
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/*! \name Interrupt Trigger Modes
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 */
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//! @{
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#define GPIO_PIN_CHANGE         0 //!< Interrupt triggered upon pin change.
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#define GPIO_RISING_EDGE        1 //!< Interrupt triggered upon rising edge.
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#define GPIO_FALLING_EDGE       2 //!< Interrupt triggered upon falling edge.
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//! @}
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//! A type definition of pins and modules connectivity.
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typedef struct
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{
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  unsigned char pin;              //!< Module pin.
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  unsigned char function;         //!< Module function.
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} gpio_map_t[];
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/*! \brief Enables specific module modes for a set of pins.
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 *
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 * \param gpiomap The pin map.
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 * \param size The number of pins in \a gpiomap.
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 *
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 * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
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 */
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extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
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/*! \brief Enables a specific module mode for a pin.
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 *
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 * \param pin The pin number.\n
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 *            Refer to the product header file `uc3x.h' (where x is the part
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 *            number; e.g. x = a0512) for module pins. E.g., to enable a PWM
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 *            channel output, the pin number can be AVR32_PWM_PWM_3_PIN for PWM
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 *            channel 3.
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 * \param function The pin function.\n
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 *                 Refer to the product header file `uc3x.h' (where x is the
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 *                 part number; e.g. x = a0512) for module pin functions. E.g.,
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 *                 to enable a PWM channel output, the pin function can be
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 *                 AVR32_PWM_PWM_3_FUNCTION for PWM channel 3.
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 *
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 * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
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 */
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extern int gpio_enable_module_pin(unsigned int pin, unsigned int function);
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/*! \brief Enables the GPIO mode of a set of pins.
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 *
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 * \param gpiomap The pin map.
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 * \param size The number of pins in \a gpiomap.
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 */
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extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
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/*! \brief Enables the GPIO mode of a pin.
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 *
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 * \param pin The pin number.\n
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 *            Refer to the product header file `uc3x.h' (where x is the part
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 *            number; e.g. x = a0512) for pin definitions. E.g., to enable the
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 *            GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
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 *            AVR32_PWM_PWM_3_PIN for PWM channel 3 can also be used to release
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 *            module pins for GPIO.
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 */
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extern void gpio_enable_gpio_pin(unsigned int pin);
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/*! \brief Enables the open-drain mode of a pin.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_enable_pin_open_drain(unsigned int pin);
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/*! \brief Disables the open-drain mode of a pin.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_disable_pin_open_drain(unsigned int pin);
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/*! \brief Enables the pull-up resistor of a pin.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_enable_pin_pull_up(unsigned int pin);
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/*! \brief Disables the pull-up resistor of a pin.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_disable_pin_pull_up(unsigned int pin);
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/*! \brief Returns the value of a pin.
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 *
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 * \param pin The pin number.
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 *
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 * \return The pin value.
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 */
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extern int gpio_get_pin_value(unsigned int pin);
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/*! \brief Returns the output value set for a GPIO pin.
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 *
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 * \param pin The pin number.
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 *
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 * \return The pin output value.
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 */
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extern int gpio_get_gpio_pin_output_value(unsigned int pin);
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/*! \brief Drives a GPIO pin to 1.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_set_gpio_pin(unsigned int pin);
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/*! \brief Drives a GPIO pin to 0.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_clr_gpio_pin(unsigned int pin);
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/*! \brief Toggles a GPIO pin.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_tgl_gpio_pin(unsigned int pin);
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/*! \brief Enables the glitch filter of a pin.
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 *
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 * When the glitch filter is enabled, a glitch with duration of less than 1
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 * clock cycle is automatically rejected, while a pulse with duration of 2 clock
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 * cycles or more is accepted. For pulse durations between 1 clock cycle and 2
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 * clock cycles, the pulse may or may not be taken into account, depending on
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 * the precise timing of its occurrence. Thus for a pulse to be guaranteed
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 * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably
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 * filtered out, its duration must not exceed 1 clock cycle. The filter
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 * introduces 2 clock cycles latency.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_enable_pin_glitch_filter(unsigned int pin);
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/*! \brief Disables the glitch filter of a pin.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_disable_pin_glitch_filter(unsigned int pin);
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/*! \brief Enables the interrupt of a pin with the specified settings.
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 *
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 * \param pin The pin number.
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 * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
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 *             \ref GPIO_FALLING_EDGE).
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 *
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 * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
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 */
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extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode);
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/*! \brief Disables the interrupt of a pin.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_disable_pin_interrupt(unsigned int pin);
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/*! \brief Gets the interrupt flag of a pin.
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 *
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 * \param pin The pin number.
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 *
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 * \return The pin interrupt flag.
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 */
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extern int gpio_get_pin_interrupt_flag(unsigned int pin);
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/*! \brief Clears the interrupt flag of a pin.
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 *
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 * \param pin The pin number.
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 */
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extern void gpio_clear_pin_interrupt_flag(unsigned int pin);
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#endif  // _GPIO_H_

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