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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_AT91SAM3U256_IAR/] [AT91Lib/] [peripherals/] [aes/] [aes.c] - Blame information for rev 580

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Line No. Rev Author Line
1 580 jeremybenn
/* ----------------------------------------------------------------------------
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 *         ATMEL Microcontroller Software Support
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 * ----------------------------------------------------------------------------
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 * Copyright (c) 2008, Atmel Corporation
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 *
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions are met:
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 *
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 * - Redistributions of source code must retain the above copyright notice,
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 * this list of conditions and the disclaimer below.
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 *
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 * Atmel's name may not be used to endorse or promote products derived from
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 * this software without specific prior written permission.
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 *
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 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * ----------------------------------------------------------------------------
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 */
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//------------------------------------------------------------------------------
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//         Headers
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//------------------------------------------------------------------------------
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#include "aes.h"
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#include <board.h>
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#include <utility/trace.h>
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#include <utility/assert.h>
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//------------------------------------------------------------------------------
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//         Global functions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// Configures the AES peripheral to encrypt/decrypt, start mode (manual, auto,
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/// PDC) and operating mode (ECB, CBC, OFB, CFB, CTR).
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/// \param cipher  Indicates if the peripheral should encrypt or decrypt data.
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/// \param smode  Start mode.
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/// \param opmode  Operating mode.
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//------------------------------------------------------------------------------
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void AES_Configure(
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    unsigned char cipher,
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    unsigned int smode,
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    unsigned int opmode)
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{
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    TRACE_DEBUG("AES_Configure()\n\r");
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    SANITY_CHECK((cipher & 0xFFFFFFFE) == 0);
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    SANITY_CHECK((smode & 0xFFFFFCFF) == 0);
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    SANITY_CHECK((opmode & 0xFFFF8FFF) == 0);
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    // Reset the peripheral first
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    AT91C_BASE_AES->AES_CR = AT91C_AES_SWRST;
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    // Configure mode register
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    AT91C_BASE_AES->AES_MR = cipher | smode | opmode;
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}
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//------------------------------------------------------------------------------
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/// Sets the key used by the AES algorithm to cipher the plain text or
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/// decipher the encrypted text.
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/// \param pKey  Pointer to a 16-bytes cipher key.
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//------------------------------------------------------------------------------
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void AES_SetKey(const unsigned int *pKey)
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{
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    TRACE_DEBUG("AES_SetKey()\n\r");
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    SANITY_CHECK(pKey);
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    AT91C_BASE_AES->AES_KEYWxR[0] = pKey[0];
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    AT91C_BASE_AES->AES_KEYWxR[1] = pKey[1];
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    AT91C_BASE_AES->AES_KEYWxR[2] = pKey[2];
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    AT91C_BASE_AES->AES_KEYWxR[3] = pKey[3];
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}
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//------------------------------------------------------------------------------
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/// Sets the initialization vector that is used to encrypt the plain text or
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/// decrypt the cipher text in chained block modes (CBC, CFB, OFB & CTR).
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/// \param pVector  Pointer to a 16-bytes initialization vector.
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//------------------------------------------------------------------------------
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void AES_SetVector(const unsigned int *pVector)
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{
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    TRACE_DEBUG("AES_SetVector()\n\r");
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    SANITY_CHECK(pVector);
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    AT91C_BASE_AES->AES_IVxR[0] = pVector[0];
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    AT91C_BASE_AES->AES_IVxR[1] = pVector[1];
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    AT91C_BASE_AES->AES_IVxR[2] = pVector[2];
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    AT91C_BASE_AES->AES_IVxR[3] = pVector[3];
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}
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//------------------------------------------------------------------------------
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/// Sets the input data of the AES algorithm (i.e. plain text in cipher mode,
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/// ciphered text in decipher mode). If auto mode is active, the encryption is
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/// started automatically after writing the last word.
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/// \param pData  Pointer to the 16-bytes data to cipher/decipher.
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//------------------------------------------------------------------------------
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void AES_SetInputData(const unsigned int *pData)
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{
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    TRACE_DEBUG("AES_SetInputData()\n\r");
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    SANITY_CHECK(pData);
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    AT91C_BASE_AES->AES_IDATAxR[0] = pData[0];
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    AT91C_BASE_AES->AES_IDATAxR[1] = pData[1];
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    AT91C_BASE_AES->AES_IDATAxR[2] = pData[2];
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    AT91C_BASE_AES->AES_IDATAxR[3] = pData[3];
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}
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//------------------------------------------------------------------------------
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/// Stores the result of the last AES operation (encrypt/decrypt) in the
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/// provided buffer.
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/// \param pData  Pointer to a 16-bytes buffer.
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//------------------------------------------------------------------------------
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void AES_GetOutputData(unsigned int *pData)
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{
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    TRACE_DEBUG("AES_GetOutputData()\n\r");
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    SANITY_CHECK(pData);
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    pData[0] = AT91C_BASE_AES->AES_ODATAxR[0];
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    pData[1] = AT91C_BASE_AES->AES_ODATAxR[1];
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    pData[2] = AT91C_BASE_AES->AES_ODATAxR[2];
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    pData[3] = AT91C_BASE_AES->AES_ODATAxR[3];
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}
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//------------------------------------------------------------------------------
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/// Sets the input buffer to use when in PDC mode.
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/// \param pInput  Pointer to the input buffer.
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//------------------------------------------------------------------------------
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void AES_SetInputBuffer(const unsigned int *pInput)
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{
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    TRACE_DEBUG("AES_SetInputBuffer()\n\r");
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    SANITY_CHECK(pInput);
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    AT91C_BASE_AES->AES_TPR = (unsigned int) pInput;
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    AT91C_BASE_AES->AES_TCR = 4;
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}
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//------------------------------------------------------------------------------
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/// Sets the output buffer to use when in PDC mode.
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/// \param pOutput  Pointer to the output buffer.
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//------------------------------------------------------------------------------
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void AES_SetOutputBuffer(unsigned int *pOutput)
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{
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    TRACE_DEBUG("AES_SetOutputBuffer()\n\r");
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    SANITY_CHECK(pOutput);
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    AT91C_BASE_AES->AES_RPR = (unsigned int) pOutput;
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    AT91C_BASE_AES->AES_RCR = 4;
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}
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//------------------------------------------------------------------------------
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/// Starts the encryption/decryption process when in manual or PDC mode. In
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/// manual mode, the key and input data must have been entered using
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/// AES_SetKey() and AES_SetInputData(). In PDC mode, the key, input & output
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/// buffer must have been set using AES_SetKey(), AES_SetInputBuffer() and
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/// AES_SetOutputBuffer().
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//------------------------------------------------------------------------------
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void AES_Start(void)
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{
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    TRACE_DEBUG("AES_Start()\n\r");
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    SANITY_CHECK(((AT91C_BASE_AES->AES_MR & AT91C_AES_SMOD) == AT91C_AES_SMOD_MANUAL)
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                 || ((AT91C_BASE_AES->AES_MR & AT91C_AES_SMOD) == AT91C_AES_SMOD_PDC));
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    // Manual mode
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    if ((AT91C_BASE_AES->AES_MR & AT91C_AES_SMOD) == AT91C_AES_SMOD_MANUAL) {
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        AT91C_BASE_AES->AES_CR = AT91C_AES_START;
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    }
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    // PDC
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    else {
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        AT91C_BASE_AES->AES_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN;
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    }
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}
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//------------------------------------------------------------------------------
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/// Returns the current value of the AES interrupt status register.
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//------------------------------------------------------------------------------
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unsigned int AES_GetStatus(void)
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{
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    TRACE_DEBUG("AES_GetStatus()\n\r");
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    return AT91C_BASE_AES->AES_ISR;
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}
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