OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_AT91SAM3U256_IAR/] [AT91Lib/] [peripherals/] [aic/] [aic.h] - Blame information for rev 592

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 580 jeremybenn
/* ----------------------------------------------------------------------------
2
 *         ATMEL Microcontroller Software Support
3
 * ----------------------------------------------------------------------------
4
 * Copyright (c) 2008, Atmel Corporation
5
 *
6
 * All rights reserved.
7
 *
8
 * Redistribution and use in source and binary forms, with or without
9
 * modification, are permitted provided that the following conditions are met:
10
 *
11
 * - Redistributions of source code must retain the above copyright notice,
12
 * this list of conditions and the disclaimer below.
13
 *
14
 * Atmel's name may not be used to endorse or promote products derived from
15
 * this software without specific prior written permission.
16
 *
17
 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20
 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 * ----------------------------------------------------------------------------
28
 */
29
 
30
//------------------------------------------------------------------------------
31
/// \unit
32
///
33
/// !Purpose
34
/// 
35
/// Methods and definitions for configuring interrupts using the Advanced
36
/// Interrupt Controller (AIC).
37
/// 
38
/// !Usage
39
///
40
/// -# Configure an interrupt source using AIC_ConfigureIT
41
/// -# Enable or disable interrupt generation of a particular source with
42
///    AIC_EnableIT and AIC_DisableIT.
43
///
44
/// \note Most of the time, peripheral interrupts must be also configured
45
/// inside the peripheral itself.
46
//------------------------------------------------------------------------------
47
 
48
#ifndef AIC_H
49
#define AIC_H
50
 
51
//------------------------------------------------------------------------------
52
//         Headers
53
//------------------------------------------------------------------------------
54
 
55
#include <board.h>
56
 
57
//------------------------------------------------------------------------------
58
//         Definitions
59
//------------------------------------------------------------------------------
60
 
61
#ifndef AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL
62
    /// Interrupt is internal and uses a logical 1 level.
63
    #define AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE
64
#endif
65
 
66
//------------------------------------------------------------------------------
67
//         Global functions
68
//------------------------------------------------------------------------------
69
 
70
extern void AIC_ConfigureIT(unsigned int source,
71
                                   unsigned int mode,
72
                                   void (*handler)( void ));
73
 
74
extern void AIC_EnableIT(unsigned int source);
75
 
76
extern void AIC_DisableIT(unsigned int source);
77
 
78
#endif //#ifndef AIC_H
79
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.