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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_AT91SAM3U256_IAR/] [AT91Lib/] [peripherals/] [cp15/] [cp15.h] - Blame information for rev 580

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1 580 jeremybenn
/* ----------------------------------------------------------------------------
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 *         ATMEL Microcontroller Software Support
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 * ----------------------------------------------------------------------------
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 * Copyright (c) 2008, Atmel Corporation
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 *
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions are met:
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 *
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 * - Redistributions of source code must retain the above copyright notice,
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 * this list of conditions and the disclaimer below.
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 *
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 * Atmel's name may not be used to endorse or promote products derived from
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 * this software without specific prior written permission.
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 *
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 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * ----------------------------------------------------------------------------
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 */
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//------------------------------------------------------------------------------
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/// \unit
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///
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/// !Purpose
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/// 
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/// Methods to manage the Coprocessor 15. Coprocessor 15, or System Control 
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/// Coprocessor CP15, is used to configure and control all the items in the 
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/// list below:
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/// • ARM core
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/// • Caches (ICache, DCache and write buffer)
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/// • TCM
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/// • MMU
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/// • Other system options
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/// 
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/// !Usage
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///
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/// -# Enable or disable D cache with Enable_D_Cache and Disable_D_Cache
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/// -# Enable or disable I cache with Enable_I_Cache and Disable_I_Cache
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///
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//------------------------------------------------------------------------------
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#ifndef _CP15_H
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#define _CP15_H
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#ifdef CP15_PRESENT
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//-----------------------------------------------------------------------------
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//         Exported functions
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//-----------------------------------------------------------------------------
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extern void CP15_Enable_I_Cache(void);
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extern unsigned int CP15_Is_I_CacheEnabled(void);
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extern void CP15_Enable_I_Cache(void);
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extern void CP15_Disable_I_Cache(void);
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extern unsigned int CP15_Is_MMUEnabled(void);
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extern void CP15_EnableMMU(void);
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extern void CP15_DisableMMU(void);
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extern unsigned int CP15_Is_DCacheEnabled(void);
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extern void CP15_Enable_D_Cache(void);
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extern void CP15_Disable_D_Cache(void);
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//-----------------------------------------------------------------------------
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//         External functions defined in cp15.S
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//-----------------------------------------------------------------------------
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extern unsigned int _readControlRegister(void);
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extern void _writeControlRegister(unsigned int value);
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extern void _waitForInterrupt(void);
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extern void _writeTTB(unsigned int value);
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extern void _writeDomain(unsigned int value);
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extern void _writeITLBLockdown(unsigned int value);
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extern void _prefetchICacheLine(unsigned int value);
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#endif // CP15_PRESENT
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#endif // #ifndef _CP15_H
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