OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_AT91SAM3U256_IAR/] [AT91Lib/] [peripherals/] [pwmc/] [pwmc.c] - Blame information for rev 588

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 580 jeremybenn
/* ----------------------------------------------------------------------------
2
 *         ATMEL Microcontroller Software Support
3
 * ----------------------------------------------------------------------------
4
 * Copyright (c) 2008, Atmel Corporation
5
 *
6
 * All rights reserved.
7
 *
8
 * Redistribution and use in source and binary forms, with or without
9
 * modification, are permitted provided that the following conditions are met:
10
 *
11
 * - Redistributions of source code must retain the above copyright notice,
12
 * this list of conditions and the disclaimer below.
13
 *
14
 * Atmel's name may not be used to endorse or promote products derived from
15
 * this software without specific prior written permission.
16
 *
17
 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20
 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 * ----------------------------------------------------------------------------
28
 */
29
 
30
//------------------------------------------------------------------------------
31
//         Headers
32
//------------------------------------------------------------------------------
33
 
34
#include "pwmc.h"
35
#include <board.h>
36
#include <utility/assert.h>
37
#include <utility/trace.h>
38
 
39
//------------------------------------------------------------------------------
40
//         Local functions
41
//------------------------------------------------------------------------------
42
 
43
//------------------------------------------------------------------------------
44
/// Finds a prescaler/divisor couple to generate the desired frequency from
45
/// MCK.
46
/// Returns the value to enter in PWMC_MR or 0 if the configuration cannot be
47
/// met.
48
/// \param frequency  Desired frequency in Hz.
49
/// \param mck  Master clock frequency in Hz.
50
//------------------------------------------------------------------------------
51
static unsigned short FindClockConfiguration(
52
    unsigned int frequency,
53
    unsigned int mck)
54
{
55
    unsigned int divisors[11] = {1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024};
56
    unsigned char divisor = 0;
57
    unsigned int prescaler;
58
 
59
    SANITY_CHECK(frequency < mck);
60
 
61
    // Find prescaler and divisor values
62
    prescaler = (mck / divisors[divisor]) / frequency;
63
    while ((prescaler > 255) && (divisor < 11)) {
64
 
65
        divisor++;
66
        prescaler = (mck / divisors[divisor]) / frequency;
67
    }
68
 
69
    // Return result
70
    if (divisor < 11) {
71
 
72
        TRACE_DEBUG("Found divisor=%u and prescaler=%u for freq=%uHz\n\r",
73
                  divisors[divisor], prescaler, frequency);
74
        return prescaler | (divisor << 8);
75
    }
76
    else {
77
 
78
        return 0;
79
    }
80
}
81
 
82
//------------------------------------------------------------------------------
83
//         Global functions
84
//------------------------------------------------------------------------------
85
 
86
//------------------------------------------------------------------------------
87
/// Configures PWM a channel with the given parameters.
88
/// The PWM controller must have been clocked in the PMC prior to calling this
89
/// function. 
90
/// Beware: this function disables the channel. It waits until disable is effective.
91
/// \param channel  Channel number.
92
/// \param prescaler  Channel prescaler.
93
/// \param alignment  Channel alignment.
94
/// \param polarity  Channel polarity.
95
//------------------------------------------------------------------------------
96
void PWMC_ConfigureChannel(
97
    unsigned char channel,
98
    unsigned int prescaler,
99
    unsigned int alignment,
100
    unsigned int polarity)
101
{
102
    SANITY_CHECK(prescaler < AT91C_PWMC_CPRE_MCKB);
103
    SANITY_CHECK((alignment & ~AT91C_PWMC_CALG) == 0);
104
    SANITY_CHECK((polarity & ~AT91C_PWMC_CPOL) == 0);
105
 
106
    // Disable channel (effective at the end of the current period)
107
    if ((AT91C_BASE_PWMC->PWMC_SR & (1 << channel)) != 0) {
108
        AT91C_BASE_PWMC->PWMC_DIS = 1 << channel;
109
        while ((AT91C_BASE_PWMC->PWMC_SR & (1 << channel)) != 0);
110
    }
111
 
112
    // Configure channel
113
    AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CMR = prescaler | alignment | polarity;
114
}
115
 
116
//------------------------------------------------------------------------------
117
/// Configures PWM clocks A & B to run at the given frequencies. This function
118
/// finds the best MCK divisor and prescaler values automatically.
119
/// \param clka  Desired clock A frequency (0 if not used).
120
/// \param clkb  Desired clock B frequency (0 if not used).
121
/// \param mck  Master clock frequency.
122
//------------------------------------------------------------------------------
123
void PWMC_ConfigureClocks(unsigned int clka, unsigned int clkb, unsigned int mck)
124
{
125
    unsigned int mode = 0;
126
    unsigned int result;
127
 
128
    // Clock A
129
    if (clka != 0) {
130
 
131
        result = FindClockConfiguration(clka, mck);
132
        ASSERT(result != 0, "-F- Could not generate the desired PWM frequency (%uHz)\n\r", clka);
133
        mode |= result;
134
    }
135
 
136
    // Clock B
137
    if (clkb != 0) {
138
 
139
        result = FindClockConfiguration(clkb, mck);
140
        ASSERT(result != 0, "-F- Could not generate the desired PWM frequency (%uHz)\n\r", clkb);
141
        mode |= (result << 16);
142
    }
143
 
144
    // Configure clocks
145
    TRACE_DEBUG("Setting PWMC_MR = 0x%08X\n\r", mode);
146
    AT91C_BASE_PWMC->PWMC_MR = mode;
147
}
148
 
149
//------------------------------------------------------------------------------
150
/// Sets the period value used by a PWM channel. This function writes directly
151
/// to the CPRD register if the channel is disabled; otherwise, it uses the
152
/// update register CUPD.
153
/// \param channel  Channel number.
154
/// \param period  Period value.
155
//------------------------------------------------------------------------------
156
void PWMC_SetPeriod(unsigned char channel, unsigned short period)
157
{
158
    // If channel is disabled, write to CPRD
159
    if ((AT91C_BASE_PWMC->PWMC_SR & (1 << channel)) == 0) {
160
 
161
        AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CPRDR = period;
162
    }
163
    // Otherwise use update register
164
    else {
165
 
166
        AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CMR |= AT91C_PWMC_CPD;
167
        AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CUPDR = period;
168
    }
169
}
170
 
171
//------------------------------------------------------------------------------
172
/// Sets the duty cycle used by a PWM channel. This function writes directly to
173
/// the CDTY register if the channel is disabled; otherwise it uses the
174
/// update register CUPD.
175
/// Note that the duty cycle must always be inferior or equal to the channel
176
/// period.
177
/// \param channel  Channel number.
178
/// \param duty  Duty cycle value.
179
//------------------------------------------------------------------------------
180
void PWMC_SetDutyCycle(unsigned char channel, unsigned short duty)
181
{
182
    SANITY_CHECK(duty <= AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CPRDR);
183
 
184
    // SAM7S errata
185
#if defined(at91sam7s16) || defined(at91sam7s161) || defined(at91sam7s32) \
186
    || defined(at91sam7s321) || defined(at91sam7s64) || defined(at91sam7s128) \
187
    || defined(at91sam7s256) || defined(at91sam7s512)
188
    ASSERT(duty > 0, "-F- Duty cycle value 0 is not permitted on SAM7S chips.\n\r");
189
    ASSERT((duty > 1) || (AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CMR & AT91C_PWMC_CALG),
190
           "-F- Duty cycle value 1 is not permitted in left-aligned mode on SAM7S chips.\n\r");
191
#endif
192
 
193
    // If channel is disabled, write to CDTY
194
    if ((AT91C_BASE_PWMC->PWMC_SR & (1 << channel)) == 0) {
195
 
196
        AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CDTYR = duty;
197
    }
198
    // Otherwise use update register
199
    else {
200
 
201
        AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CMR &= ~AT91C_PWMC_CPD;
202
        AT91C_BASE_PWMC->PWMC_CH[channel].PWMC_CUPDR = duty;
203
    }
204
}
205
 
206
//------------------------------------------------------------------------------
207
/// Enables the given PWM channel. This does NOT enable the corresponding pin;
208
/// this must be done in the user code.
209
/// \param channel  Channel number.
210
//------------------------------------------------------------------------------
211
void PWMC_EnableChannel(unsigned char channel)
212
{
213
    AT91C_BASE_PWMC->PWMC_ENA = 1 << channel;
214
}
215
 
216
//------------------------------------------------------------------------------
217
/// Disables the given PWM channel.
218
/// Beware, channel will be effectively disabled at the end of the current period.
219
/// Application can check channel is disabled using the following wait loop:
220
/// while ((AT91C_BASE_PWMC->PWMC_SR & (1 << channel)) != 0);
221
/// \param channel  Channel number.
222
//------------------------------------------------------------------------------
223
void PWMC_DisableChannel(unsigned char channel)
224
{
225
    AT91C_BASE_PWMC->PWMC_DIS = 1 << channel;
226
}
227
 
228
//------------------------------------------------------------------------------
229
/// Enables the period interrupt for the given PWM channel.
230
/// \param channel  Channel number.
231
//------------------------------------------------------------------------------
232
void PWMC_EnableChannelIt(unsigned char channel)
233
{
234
    AT91C_BASE_PWMC->PWMC_IER = 1 << channel;
235
}
236
 
237
//------------------------------------------------------------------------------
238
/// Disables the period interrupt for the given PWM channel.
239
/// \param channel  Channel number.
240
//------------------------------------------------------------------------------
241
void PWMC_DisableChannelIt(unsigned char channel)
242
{
243
    AT91C_BASE_PWMC->PWMC_IDR = 1 << channel;
244
}
245
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.