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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_AT91SAM3U256_IAR/] [system/] [at91sam3u4/] [sram.icf] - Blame information for rev 580

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Line No. Rev Author Line
1 580 jeremybenn
/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
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/*-Vector table start*/
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define symbol __ICFEDIT_vector_start__ = 0x20000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_RAM0_start__  = 0x20000000;
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define symbol __ICFEDIT_region_RAM0_end__    = 0x20007FFF;
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define symbol __ICFEDIT_region_RAM1_start__  = 0x20080000;
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define symbol __ICFEDIT_region_RAM1_end__    = 0x20083FFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__        = 0x400;
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define symbol __ICFEDIT_size_heap__          = 0x200;
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/*-Exports-*/
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export symbol __ICFEDIT_vector_start__;
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size   = 4G;
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define region RAM0_region     = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
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define region RAM1_region     = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
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/*define region RAM_region      = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
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                                mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/
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/* define block RamVect   with alignment = 8, size = __ICFEDIT_size_vectors__  { }; */
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define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
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define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
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initialize by copy { readwrite };
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do not initialize  { section .noinit };
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place at address mem:__ICFEDIT_vector_start__ { readonly section .vectors };
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place in RAM0_region          { readonly };
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place in RAM1_region          { readwrite, block CSTACK, block HEAP };

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