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jeremybenn |
/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2008, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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//------------------------------------------------------------------------------
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/// \dir
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/// !Purpose
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///
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/// Definition and functions for using AT91SAM3UE-related features, such
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/// has PIO pins, memories, etc.
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///
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/// !Usage
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/// -# The code for booting the board is provided by board_cstartup.S and
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/// board_lowlevel.c.
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/// -# For using board PIOs, board characteristics (clock, etc.) and external
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/// components, see board.h.
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/// -# For manipulating memories (remapping, SDRAM, etc.), see board_memories.h.
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \unit
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/// !Purpose
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///
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/// Definition of AT91SAM3UE-EK characteristics, AT91SAM3UE-dependant PIOs and
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/// external components interfacing.
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///
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/// !Usage
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/// -# For operating frequency information, see "SAM3UE-EK - Operating frequencies".
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/// -# For using portable PIO definitions, see "SAM3UE-EK - PIO definitions".
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/// -# Several USB definitions are included here (see "SAM3UE-EK - USB device").
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//------------------------------------------------------------------------------
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#ifndef BOARD_H
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#define BOARD_H
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//------------------------------------------------------------------------------
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// Headers
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//------------------------------------------------------------------------------
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#if defined(at91sam3u4)
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#include "at91sam3u4/chip.h"
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#include "at91sam3u4/AT91SAM3U4.h"
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#else
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#error Board does not support the specified chip.
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#endif
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//------------------------------------------------------------------------------
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// Definitions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \page "SAM3UE-EK - Board Description"
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/// This page lists several definition related to the board description.
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///
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/// !Definitions
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/// - BOARD_NAME
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/// Name of the board.
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#define BOARD_NAME "AT91SAM3U-EK"
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/// Board definition.
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#define at91sam3uek
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/// Family definition (already defined).
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#define at91sam3u
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/// Core definition
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#define cortexm3
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// Chip type
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//#define fpgasimulation
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//------------------------------------------------------------------------------
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#if defined(fpgasimulation)
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#define PMC_BY_HARD
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#endif
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//------------------------------------------------------------------------------
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/// \page "SAM3UE-EK - Operating frequencies"
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/// This page lists several definition related to the board operating frequency
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/// (when using the initialization done by board_lowlevel.c).
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///
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/// !Definitions
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/// - BOARD_MAINOSC
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/// - BOARD_MCK
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/// Frequency of the board main oscillator.
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#define BOARD_MAINOSC 12000000
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/// Master clock frequency (when using board_lowlevel.c).
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#if !defined(fpgasimulation)
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#define BOARD_MCK 48000000
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#else
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#define BOARD_MCK 22579200
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#endif
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#if defined (fpgasimulation)
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//#define BOARD_ConfigureSdram(...) { }
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#endif // fpgasimulation
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//------------------------------------------------------------------------------
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// ADC
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//------------------------------------------------------------------------------
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/// ADC clock frequency, at 10-bit resolution (in Hz)
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#define ADC_MAX_CK_10BIT 5000000
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/// Startup time max, return from Idle mode (in µs)
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#define ADC_STARTUP_TIME_MAX 15
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/// Track and hold Acquisition Time min (in ns)
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#define ADC_TRACK_HOLD_TIME_MIN 1200
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \page "SAM3UE-EK - USB device"
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/// This page lists constants describing several characteristics (controller
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/// type, D+ pull-up type, etc.) of the USB device controller of the chip/board.
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///
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/// !Constants
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/// - BOARD_USB_UDP
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/// - BOARD_USB_PULLUP_EXTERNAL
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/// - BOARD_USB_NUMENDPOINTS
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/// - BOARD_USB_ENDPOINTS_MAXPACKETSIZE
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/// - BOARD_USB_ENDPOINTS_BANKS
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/// Chip has a UDP controller.
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#define BOARD_USB_UDPHS
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/// Indicates the D+ pull-up is external.
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#define BOARD_USB_PULLUP_INTERNAL
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/// Number of endpoints in the USB controller.
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#define BOARD_USB_NUMENDPOINTS 7
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/// Returns the maximum packet size of the given endpoint.
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#define BOARD_USB_ENDPOINTS_MAXPACKETSIZE(i) (((i == 0)||(i == 3)||(i == 4)) ? 64 :\
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(((i == 1) || (i == 2)) ? 512 : 1024))
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/// Returns the number of FIFO banks for the given endpoint.
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#define BOARD_USB_ENDPOINTS_BANKS(i) ((i == 0) ? 1 : ((i == 1) || (i == 2)) ? 2 : 3)
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/// USB attributes configuration descriptor (bus or self powered, remote wakeup)
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#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
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//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// \page "SAM3UE-EK - PIO definitions"
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/// This pages lists all the pio definitions contained in board.h. The constants
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/// are named using the following convention: PIN_* for a constant which defines
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/// a single Pin instance (but may include several PIOs sharing the same
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/// controller), and PINS_* for a list of Pin instances.
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///
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/// !ADC
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/// - PIN_ADC0_AD0
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/// - PIN_ADC0_AD1
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/// - PIN_ADC0_AD2
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/// - PIN_ADC0_AD3
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/// - PIN_ADC0_AD4
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/// - PIN_ADC0_AD5
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/// - PIN_ADC0_AD6
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/// - PIN_ADC0_AD7
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/// - PINS_ADC0
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///
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/// !CAN
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/// - PIN_CAN_TRANSCEIVER_RS
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/// - PIN_CAN1_TRANSCEIVER_TXD
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/// - PIN_CAN1_TRANSCEIVER_RXD
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/// - PIN_CAN2_TRANSCEIVER_TXD
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/// - PIN_CAN2_TRANSCEIVER_RXD
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/// - PINS_CAN_TRANSCEIVER_TXD
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/// - PINS_CAN_TRANSCEIVER_RXD
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///
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/// !DBGU
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/// - PINS_DBGU
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///
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/// !Joystick buttons
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/// - PIN_JOYSTICK_UP
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/// - PIN_JOYSTICK_DOWN
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/// - PIN_JOYSTICK_LEFT
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/// - PIN_JOYSTICK_RIGHT
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/// - PIN_JOYSTICK_LCLIC, PIN_JOYSTICK_PUSH
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/// - PINS_JOYSTICK_MOVE, PINS_JOYSTICK_CLIC, PINS_JOYSTICK
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/// - JOYSTICK_UP
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/// - JOYSTICK_DOWN
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/// - JOYSTICK_LEFT
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/// - JOYSTICK_RIGHT
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/// - JOYSTICK_LCLIC, JOYSTICK_PUSH
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///
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/// !EBI
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/// - PIN_EBI_DATA_BUS
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/// - PIN_EBI_NCS0
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/// - PIN_EBI_NRD
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/// - PIN_EBI_NWE
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/// - PIN_EBI_ADDR_BUS
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/// - PIN_EBI_PSRAM_NBS
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/// - PIN_EBI_A1
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/// - PIN_EBI_LCD_RS
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///
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/// !LEDs
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/// - PIN_LED_DS1
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/// - PIN_LED_DS2
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/// - PIN_LED_DS3
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/// - PIN_LED_DS4
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/// - PINS_LEDS
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/// - LED_DS1
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/// - LED_DS2
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/// - LED_DS3
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/// - LED_DS4
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///
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/// !MCI
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/// - PINS_MCI
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///
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/// !Push buttons
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/// - PIN_PUSHBUTTON_1
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/// - PIN_PUSHBUTTON_2
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/// - PIN_PUSHBUTTON_3
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/// - PIN_PUSHBUTTON_4
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/// - PINS_PUSHBUTTONS
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/// - PUSHBUTTON_BP1
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/// - PUSHBUTTON_BP2
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/// - PUSHBUTTON_BP3
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/// - PUSHBUTTON_BP4
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///
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/// !PWMC
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/// - PIN_PWMC_PWM0
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/// - PIN_PWMC_PWM1
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/// - PIN_PWMC_PWM2
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/// - PIN_PWMC_PWM3
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/// - PIN_PWMC_PWM4
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/// - PIN_PWMC_PWM5
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/// - PIN_PWMC_PWM6
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/// - PIN_PWMC_PWM7
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/// - PIN_PWM_LED0
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/// - PIN_PWM_LED1
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/// - CHANNEL_PWM_LED0
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/// - CHANNEL_PWM_LED1
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///
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/// !SPI0
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/// - PIN_SPI0_MISO
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/// - PIN_SPI0_MOSI
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/// - PIN_SPI0_SPCK
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/// - PINS_SPI0
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/// - PIN_SPI0_NPCS3
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///
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/// !SPI1
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/// - PIN_SPI1_MISO
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/// - PIN_SPI1_MOSI
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/// - PIN_SPI1_SPCK
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/// - PINS_SPI1
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/// - PIN_SPI1_NPCS3
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///
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/// ! SSC
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/// - PIN_SSC_TD
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/// - PIN_SSC_TK
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/// - PIN_SSC_TF
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/// - PINS_SSC_CODEC
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///
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/// ! PCK0
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/// - PIN_PCK0
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///
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/// !TWI
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/// - PIN_TWI_TWD0
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/// - PIN_TWI_TWCK0
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/// - PINS_TWI
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///
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/// !USART0
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/// - PIN_USART0_RXD
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/// - PIN_USART0_TXD
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/// - PIN_USART0_CTS
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/// - PIN_USART0_RTS
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/// - PIN_USART0_SCK
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///
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/// !USB
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/// - PIN_USB_PULLUP
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///
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/// ADC_AD0 pin definition.
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#define PIN_ADC0_AD0 {1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
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/// ADC_AD1 pin definition.
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#define PIN_ADC0_AD1 {1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
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/// ADC_AD2 pin definition.
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#define PIN_ADC0_AD2 {1 << 3, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT}
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/// ADC_AD3 pin definition.
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#define PIN_ADC0_AD3 {1 << 4, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT}
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/// ADC_AD4 pin definition.
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#define PIN_ADC0_AD4 {1 << 15, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
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/// ADC_AD5 pin definition.
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#define PIN_ADC0_AD5 {1 << 16, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
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/// ADC_AD6 pin definition.
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#define PIN_ADC0_AD6 {1 << 17, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
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/// ADC_AD7 pin definition.
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#define PIN_ADC0_AD7 {1 << 18, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
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/// Pins ADC
|
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#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7
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/// CAN Definition
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/// RS: Select input for high speed mode or silent mode
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//#define PIN_CAN_TRANSCEIVER_RS {1<<23, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
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//
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///// TXD: Transmit data input
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//#define PIN_CAN1_TRANSCEIVER_TXD {1<<27, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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///// RXD: Receive data output
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//#define PIN_CAN1_TRANSCEIVER_RXD {1<<26, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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/// TXD: Transmit data input
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//#define PIN_CAN2_TRANSCEIVER_TXD {1<<29, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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///// RXD: Receive data output
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//#define PIN_CAN2_TRANSCEIVER_RXD {1<<28, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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///// TXD pins
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//#define PINS_CAN_TRANSCEIVER_TXD PIN_CAN1_TRANSCEIVER_TXD, PIN_CAN2_TRANSCEIVER_TXD
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|
///// RXD pins
|
333 |
|
|
//#define PINS_CAN_TRANSCEIVER_RXD PIN_CAN1_TRANSCEIVER_RXD, PIN_CAN2_TRANSCEIVER_RXD
|
334 |
|
|
|
335 |
|
|
/// DBGU pins (DTXD and DRXD) definitions, PA11,12.
|
336 |
|
|
#define PINS_DBGU {0x00001800, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
337 |
|
|
|
338 |
|
|
/// EBI
|
339 |
|
|
#define PIN_EBI_DATA_BUS {0xfe01fe00, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}, \
|
340 |
|
|
{1 << 6, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}
|
341 |
|
|
#define PIN_EBI_NCS0 {1 << 20, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
342 |
|
|
#define PIN_EBI_NRD {1 << 19, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
343 |
|
|
#define PIN_EBI_NWE {1 << 23, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
344 |
|
|
#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
345 |
|
|
#define PIN_EBI_PSRAM_NBS {1 << 7, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \
|
346 |
|
|
{1 << 15, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
347 |
|
|
#define PIN_EBI_A1 {1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}
|
348 |
|
|
|
349 |
|
|
#define PIN_EBI_NCS2 {1 << 16, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
350 |
|
|
#define PIN_EBI_LCD_RS {1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}
|
351 |
|
|
|
352 |
|
|
|
353 |
|
|
/// LED #0 pin definition.
|
354 |
|
|
#define PIN_LED_0 {1 << 0, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT}
|
355 |
|
|
/// LED #1 pin definition.
|
356 |
|
|
#define PIN_LED_1 {1 << 2, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT}
|
357 |
|
|
/// LED #2 pin definition.
|
358 |
|
|
#define PIN_LED_2 {1 << 1, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT}
|
359 |
|
|
/// List of all LEDs definitions.
|
360 |
|
|
#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2
|
361 |
|
|
|
362 |
|
|
///// MCI pins definition.
|
363 |
|
|
#define PINS_MCI {0x1f8, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \
|
364 |
|
|
{1 << 3, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
365 |
|
|
|
366 |
|
|
/// MCI pin Card Detect
|
367 |
|
|
#define PIN_MCI_CD \
|
368 |
|
|
{AT91C_PIO_PA25, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
369 |
|
|
|
370 |
|
|
/// Push button #0 definition.
|
371 |
|
|
#define PIN_PUSHBUTTON_1 {1 << 18, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEGLITCH | PIO_PULLUP}
|
372 |
|
|
/// Push button #1 definition.
|
373 |
|
|
#define PIN_PUSHBUTTON_2 {1 << 19, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEGLITCH | PIO_PULLUP}
|
374 |
|
|
/// Push button #2 definition
|
375 |
|
|
/// List of all push button definitions.
|
376 |
|
|
#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2
|
377 |
|
|
|
378 |
|
|
/// Push button #1 index.
|
379 |
|
|
#define PUSHBUTTON_BP1 0
|
380 |
|
|
/// Push button #2 index.
|
381 |
|
|
#define PUSHBUTTON_BP2 1
|
382 |
|
|
|
383 |
|
|
/// Simulated joystick LEFT index.
|
384 |
|
|
#define JOYSTICK_LEFT 0
|
385 |
|
|
/// Simulated joystick RIGHT index.
|
386 |
|
|
#define JOYSTICK_RIGHT 1
|
387 |
|
|
|
388 |
|
|
/// SPI0 MISO pin definition.
|
389 |
|
|
#define PIN_SPI0_MISO {1 << 13, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
390 |
|
|
/// SPI0 MOSI pin definition.
|
391 |
|
|
#define PIN_SPI0_MOSI {1 << 14, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
392 |
|
|
/// SPI0 SPCK pin definition.
|
393 |
|
|
#define PIN_SPI0_SPCK {1 << 15, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
394 |
|
|
/// SPI0 chip select 2 pin definition.
|
395 |
|
|
//#define PIN_SPI0_NPCS2_PC14 {1 << 14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
396 |
|
|
#define PIN_SPI0_NPCS2_PC14 {1 << 14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_OUTPUT_0, PIO_PULLUP}
|
397 |
|
|
/// List of SPI0 pin definitions (MISO, MOSI & SPCK).
|
398 |
|
|
#define PINS_SPI0 PIN_SPI0_MISO, PIN_SPI0_MOSI, PIN_SPI0_SPCK
|
399 |
|
|
|
400 |
|
|
/// SSC pins definition.
|
401 |
|
|
#define PIN_SSC_TD {0x1 << 26, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
402 |
|
|
#define PIN_SSC_TK {0x1 << 28, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
403 |
|
|
#define PIN_SSC_TF {0x1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
404 |
|
|
#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF
|
405 |
|
|
|
406 |
|
|
/// PCK0
|
407 |
|
|
#define PIN_PCK0 {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
408 |
|
|
|
409 |
|
|
/// TWI pins definition.
|
410 |
|
|
#define TWI_V3XX
|
411 |
|
|
#define PIN_TWI_TWD0 {0x1 << 9, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
412 |
|
|
#define PIN_TWI_TWCK0 {0x1 << 10, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
413 |
|
|
#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0
|
414 |
|
|
#define PIN_TWI_TWD1 {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
415 |
|
|
#define PIN_TWI_TWCK1 {0x1 << 25, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
416 |
|
|
#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1
|
417 |
|
|
|
418 |
|
|
/// USART0
|
419 |
|
|
#define PIN_USART0_RXD {0x1 << 19, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
420 |
|
|
#define PIN_USART0_TXD {0x1 << 18, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
421 |
|
|
#define PIN_USART0_CTS {0x1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
422 |
|
|
#define PIN_USART0_RTS {0x1 << 7, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
423 |
|
|
#define PIN_USART0_SCK {0x1 << 17, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
424 |
|
|
|
425 |
|
|
/// USART1
|
426 |
|
|
#define PIN_USART1_RXD {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
427 |
|
|
#define PIN_USART1_TXD {0x1 << 20, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
428 |
|
|
#define PIN_USART1_CTS {0x1 << 23, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
429 |
|
|
#define PIN_USART1_RTS {0x1 << 22, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
430 |
|
|
#define PIN_USART1_SCK {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
431 |
|
|
|
432 |
|
|
/// USB VBus monitoring pin definition.
|
433 |
|
|
#define PIN_USB_VBUS {1 << 31, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
434 |
|
|
|
435 |
|
|
//------------------------------------------------------------------------------
|
436 |
|
|
|
437 |
|
|
//------------------------------------------------------------------------------
|
438 |
|
|
/// \page "SAM3UE-EK - External components"
|
439 |
|
|
/// This page lists the definitions related to external on-board components
|
440 |
|
|
/// located in the board.h file for the AT91SAM3UE-EK.
|
441 |
|
|
///
|
442 |
|
|
/// !AT45 Dataflash Card
|
443 |
|
|
/// - BOARD_AT45_A_SPI_BASE
|
444 |
|
|
/// - BOARD_AT45_A_SPI_ID
|
445 |
|
|
/// - BOARD_AT45_A_SPI_PINS
|
446 |
|
|
/// - BOARD_AT45_A_SPI
|
447 |
|
|
/// - BOARD_AT45_A_NPCS
|
448 |
|
|
/// - BOARD_AT45_A_NPCS_PIN
|
449 |
|
|
///
|
450 |
|
|
/// !AT45 Dataflash (serial onboard DataFlash)
|
451 |
|
|
/// - BOARD_AT45_B_SPI_BASE
|
452 |
|
|
/// - BOARD_AT45_B_SPI_ID
|
453 |
|
|
/// - BOARD_AT45_B_SPI_PINS
|
454 |
|
|
/// - BOARD_AT45_B_SPI
|
455 |
|
|
/// - BOARD_AT45_B_NPCS
|
456 |
|
|
/// - BOARD_AT45_B_NPCS_PIN
|
457 |
|
|
///
|
458 |
|
|
/// !AT26 Serial Flash
|
459 |
|
|
/// - BOARD_AT26_A_SPI_BASE
|
460 |
|
|
/// - BOARD_AT26_A_SPI_ID
|
461 |
|
|
/// - BOARD_AT26_A_SPI_PINS
|
462 |
|
|
/// - BOARD_AT26_A_SPI
|
463 |
|
|
/// - BOARD_AT26_A_NPCS
|
464 |
|
|
/// - BOARD_AT26_A_NPCS_PIN
|
465 |
|
|
///
|
466 |
|
|
/// !SD Card
|
467 |
|
|
/// - MCI2_INTERFACE
|
468 |
|
|
/// - BOARD_SD_MCI_BASE
|
469 |
|
|
/// - BOARD_SD_MCI_ID
|
470 |
|
|
/// - BOARD_SD_PINS
|
471 |
|
|
/// - BOARD_SD_SLOT
|
472 |
|
|
///
|
473 |
|
|
/// !PSRAM
|
474 |
|
|
/// - BOARD_PSRAM_PINS
|
475 |
|
|
/// - BOARD_LCD_PINS
|
476 |
|
|
|
477 |
|
|
/// Base address of SPI peripheral connected to the dataflash.
|
478 |
|
|
//#define BOARD_AT45_A_SPI_BASE AT91C_BASE_SPI0
|
479 |
|
|
///// Identifier of SPI peripheral connected to the dataflash.
|
480 |
|
|
//#define BOARD_AT45_A_SPI_ID AT91C_ID_SPI0
|
481 |
|
|
///// Pins of the SPI peripheral connected to the dataflash.
|
482 |
|
|
//#define BOARD_AT45_A_SPI_PINS PINS_SPI0
|
483 |
|
|
///// Dataflahs SPI number.
|
484 |
|
|
//#define BOARD_AT45_A_SPI 0
|
485 |
|
|
///// Chip select connected to the dataflash.
|
486 |
|
|
//#define BOARD_AT45_A_NPCS 3
|
487 |
|
|
///// Chip select pin connected to the dataflash.
|
488 |
|
|
//#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3
|
489 |
|
|
|
490 |
|
|
/// Base address of SPI peripheral connected to the dataflash.
|
491 |
|
|
//#define BOARD_AT45_B_SPI_BASE AT91C_BASE_SPI1
|
492 |
|
|
///// Identifier of SPI peripheral connected to the dataflash.
|
493 |
|
|
//#define BOARD_AT45_B_SPI_ID AT91C_ID_SPI1
|
494 |
|
|
///// Pins of the SPI peripheral connected to the dataflash.
|
495 |
|
|
//#define BOARD_AT45_B_SPI_PINS PINS_SPI1
|
496 |
|
|
///// Dataflahs SPI number.
|
497 |
|
|
//#define BOARD_AT45_B_SPI 1
|
498 |
|
|
///// Chip select connected to the dataflash.
|
499 |
|
|
//#define BOARD_AT45_B_NPCS 3
|
500 |
|
|
///// Chip select pin connected to the dataflash.
|
501 |
|
|
//#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3
|
502 |
|
|
|
503 |
|
|
/// Base address of SPI peripheral connected to the serialflash.
|
504 |
|
|
//#define BOARD_AT26_A_SPI_BASE AT91C_BASE_SPI0
|
505 |
|
|
///// Identifier of SPI peripheral connected to the serialflash.
|
506 |
|
|
//#define BOARD_AT26_A_SPI_ID AT91C_ID_SPI0
|
507 |
|
|
///// Pins of the SPI peripheral connected to the serialflash.
|
508 |
|
|
//#define BOARD_AT26_A_SPI_PINS PINS_SPI0
|
509 |
|
|
///// Serialflash SPI number.
|
510 |
|
|
//#define BOARD_AT26_A_SPI 0
|
511 |
|
|
///// Chip select connected to the serialflash.
|
512 |
|
|
//#define BOARD_AT26_A_NPCS 3
|
513 |
|
|
///// Chip select pin connected to the serialflash.
|
514 |
|
|
//#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3
|
515 |
|
|
|
516 |
|
|
/// HS MCI interface
|
517 |
|
|
#define MCI2_INTERFACE
|
518 |
|
|
/// Base address of the MCI peripheral connected to the SD card.
|
519 |
|
|
#define BOARD_SD_MCI_BASE AT91C_BASE_MCI0//AT91C_BASE_MCI
|
520 |
|
|
///// Peripheral identifier of the MCI connected to the SD card.
|
521 |
|
|
#define BOARD_SD_MCI_ID AT91C_ID_MCI0 //AT91C_ID_MCI
|
522 |
|
|
///// MCI pins that shall be configured to access the SD card.
|
523 |
|
|
#define BOARD_SD_PINS PINS_MCI
|
524 |
|
|
///// MCI slot to which the SD card is connected to.
|
525 |
|
|
#define BOARD_SD_SLOT MCI_SD_SLOTA
|
526 |
|
|
///// MCI Card Detect pin.
|
527 |
|
|
#define BOARD_SD_PIN_CD PIN_MCI_CD
|
528 |
|
|
|
529 |
|
|
#define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \
|
530 |
|
|
PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1
|
531 |
|
|
|
532 |
|
|
/// Indicates board has an HX8347 external component to manage LCD.
|
533 |
|
|
#define BOARD_LCD_HX8347
|
534 |
|
|
|
535 |
|
|
/// LCD pins definition.
|
536 |
|
|
#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_LCD_RS, PIN_EBI_NRD, PIN_EBI_NWE, \
|
537 |
|
|
PIN_EBI_NCS2
|
538 |
|
|
/// Backlight pin definition.
|
539 |
|
|
#define BOARD_BACKLIGHT_PIN {1 << 19, AT91C_BASE_PIOC, AT91C_ID_PIOC, \
|
540 |
|
|
PIO_OUTPUT_0, PIO_DEFAULT}
|
541 |
|
|
/// Define HX8347 base address.
|
542 |
|
|
#define BOARD_LCD_BASE 0x62000000
|
543 |
|
|
/// Define HX8347 register select signal.
|
544 |
|
|
#define BOARD_LCD_RS (1 << 1)
|
545 |
|
|
/// Display width in pixels.
|
546 |
|
|
#define BOARD_LCD_WIDTH 240
|
547 |
|
|
/// Display height in pixels.
|
548 |
|
|
#define BOARD_LCD_HEIGHT 320
|
549 |
|
|
|
550 |
|
|
/// Indicates board has an ADS7843 external component to manage Touch Screen
|
551 |
|
|
#define BOARD_TSC_ADS7843
|
552 |
|
|
|
553 |
|
|
/// Touchscreen controller IRQ pin definition.
|
554 |
|
|
#define PIN_TCS_IRQ {AT91C_PIO_PA24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
555 |
|
|
/// Touchscreen controller Busy pin definition.
|
556 |
|
|
#define PIN_TCS_BUSY {AT91C_PIO_PA2, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
557 |
|
|
|
558 |
|
|
/// Base address of SPI peripheral connected to the touchscreen controller.
|
559 |
|
|
#define BOARD_TSC_SPI_BASE AT91C_BASE_SPI0
|
560 |
|
|
/// Identifier of SPI peripheral connected to the touchscreen controller.
|
561 |
|
|
#define BOARD_TSC_SPI_ID AT91C_ID_SPI0
|
562 |
|
|
/// Pins of the SPI peripheral connected to the touchscreen controller.
|
563 |
|
|
#define BOARD_TSC_SPI_PINS PINS_SPI0
|
564 |
|
|
/// Chip select connected to the touchscreen controller.
|
565 |
|
|
#define BOARD_TSC_NPCS 2//2
|
566 |
|
|
/// Chip select pin connected to the touchscreen controller.
|
567 |
|
|
#define BOARD_TSC_NPCS_PIN PIN_SPI0_NPCS2_PC14
|
568 |
|
|
|
569 |
|
|
//------------------------------------------------------------------------------
|
570 |
|
|
|
571 |
|
|
//------------------------------------------------------------------------------
|
572 |
|
|
/// \page "SAM3UE-EK - Memories"
|
573 |
|
|
/// This page lists definitions related to internal & external on-board memories.
|
574 |
|
|
///
|
575 |
|
|
/// !Embedded Flash
|
576 |
|
|
/// - BOARD_FLASH_EFC
|
577 |
|
|
|
578 |
|
|
/// Internal SRAM address
|
579 |
|
|
#define AT91C_ISRAM AT91C_IRAM
|
580 |
|
|
#define AT91C_ISRAM_SIZE AT91C_IRAM_SIZE
|
581 |
|
|
|
582 |
|
|
#define AT91C_IFLASH (0x80000)
|
583 |
|
|
#define AT91C_IFLASH_SIZE (0x20000)
|
584 |
|
|
#define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes
|
585 |
|
|
#define AT91C_IFLASH_NB_OF_PAGES (512) // Internal FLASH 0 Number of Pages: 512
|
586 |
|
|
#define AT91C_IFLASH_LOCK_REGION_SIZE (8192) // Internal FLASH 0 Lock Region Size: 8 Kbytes
|
587 |
|
|
#define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 32
|
588 |
|
|
#if 0
|
589 |
|
|
#define AT91C_IFLASH1 (0x100000)
|
590 |
|
|
#define AT91C_IFLASH1_SIZE (0x20000)
|
591 |
|
|
#define AT91C_IFLASH1_PAGE_SIZE (256) // Internal FLASH 1 Page Size: 256 bytes
|
592 |
|
|
#define AT91C_IFLASH1_NB_OF_PAGES (512) // Internal FLASH 1 Number of Pages: 512
|
593 |
|
|
#define AT91C_IFLASH1_LOCK_REGION_SIZE (8192) // Internal FLASH 1 Lock Region Size: 8 Kbytes
|
594 |
|
|
#define AT91C_IFLASH1_NB_OF_LOCK_BITS (16) // Internal FLASH 1 Number of Lock Bits: 32
|
595 |
|
|
#endif
|
596 |
|
|
/// Indicates chip has an EFC.
|
597 |
|
|
#define AT91C_BASE_EFC AT91C_BASE_EFC0
|
598 |
|
|
//------------------------------------------------------------------------------
|
599 |
|
|
|
600 |
|
|
|
601 |
|
|
//------------------------------------------------------------------------------
|
602 |
|
|
/// \page "SAM3UE-EK - External components"
|
603 |
|
|
/// This page lists the definitions related to external on-board components
|
604 |
|
|
/// located in the board.h file for the SAM3UE-EK.
|
605 |
|
|
///
|
606 |
|
|
/// !ISO7816
|
607 |
|
|
/// - PIN_SMARTCARD_CONNECT
|
608 |
|
|
/// - PIN_ISO7816_RSTMC
|
609 |
|
|
/// - PINS_ISO7816
|
610 |
|
|
|
611 |
|
|
/// Smartcard detection pin
|
612 |
|
|
//#define PIN_SMARTCARD_CONNECT {1 << 5, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
613 |
|
|
/// PIN used for reset the smartcard
|
614 |
|
|
//#define PIN_ISO7816_RSTMC {1 << 7, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
615 |
|
|
/// Pins used for connect the smartcard
|
616 |
|
|
//#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC
|
617 |
|
|
|
618 |
|
|
/// Dma channel number
|
619 |
|
|
#define BOARD_MCI_DMA_CHANNEL 0
|
620 |
|
|
/// MCI0 DMA hardware handshaking ID
|
621 |
|
|
#define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0
|
622 |
|
|
#define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0
|
623 |
|
|
/// MCI1 DMA hardware handshaking ID
|
624 |
|
|
#define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13
|
625 |
|
|
#define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13
|
626 |
|
|
/// SD DMA hardware handshaking ID
|
627 |
|
|
#define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0
|
628 |
|
|
#define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0
|
629 |
|
|
//------------------------------------------------------------------------------
|
630 |
|
|
|
631 |
|
|
//------------------------------------------------------------------------------
|
632 |
|
|
/// \page "SAM3UE-EK - Individual chip definition"
|
633 |
|
|
/// This page lists the definitions related to different chip's definition
|
634 |
|
|
/// located in the board.h file for the SAM3UE-EK.
|
635 |
|
|
|
636 |
|
|
/// DBGU
|
637 |
|
|
#define BOARD_DBGU_ID AT91C_ID_DBGU
|
638 |
|
|
|
639 |
|
|
/// Rtc
|
640 |
|
|
#define BOARD_RTC_ID AT91C_ID_RTC
|
641 |
|
|
|
642 |
|
|
/// Twi eeprom
|
643 |
|
|
#define BOARD_ID_TWI_EEPROM AT91C_ID_TWI1
|
644 |
|
|
#define BOARD_BASE_TWI_EEPROM AT91C_BASE_TWI1
|
645 |
|
|
#define BOARD_PINS_TWI_EEPROM PINS_TWI1
|
646 |
|
|
|
647 |
|
|
/// USART
|
648 |
|
|
#define BOARD_PIN_USART_RXD PIN_USART1_RXD
|
649 |
|
|
#define BOARD_PIN_USART_TXD PIN_USART1_TXD
|
650 |
|
|
#define BOARD_PIN_USART_CTS PIN_USART1_CTS
|
651 |
|
|
#define BOARD_PIN_USART_RTS PIN_USART1_RTS
|
652 |
|
|
#define BOARD_USART_BASE AT91C_BASE_US1
|
653 |
|
|
#define BOARD_ID_USART AT91C_ID_US1
|
654 |
|
|
|
655 |
|
|
/// Interrupt source
|
656 |
|
|
typedef enum IRQn
|
657 |
|
|
{
|
658 |
|
|
/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
|
659 |
|
|
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
|
660 |
|
|
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
|
661 |
|
|
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
|
662 |
|
|
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
|
663 |
|
|
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
|
664 |
|
|
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
|
665 |
|
|
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
|
666 |
|
|
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
|
667 |
|
|
|
668 |
|
|
/****** AT91SAM3U4 specific Interrupt Numbers *********************************************************/
|
669 |
|
|
IROn_SUPC = AT91C_ID_SUPC , // SUPPLY CONTROLLER
|
670 |
|
|
IROn_RSTC = AT91C_ID_RSTC , // RESET CONTROLLER
|
671 |
|
|
IROn_RTC = AT91C_ID_RTC , // REAL TIME CLOCK
|
672 |
|
|
IROn_RTT = AT91C_ID_RTT , // REAL TIME TIMER
|
673 |
|
|
IROn_WDG = AT91C_ID_WDG , // WATCHDOG TIMER
|
674 |
|
|
IROn_PMC = AT91C_ID_PMC , // PMC
|
675 |
|
|
IROn_EFC0 = AT91C_ID_EFC0 , // EFC0
|
676 |
|
|
IROn_EFC1 = AT91C_ID_EFC1 , // EFC1
|
677 |
|
|
IROn_DBGU = AT91C_ID_DBGU , // DBGU
|
678 |
|
|
IROn_HSMC4 = AT91C_ID_HSMC4, // HSMC4
|
679 |
|
|
IROn_PIOA = AT91C_ID_PIOA , // Parallel IO Controller A
|
680 |
|
|
IROn_PIOB = AT91C_ID_PIOB , // Parallel IO Controller B
|
681 |
|
|
IROn_PIOC = AT91C_ID_PIOC , // Parallel IO Controller C
|
682 |
|
|
IROn_US0 = AT91C_ID_US0 , // USART 0
|
683 |
|
|
IROn_US1 = AT91C_ID_US1 , // USART 1
|
684 |
|
|
IROn_US2 = AT91C_ID_US2 , // USART 2
|
685 |
|
|
IROn_US3 = AT91C_ID_US3 , // USART 3
|
686 |
|
|
IROn_MCI0 = AT91C_ID_MCI0 , // Multimedia Card Interface
|
687 |
|
|
IROn_TWI0 = AT91C_ID_TWI0 , // TWI 0
|
688 |
|
|
IROn_TWI1 = AT91C_ID_TWI1 , // TWI 1
|
689 |
|
|
IROn_SPI0 = AT91C_ID_SPI0 , // Serial Peripheral Interface
|
690 |
|
|
IROn_SSC0 = AT91C_ID_SSC0 , // Serial Synchronous Controller 0
|
691 |
|
|
IROn_TC0 = AT91C_ID_TC0 , // Timer Counter 0
|
692 |
|
|
IROn_TC1 = AT91C_ID_TC1 , // Timer Counter 1
|
693 |
|
|
IROn_TC2 = AT91C_ID_TC2 , // Timer Counter 2
|
694 |
|
|
IROn_PWMC = AT91C_ID_PWMC , // Pulse Width Modulation Controller
|
695 |
|
|
IROn_ADCC0 = AT91C_ID_ADCC0, // ADC controller0
|
696 |
|
|
IROn_ADCC1 = AT91C_ID_ADCC1, // ADC controller1
|
697 |
|
|
IROn_HDMA = AT91C_ID_HDMA , // HDMA
|
698 |
|
|
IROn_UDPHS = AT91C_ID_UDPHS // USB Device High Speed
|
699 |
|
|
} IRQn_Type;
|
700 |
|
|
|
701 |
|
|
/// Dummy define SDRAM bus width
|
702 |
|
|
#define BOARD_SDRAM_BUSWIDTH 32
|
703 |
|
|
|
704 |
|
|
//------------------------------------------------------------------------------
|
705 |
|
|
|
706 |
|
|
|
707 |
|
|
#define PIN_EBI_NANDOE {1 << 17, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
708 |
|
|
#define PIN_EBI_NANDWE {1 << 18, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
709 |
|
|
#define PIN_EBI_NANDCLE {1 << 22, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
710 |
|
|
#define PIN_EBI_NANDALE {1 << 21, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
711 |
|
|
|
712 |
|
|
#ifdef CHIP_NAND_CTRL
|
713 |
|
|
/// Nandflash chip enable pin definition.
|
714 |
|
|
#define BOARD_NF_CE_PIN {1 << 12, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
715 |
|
|
/// Nandflash ready/busy pin definition.
|
716 |
|
|
#define BOARD_NF_RB_PIN {1 << 24, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
717 |
|
|
|
718 |
|
|
/// Nandflash controller peripheral pins definition.
|
719 |
|
|
#define PINS_NANDFLASH BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, PIN_EBI_NANDWE,\
|
720 |
|
|
PIN_EBI_NANDCLE, PIN_EBI_NANDALE, PIN_EBI_DATA_BUS
|
721 |
|
|
|
722 |
|
|
/// Address for transferring command bytes to the nandflash.
|
723 |
|
|
#define BOARD_NF_COMMAND_ADDR 0x60000000
|
724 |
|
|
/// Address for transferring address bytes to the nandflash.
|
725 |
|
|
#define BOARD_NF_ADDRESS_ADDR 0x61200000
|
726 |
|
|
/// Address for transferring data bytes to the nandflash.
|
727 |
|
|
#define BOARD_NF_DATA_ADDR 0x61000000
|
728 |
|
|
|
729 |
|
|
#else
|
730 |
|
|
/// Nandflash controller peripheral pins definition.
|
731 |
|
|
#define PINS_NANDFLASH BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, PIN_EBI_NANDWE,\
|
732 |
|
|
PIN_EBI_NANDCLE, PIN_EBI_NANDALE
|
733 |
|
|
/// Nandflash chip enable pin definition.
|
734 |
|
|
#define BOARD_NF_CE_PIN {1 << 12, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
735 |
|
|
/// Nandflash ready/busy pin definition.
|
736 |
|
|
#define BOARD_NF_RB_PIN {1 << 24, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_PULLUP}
|
737 |
|
|
/// Address for transferring command bytes to the nandflash.
|
738 |
|
|
#define BOARD_NF_COMMAND_ADDR 0x61400000
|
739 |
|
|
/// Address for transferring address bytes to the nandflash.
|
740 |
|
|
#define BOARD_NF_ADDRESS_ADDR 0x61200000
|
741 |
|
|
/// Address for transferring data bytes to the nandflash.
|
742 |
|
|
#define BOARD_NF_DATA_ADDR 0x61000000
|
743 |
|
|
|
744 |
|
|
#endif
|
745 |
|
|
|
746 |
|
|
#endif //#ifndef BOARD_H
|
747 |
|
|
|